1 /** 2 ****************************************************************************** 3 * @file usb_defines.h 4 * @author MCD Application Team 5 * @version V2.0.0 6 * @date 22-July-2011 7 * @brief Header of the Core Layer 8 ****************************************************************************** 9 * @attention 10 * 11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 * 18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> 19 ****************************************************************************** 20 */ 21 22 /* Define to prevent recursive inclusion -------------------------------------*/ 23 #ifndef __USB_DEF_H__ 24 #define __USB_DEF_H__ 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "usb_conf.h" 28 29 /** @addtogroup USB_OTG_DRIVER 30 * @{ 31 */ 32 33 /** @defgroup USB_DEFINES 34 * @brief This file is the 35 * @{ 36 */ 37 38 39 /** @defgroup USB_DEFINES_Exported_Defines 40 * @{ 41 */ 42 /** 43 * @} 44 */ 45 46 47 /** @defgroup _CORE_DEFINES_ 48 * @{ 49 */ 50 51 #define USB_OTG_SPEED_PARAM_HIGH 0 52 #define USB_OTG_SPEED_PARAM_HIGH_IN_FULL 1 53 #define USB_OTG_SPEED_PARAM_FULL 3 54 55 #define USB_OTG_SPEED_HIGH 0 56 #define USB_OTG_SPEED_FULL 1 57 58 #define USB_OTG_ULPI_PHY 1 59 #define USB_OTG_EMBEDDED_PHY 2 60 #define USB_OTG_I2C_PHY 3 61 62 /** 63 * @} 64 */ 65 66 67 /** @defgroup _GLOBAL_DEFINES_ 68 * @{ 69 */ 70 #define GAHBCFG_TXFEMPTYLVL_EMPTY 1 71 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0 72 #define GAHBCFG_GLBINT_ENABLE 1 73 #define GAHBCFG_INT_DMA_BURST_SINGLE 0 74 #define GAHBCFG_INT_DMA_BURST_INCR 1 75 #define GAHBCFG_INT_DMA_BURST_INCR4 3 76 #define GAHBCFG_INT_DMA_BURST_INCR8 5 77 #define GAHBCFG_INT_DMA_BURST_INCR16 7 78 #define GAHBCFG_DMAENABLE 1 79 #define GAHBCFG_TXFEMPTYLVL_EMPTY 1 80 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0 81 #define GRXSTS_PKTSTS_IN 2 82 #define GRXSTS_PKTSTS_IN_XFER_COMP 3 83 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 84 #define GRXSTS_PKTSTS_CH_HALTED 7 85 /** 86 * @} 87 */ 88 89 90 /** @defgroup _OnTheGo_DEFINES_ 91 * @{ 92 */ 93 #define MODE_HNP_SRP_CAPABLE 0 94 #define MODE_SRP_ONLY_CAPABLE 1 95 #define MODE_NO_HNP_SRP_CAPABLE 2 96 #define MODE_SRP_CAPABLE_DEVICE 3 97 #define MODE_NO_SRP_CAPABLE_DEVICE 4 98 #define MODE_SRP_CAPABLE_HOST 5 99 #define MODE_NO_SRP_CAPABLE_HOST 6 100 #define A_HOST 1 101 #define A_SUSPEND 2 102 #define A_PERIPHERAL 3 103 #define B_PERIPHERAL 4 104 #define B_HOST 5 105 #define DEVICE_MODE 0 106 #define HOST_MODE 1 107 #define OTG_MODE 2 108 /** 109 * @} 110 */ 111 112 113 /** @defgroup __DEVICE_DEFINES_ 114 * @{ 115 */ 116 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0 117 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1 118 #define DSTS_ENUMSPD_LS_PHY_6MHZ 2 119 #define DSTS_ENUMSPD_FS_PHY_48MHZ 3 120 121 #define DCFG_FRAME_INTERVAL_80 0 122 #define DCFG_FRAME_INTERVAL_85 1 123 #define DCFG_FRAME_INTERVAL_90 2 124 #define DCFG_FRAME_INTERVAL_95 3 125 126 #define DEP0CTL_MPS_64 0 127 #define DEP0CTL_MPS_32 1 128 #define DEP0CTL_MPS_16 2 129 #define DEP0CTL_MPS_8 3 130 131 #define EP_SPEED_LOW 0 132 #define EP_SPEED_FULL 1 133 #define EP_SPEED_HIGH 2 134 135 #define EP_TYPE_CTRL 0 136 #define EP_TYPE_ISOC 1 137 #define EP_TYPE_BULK 2 138 #define EP_TYPE_INTR 3 139 #define EP_TYPE_MSK 3 140 141 #define STS_GOUT_NAK 1 142 #define STS_DATA_UPDT 2 143 #define STS_XFER_COMP 3 144 #define STS_SETUP_COMP 4 145 #define STS_SETUP_UPDT 6 146 /** 147 * @} 148 */ 149 150 151 /** @defgroup __HOST_DEFINES_ 152 * @{ 153 */ 154 #define HC_PID_DATA0 0 155 #define HC_PID_DATA2 1 156 #define HC_PID_DATA1 2 157 #define HC_PID_SETUP 3 158 159 #define HPRT0_PRTSPD_HIGH_SPEED 0 160 #define HPRT0_PRTSPD_FULL_SPEED 1 161 #define HPRT0_PRTSPD_LOW_SPEED 2 162 163 #define HCFG_30_60_MHZ 0 164 #define HCFG_48_MHZ 1 165 #define HCFG_6_MHZ 2 166 167 #define HCCHAR_CTRL 0 168 #define HCCHAR_ISOC 1 169 #define HCCHAR_BULK 2 170 #define HCCHAR_INTR 3 171 172 #define MIN(a, b) (((a) < (b)) ? (a) : (b)) 173 174 /** 175 * @} 176 */ 177 178 179 /** @defgroup USB_DEFINES_Exported_Types 180 * @{ 181 */ 182 183 typedef enum 184 { 185 USB_OTG_HS_CORE_ID = 0, 186 USB_OTG_FS_CORE_ID = 1 187 }USB_OTG_CORE_ID_TypeDef; 188 /** 189 * @} 190 */ 191 192 193 /** @defgroup USB_DEFINES_Exported_Macros 194 * @{ 195 */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup USB_DEFINES_Exported_Variables 201 * @{ 202 */ 203 /** 204 * @} 205 */ 206 207 /** @defgroup USB_DEFINES_Exported_FunctionsPrototype 208 * @{ 209 */ 210 /** 211 * @} 212 */ 213 214 215 /** @defgroup Internal_Macro's 216 * @{ 217 */ 218 #define USB_OTG_READ_REG32(reg) (*(__IO uint32_t *)reg) 219 #define USB_OTG_WRITE_REG32(reg,value) (*(__IO uint32_t *)reg = value) 220 #define USB_OTG_MODIFY_REG32(reg,clear_mask,set_mask) \ 221 USB_OTG_WRITE_REG32(reg, (((USB_OTG_READ_REG32(reg)) & ~clear_mask) | set_mask ) ) 222 223 /******************************************************************************** 224 ENUMERATION TYPE 225 ********************************************************************************/ 226 enum USB_OTG_SPEED { 227 USB_SPEED_UNKNOWN = 0, 228 USB_SPEED_LOW, 229 USB_SPEED_FULL, 230 USB_SPEED_HIGH 231 }; 232 233 #endif //__USB_DEFINES__H__ 234 235 236 /** 237 * @} 238 */ 239 240 /** 241 * @} 242 */ 243 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 244 245