1;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2;* File Name          : startup_stm32f030xc.s
3;* Author             : MCD Application Team
4;* Version            : V1.5.0
5;* Date               : 24-December-2014
6;* Description        : STM32F030xC devices vector table for EWARM toolchain.
7;*                      This module performs:
8;*                      - Set the initial SP
9;*                      - Set the initial PC == __iar_program_start,
10;*                      - Set the vector table entries with the exceptions ISR
11;*                        address.
12;*                      After Reset the Cortex-M0 processor is in Thread mode,
13;*                      priority is Privileged, and the Stack is set to Main.
14;*******************************************************************************
15;  @attention
16;
17;  Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
18;  You may not use this file except in compliance with the License.
19;  You may obtain a copy of the License at:
20;
21;         http://www.st.com/software_license_agreement_liberty_v2
22;
23;  Unless required by applicable law or agreed to in writing, software
24;  distributed under the License is distributed on an "AS IS" BASIS,
25;  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26;  See the License for the specific language governing permissions and
27;  limitations under the License.
28;
29;*******************************************************************************
30;
31;
32; The modules in this file are included in the libraries, and may be replaced
33; by any user-defined modules that define the PUBLIC symbol _program_start or
34; a user defined start symbol.
35; To override the cstartup defined in the library, simply add your modified
36; version to the workbench project.
37;
38; The vector table is normally located at address 0.
39; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
40; The name "__vector_table" has special meaning for C-SPY:
41; it is where the SP start value is found, and the NVIC vector
42; table register (VTOR) is initialized to this address if != 0.
43;
44; Cortex-M version
45;
46
47        MODULE  ?cstartup
48
49        ;; Forward declaration of sections.
50        SECTION CSTACK:DATA:NOROOT(3)
51
52        SECTION .intvec:CODE:NOROOT(2)
53
54        EXTERN  __iar_program_start
55        EXTERN  SystemInit
56        PUBLIC  __vector_table
57
58        DATA
59__vector_table
60        DCD     sfe(CSTACK)
61        DCD     Reset_Handler                  ; Reset Handler
62
63        DCD     NMI_Handler                    ; NMI Handler
64        DCD     HardFault_Handler              ; Hard Fault Handler
65        DCD     0                              ; Reserved
66        DCD     0                              ; Reserved
67        DCD     0                              ; Reserved
68        DCD     0                              ; Reserved
69        DCD     0                              ; Reserved
70        DCD     0                              ; Reserved
71        DCD     0                              ; Reserved
72        DCD     SVC_Handler                    ; SVCall Handler
73        DCD     0                              ; Reserved
74        DCD     0                              ; Reserved
75        DCD     PendSV_Handler                 ; PendSV Handler
76        DCD     SysTick_Handler                ; SysTick Handler
77
78        ; External Interrupts
79        DCD     WWDG_IRQHandler                ; Window Watchdog
80        DCD     0                              ; Reserved
81        DCD     RTC_IRQHandler                 ; RTC through EXTI Line
82        DCD     FLASH_IRQHandler               ; FLASH
83        DCD     RCC_IRQHandler                 ; RCC
84        DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
85        DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
86        DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
87        DCD     0                              ; Reserved
88        DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
89        DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
90        DCD     DMA1_Channel4_5_IRQHandler     ; DMA1 Channel 4 and Channel 5
91        DCD     ADC1_IRQHandler                ; ADC1
92        DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
93        DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
94        DCD     0                              ; Reserved
95        DCD     TIM3_IRQHandler                ; TIM3
96        DCD     TIM6_IRQHandler                ; TIM6
97        DCD     TIM7_IRQHandler                ; TIM7
98        DCD     TIM14_IRQHandler               ; TIM14
99        DCD     TIM15_IRQHandler               ; TIM15
100        DCD     TIM16_IRQHandler               ; TIM16
101        DCD     TIM17_IRQHandler               ; TIM17
102        DCD     I2C1_IRQHandler                ; I2C1
103        DCD     I2C2_IRQHandler                ; I2C2
104        DCD     SPI1_IRQHandler                ; SPI1
105        DCD     SPI2_IRQHandler                ; SPI2
106        DCD     USART1_IRQHandler              ; USART1
107        DCD     USART2_IRQHandler              ; USART2
108        DCD     USART3_6_IRQHandler            ; USART3, USART4, USART5, USART6
109        DCD     0                              ; Reserved
110        DCD     0                              ; Reserved
111
112;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
113;;
114;; Default interrupt handlers.
115;;
116        THUMB
117
118        PUBWEAK Reset_Handler
119        SECTION .text:CODE:NOROOT:REORDER(2)
120Reset_Handler
121
122        LDR     R0, =sfe(CSTACK)          ; set stack pointer
123        MSR     MSP, R0
124
125;;Check if boot space corresponds to test memory
126        LDR R0,=0x00000004
127        LDR R1, [R0]
128        LSRS R1, R1, #24
129        LDR R2,=0x1F
130        CMP R1, R2
131
132        BNE ApplicationStart
133;; SYSCFG clock enable
134        LDR R0,=0x40021018
135        LDR R1,=0x00000001
136        STR R1, [R0]
137
138;; Set CFGR1 register with flash memory remap at address 0
139
140        LDR R0,=0x40010000
141        LDR R1,=0x00000000
142        STR R1, [R0]
143ApplicationStart
144        LDR     R0, =SystemInit
145        BLX     R0
146        LDR     R0, =__iar_program_start
147        BX      R0
148
149        PUBWEAK NMI_Handler
150        SECTION .text:CODE:NOROOT:REORDER(1)
151NMI_Handler
152        B NMI_Handler
153
154        PUBWEAK HardFault_Handler
155        SECTION .text:CODE:NOROOT:REORDER(1)
156HardFault_Handler
157        B HardFault_Handler
158
159        PUBWEAK SVC_Handler
160        SECTION .text:CODE:NOROOT:REORDER(1)
161SVC_Handler
162        B SVC_Handler
163
164        PUBWEAK PendSV_Handler
165        SECTION .text:CODE:NOROOT:REORDER(1)
166PendSV_Handler
167        B PendSV_Handler
168
169        PUBWEAK SysTick_Handler
170        SECTION .text:CODE:NOROOT:REORDER(1)
171SysTick_Handler
172        B SysTick_Handler
173
174        PUBWEAK WWDG_IRQHandler
175        SECTION .text:CODE:NOROOT:REORDER(1)
176WWDG_IRQHandler
177        B WWDG_IRQHandler
178
179        PUBWEAK RTC_IRQHandler
180        SECTION .text:CODE:NOROOT:REORDER(1)
181RTC_IRQHandler
182        B RTC_IRQHandler
183
184        PUBWEAK FLASH_IRQHandler
185        SECTION .text:CODE:NOROOT:REORDER(1)
186FLASH_IRQHandler
187        B FLASH_IRQHandler
188
189        PUBWEAK RCC_IRQHandler
190        SECTION .text:CODE:NOROOT:REORDER(1)
191RCC_IRQHandler
192        B RCC_IRQHandler
193
194        PUBWEAK EXTI0_1_IRQHandler
195        SECTION .text:CODE:NOROOT:REORDER(1)
196EXTI0_1_IRQHandler
197        B EXTI0_1_IRQHandler
198
199        PUBWEAK EXTI2_3_IRQHandler
200        SECTION .text:CODE:NOROOT:REORDER(1)
201EXTI2_3_IRQHandler
202        B EXTI2_3_IRQHandler
203
204        PUBWEAK EXTI4_15_IRQHandler
205        SECTION .text:CODE:NOROOT:REORDER(1)
206EXTI4_15_IRQHandler
207        B EXTI4_15_IRQHandler
208
209        PUBWEAK DMA1_Channel1_IRQHandler
210        SECTION .text:CODE:NOROOT:REORDER(1)
211DMA1_Channel1_IRQHandler
212        B DMA1_Channel1_IRQHandler
213
214        PUBWEAK DMA1_Channel2_3_IRQHandler
215        SECTION .text:CODE:NOROOT:REORDER(1)
216DMA1_Channel2_3_IRQHandler
217        B DMA1_Channel2_3_IRQHandler
218
219        PUBWEAK DMA1_Channel4_5_IRQHandler
220        SECTION .text:CODE:NOROOT:REORDER(1)
221DMA1_Channel4_5_IRQHandler
222        B DMA1_Channel4_5_IRQHandler
223
224        PUBWEAK ADC1_IRQHandler
225        SECTION .text:CODE:NOROOT:REORDER(1)
226ADC1_IRQHandler
227        B ADC1_IRQHandler
228
229        PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
230        SECTION .text:CODE:NOROOT:REORDER(1)
231TIM1_BRK_UP_TRG_COM_IRQHandler
232        B TIM1_BRK_UP_TRG_COM_IRQHandler
233
234        PUBWEAK TIM1_CC_IRQHandler
235        SECTION .text:CODE:NOROOT:REORDER(1)
236TIM1_CC_IRQHandler
237        B TIM1_CC_IRQHandler
238
239        PUBWEAK TIM3_IRQHandler
240        SECTION .text:CODE:NOROOT:REORDER(1)
241TIM3_IRQHandler
242        B TIM3_IRQHandler
243
244        PUBWEAK TIM6_IRQHandler
245        SECTION .text:CODE:NOROOT:REORDER(1)
246TIM6_IRQHandler
247        B TIM6_IRQHandler
248
249        PUBWEAK TIM7_IRQHandler
250        SECTION .text:CODE:NOROOT:REORDER(1)
251TIM7_IRQHandler
252        B TIM7_IRQHandler
253
254        PUBWEAK TIM14_IRQHandler
255        SECTION .text:CODE:NOROOT:REORDER(1)
256TIM14_IRQHandler
257        B TIM14_IRQHandler
258
259        PUBWEAK TIM15_IRQHandler
260        SECTION .text:CODE:NOROOT:REORDER(1)
261TIM15_IRQHandler
262        B TIM15_IRQHandler
263
264        PUBWEAK TIM16_IRQHandler
265        SECTION .text:CODE:NOROOT:REORDER(1)
266TIM16_IRQHandler
267        B TIM16_IRQHandler
268
269        PUBWEAK TIM17_IRQHandler
270        SECTION .text:CODE:NOROOT:REORDER(1)
271TIM17_IRQHandler
272        B TIM17_IRQHandler
273
274        PUBWEAK I2C1_IRQHandler
275        SECTION .text:CODE:NOROOT:REORDER(1)
276I2C1_IRQHandler
277        B I2C1_IRQHandler
278
279        PUBWEAK I2C2_IRQHandler
280        SECTION .text:CODE:NOROOT:REORDER(1)
281I2C2_IRQHandler
282        B I2C2_IRQHandler
283
284        PUBWEAK SPI1_IRQHandler
285        SECTION .text:CODE:NOROOT:REORDER(1)
286SPI1_IRQHandler
287        B SPI1_IRQHandler
288
289        PUBWEAK SPI2_IRQHandler
290        SECTION .text:CODE:NOROOT:REORDER(1)
291SPI2_IRQHandler
292        B SPI2_IRQHandler
293
294        PUBWEAK USART1_IRQHandler
295        SECTION .text:CODE:NOROOT:REORDER(1)
296USART1_IRQHandler
297        B USART1_IRQHandler
298
299        PUBWEAK USART2_IRQHandler
300        SECTION .text:CODE:NOROOT:REORDER(1)
301USART2_IRQHandler
302        B USART2_IRQHandler
303
304        PUBWEAK USART3_6_IRQHandler
305        SECTION .text:CODE:NOROOT:REORDER(1)
306USART3_6_IRQHandler
307        B USART3_6_IRQHandler
308
309        END
310;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
311