1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_spi_ex.c
4 * @author MCD Application Team
5 * @brief Extended SPI HAL module driver.
6 * This file provides firmware functions to manage the following
7 * SPI peripheral extended functionalities :
8 * + IO operation functions
9 * + Peripheral Control functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
15 * All rights reserved.</center></h2>
16 *
17 * This software component is licensed by ST under BSD 3-Clause license,
18 * the "License"; You may not use this file except in compliance with the
19 * License. You may obtain a copy of the License at:
20 * opensource.org/licenses/BSD-3-Clause
21 *
22 ******************************************************************************
23 */
24
25 /* Includes ------------------------------------------------------------------*/
26 #include "stm32h7xx_hal.h"
27
28 /** @addtogroup STM32H7xx_HAL_Driver
29 * @{
30 */
31
32 /** @defgroup SPIEx SPIEx
33 * @brief SPI Extended HAL module driver
34 * @{
35 */
36 #ifdef HAL_SPI_MODULE_ENABLED
37
38 /* Private typedef -----------------------------------------------------------*/
39 /* Private defines -----------------------------------------------------------*/
40 /* Private macros ------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private function prototypes -----------------------------------------------*/
43 /* Exported functions --------------------------------------------------------*/
44
45 /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
46 * @{
47 */
48
49 /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
50 * @brief Data transfers functions
51 *
52 @verbatim
53 ==============================================================================
54 ##### IO operation functions #####
55 ===============================================================================
56 [..]
57 This subsection provides a set of extended functions to manage the SPI
58 data transfers.
59
60 (#) SPIEx function:
61 (++) HAL_SPIEx_FlushRxFifo()
62 (++) HAL_SPIEx_FlushRxFifo()
63 (++) HAL_SPIEx_EnableLockConfiguration()
64 (++) HAL_SPIEx_ConfigureUnderrun()
65
66 @endverbatim
67 * @{
68 */
69
70 /**
71 * @brief Flush the RX fifo.
72 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
73 * the configuration information for the specified SPI module.
74 * @retval HAL status
75 */
HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef * hspi)76 HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
77 {
78 uint8_t count = 0;
79 uint32_t itflag = hspi->Instance->SR;
80 __IO uint32_t tmpreg;
81
82 while (((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_RX_FIFO_0PACKET) || ((itflag & SPI_FLAG_RXWNE) != 0UL))
83 {
84 count += (uint8_t)4UL;
85 tmpreg = hspi->Instance->RXDR;
86 UNUSED(tmpreg); /* To avoid GCC warning */
87
88 if (IS_SPI_HIGHEND_INSTANCE(hspi->Instance))
89 {
90 if (count > SPI_HIGHEND_FIFO_SIZE)
91 {
92 return HAL_TIMEOUT;
93 }
94 }
95 else
96 {
97 if (count > SPI_LOWEND_FIFO_SIZE)
98 {
99 return HAL_TIMEOUT;
100 }
101 }
102 }
103 return HAL_OK;
104 }
105
106
107 /**
108 * @brief Enable the Lock for the AF configuration of associated IOs
109 * and write protect the Content of Configuration register 2
110 * when SPI is enabled
111 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
112 * the configuration information for SPI module.
113 * @retval None
114 */
HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef * hspi)115 HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi)
116 {
117 HAL_StatusTypeDef errorcode = HAL_OK;
118
119 /* Process Locked */
120 __HAL_LOCK(hspi);
121
122 if (hspi->State != HAL_SPI_STATE_READY)
123 {
124 errorcode = HAL_BUSY;
125 hspi->State = HAL_SPI_STATE_READY;
126 /* Process Unlocked */
127 __HAL_UNLOCK(hspi);
128 return errorcode;
129 }
130
131 /* Check if the SPI is disabled to edit IOLOCK bit */
132 if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
133 {
134 SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
135 }
136 else
137 {
138 /* Disable SPI peripheral */
139 __HAL_SPI_DISABLE(hspi);
140
141 SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
142
143 /* Enable SPI peripheral */
144 __HAL_SPI_ENABLE(hspi);
145 }
146
147 hspi->State = HAL_SPI_STATE_READY;
148 /* Process Unlocked */
149 __HAL_UNLOCK(hspi);
150 return errorcode;
151 }
152
153 /**
154 * @brief Configure the UNDERRUN condition and behavior of slave transmitter.
155 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
156 * the configuration information for SPI module.
157 * @param UnderrunDetection : Detection of underrun condition at slave transmitter
158 * This parameter can be a value of @ref SPI_Underrun_Detection.
159 * @param UnderrunBehaviour : Behavior of slave transmitter at underrun condition
160 * This parameter can be a value of @ref SPI_Underrun_Behaviour.
161 * @retval None
162 */
HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef * hspi,uint32_t UnderrunDetection,uint32_t UnderrunBehaviour)163 HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection, uint32_t UnderrunBehaviour)
164 {
165 HAL_StatusTypeDef errorcode = HAL_OK;
166
167 /* Process Locked */
168 __HAL_LOCK(hspi);
169
170 /* Check State and Insure that Underrun configuration is managed only by Salve */
171 if ((hspi->State != HAL_SPI_STATE_READY) || (hspi->Init.Mode != SPI_MODE_SLAVE))
172 {
173 errorcode = HAL_BUSY;
174 hspi->State = HAL_SPI_STATE_READY;
175 /* Process Unlocked */
176 __HAL_UNLOCK(hspi);
177 return errorcode;
178 }
179
180 /* Check the parameters */
181 assert_param(IS_SPI_UNDERRUN_DETECTION(UnderrunDetection));
182 assert_param(IS_SPI_UNDERRUN_BEHAVIOUR(UnderrunBehaviour));
183
184 /* Check if the SPI is disabled to edit CFG1 register */
185 if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
186 {
187 /* Configure Underrun fields */
188 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
189 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
190 }
191 else
192 {
193 /* Disable SPI peripheral */
194 __HAL_SPI_DISABLE(hspi);
195
196 /* Configure Underrun fields */
197 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
198 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
199
200 /* Enable SPI peripheral */
201 __HAL_SPI_ENABLE(hspi);
202 }
203
204
205 hspi->State = HAL_SPI_STATE_READY;
206 /* Process Unlocked */
207 __HAL_UNLOCK(hspi);
208 return errorcode;
209 }
210
211 /**
212 * @}
213 */
214
215 /**
216 * @}
217 */
218
219 #endif /* HAL_SPI_MODULE_ENABLED */
220
221 /**
222 * @}
223 */
224
225 /**
226 * @}
227 */
228
229 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
230