1 /*
2
3 YMF278B FM + Wave table Synthesizer (OPL4)
4
5 Timer and PCM YMF278B. The FM is shared with the ymf262.
6
7 This chip roughly splits the difference between the Sega 315-5560 MultiPCM
8 (Multi32, Model 1/2) and YMF 292-F SCSP (later Model 2, STV, Saturn, Model 3).
9
10 Features as listed in LSI-4MF2782 data sheet:
11 FM Synthesis (same as YMF262)
12 1. Sound generation mode
13 Two-operater mode
14 Generates eighteen voices or fifteen voices plus five rhythm sounds simultaneously
15 Four-operator mode
16 Generates six voices in four-operator mode plus six voices in two-operator mode simultaneously,
17 or generates six voices in four-operator mode plus three voices in two-operator mode plus five
18 rhythm sounds simultaneously
19 2. Eight selectable waveforms
20 3. Stereo output
21 Wave Table Synthesis
22 1. Generates twenty-four voices simultaneously
23 2. 44.1kHz sampling rate for output sound data
24 3. Selectable from 8-bit, 12-bit and 16-bit word lengths for wave data
25 4. Stereo output (16-stage panpot for each voice)
26 Wave Data
27 1. Accepts 32M bit external memory at maximum
28 2. Up to 512 wave tables
29 3. External ROM or SRAM can be connected. With SRAM connected, the CPU can download wave data
30 4. Outputs chip select signals for 1Mbit, 4Mbit, 8Mbit or 16Mbit memory
31 5. Can be directly connected to the Yamaha YRW801 (Wave data ROM)
32 Features of YRW801 as listed in LSI 4RW801A2
33 Built-in wave data of tones which comply with GM system Level 1
34 Melody tone ....... 128 tones
35 Percussion tone ... 47 tones
36 16Mbit capacity (2,097,152word x 8)
37
38 By R. Belmont and O. Galibert.
39
40 Copyright R. Belmont and O. Galibert.
41
42 This software is dual-licensed: it may be used in MAME and properly licensed
43 MAME derivatives under the terms of the MAME license. For use outside of
44 MAME and properly licensed derivatives, it is available under the
45 terms of the GNU Lesser General Public License (LGPL), version 2.1.
46 You may read the LGPL at http://www.gnu.org/licenses/lgpl.html
47
48 Changelog:
49 Sep. 8, 2002 - fixed ymf278b_compute_rate when OCT is negative (RB)
50 Dec. 11, 2002 - added ability to set non-standard clock rates (RB)
51 fixed envelope target for release (fixes missing
52 instruments in hotdebut).
53 Thanks to Team Japump! for MP3s from a real PCB.
54 fixed crash if MAME is run with no sound.
55 June 4, 2003 - Changed to dual-license with LGPL for use in OpenMSX.
56 OpenMSX contributed a bugfix where looped samples were
57 not being addressed properly, causing pitch fluctuation.
58 August 15, 2010 - Backport to MAME-style C from OpenMSX
59 */
60
61 #include <math.h>
62 #include "mamedef.h"
63 //#include "sndintrf.h"
64 //#include "streams.h"
65 //#include "cpuintrf.h"
66 #include <stdlib.h>
67 #include <string.h> // for memset
68 #include <stddef.h> // for NULL
69 #include <stdio.h>
70 #include <string.h>
71 #include "ymf262.h"
72 #include "ymf278b.h"
73
74 typedef struct
75 {
76 UINT32 startaddr;
77 UINT32 loopaddr;
78 UINT32 endaddr;
79 UINT32 step; /* fixed-point frequency step */
80 UINT32 stepptr; /* fixed-point pointer into the sample */
81 UINT16 pos;
82 INT16 sample1, sample2;
83
84 INT32 env_vol;
85
86 INT32 lfo_cnt;
87 INT32 lfo_step;
88 INT32 lfo_max;
89
90 INT16 wave; /* wavetable number */
91 INT16 FN; /* f-number */
92 INT8 OCT; /* octave */
93 INT8 PRVB; /* pseudo-reverb */
94 INT8 LD; /* level direct */
95 INT8 TL; /* total level */
96 INT8 pan; /* panpot */
97 INT8 lfo; /* LFO */
98 INT8 vib; /* vibrato */
99 INT8 AM; /* AM level */
100
101 INT8 AR;
102 INT8 D1R;
103 INT32 DL;
104 INT8 D2R;
105 INT8 RC; /* rate correction */
106 INT8 RR;
107
108 INT8 bits; /* width of the samples */
109 INT8 active; /* slot keyed on */
110
111 INT8 state;
112 INT8 lfo_active;
113
114 UINT8 Muted;
115 } YMF278BSlot;
116
117 typedef struct
118 {
119 YMF278BSlot slots[24];
120
121 UINT32 eg_cnt; /* Global envelope generator counter. */
122
123 INT8 wavetblhdr;
124 INT8 memmode;
125 INT32 memadr;
126
127 UINT8 exp;
128
129 INT32 fm_l, fm_r;
130 INT32 pcm_l, pcm_r;
131
132 //UINT8 timer_a_count, timer_b_count, enable, current_irq;
133 //emu_timer *timer_a, *timer_b;
134 //int irq_line;
135
136 UINT8 port_A, port_B, port_C;
137 //void (*irq_callback)(const device_config *, int);
138 void (*irq_callback)(int);
139 //const device_config *device;
140
141 UINT32 ROMSize;
142 UINT8 *rom;
143 UINT32 RAMSize;
144 UINT8 *ram;
145 int clock;
146
147 INT32 volume[256*4]; // precalculated attenuation values with some marging for enveloppe and pan levels
148
149 UINT8 regs[256];
150
151 void *fmchip;
152 UINT8 FMEnabled; // that saves a whole lot of CPU
153 //sound_stream * stream;
154 } YMF278BChip;
155
156 extern UINT8 CHIP_SAMPLING_MODE;
157 extern INT32 CHIP_SAMPLE_RATE;
158 #define MAX_CHIPS 0x10
159 static YMF278BChip YMF278BData[MAX_CHIPS];
160 static UINT32 ROMFileSize = 0x00;
161 static UINT8* ROMFile = NULL;
162
163 char* FindFile(const char* FileName); // from VGMPlay_Intf.h/VGMPlay.c
164
165
166 #define EG_SH 16 // 16.16 fixed point (EG timing)
167 #define EG_TIMER_OVERFLOW (1 << EG_SH)
168
169 // envelope output entries
170 #define ENV_BITS 11 // -VB
171 #define ENV_LEN (1 << ENV_BITS)
172 #define ENV_STEP (128.0 / ENV_LEN)
173 #define MAX_ATT_INDEX 511
174 #define MIN_ATT_INDEX 0
175
176 // Envelope Generator phases
177 #define EG_ATT 4
178 #define EG_DEC 3
179 #define EG_SUS 2
180 #define EG_REL 1
181 #define EG_OFF 0
182
183 #define EG_REV 5 // pseudo reverb
184 #define EG_DMP 6 // damp
185
186 // Pan values, units are -3dB, i.e. 8.
187 const INT32 pan_left[16] = {
188 0, 8, 16, 24, 32, 40, 48, 256, 256, 0, 0, 0, 0, 0, 0, 0
189 };
190 const INT32 pan_right[16] = {
191 0, 0, 0, 0, 0, 0, 0, 0, 256, 256, 48, 40, 32, 24, 16, 8
192 };
193
194 // Mixing levels, units are -3dB, and add some marging to avoid clipping
195 const INT32 mix_level[8] = {
196 8, 16, 24, 32, 40, 48, 56, 256+8
197 };
198
199 // decay level table (3dB per step)
200 // 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)
201 #define SC(db) (db * (2.0 / ENV_STEP))
202 const UINT32 dl_tab[16] = {
203 SC( 0), SC( 1), SC( 2), SC(3 ), SC(4 ), SC(5 ), SC(6 ), SC( 7),
204 SC( 8), SC( 9), SC(10), SC(11), SC(12), SC(13), SC(14), SC(31)
205 };
206 #undef SC
207
208 #define RATE_STEPS 8
209 const UINT8 eg_inc[15 * RATE_STEPS] = {
210 //cycle:0 1 2 3 4 5 6 7
211 0, 1, 0, 1, 0, 1, 0, 1, // 0 rates 00..12 0 (increment by 0 or 1)
212 0, 1, 0, 1, 1, 1, 0, 1, // 1 rates 00..12 1
213 0, 1, 1, 1, 0, 1, 1, 1, // 2 rates 00..12 2
214 0, 1, 1, 1, 1, 1, 1, 1, // 3 rates 00..12 3
215
216 1, 1, 1, 1, 1, 1, 1, 1, // 4 rate 13 0 (increment by 1)
217 1, 1, 1, 2, 1, 1, 1, 2, // 5 rate 13 1
218 1, 2, 1, 2, 1, 2, 1, 2, // 6 rate 13 2
219 1, 2, 2, 2, 1, 2, 2, 2, // 7 rate 13 3
220
221 2, 2, 2, 2, 2, 2, 2, 2, // 8 rate 14 0 (increment by 2)
222 2, 2, 2, 4, 2, 2, 2, 4, // 9 rate 14 1
223 2, 4, 2, 4, 2, 4, 2, 4, // 10 rate 14 2
224 2, 4, 4, 4, 2, 4, 4, 4, // 11 rate 14 3
225
226 4, 4, 4, 4, 4, 4, 4, 4, // 12 rates 15 0, 15 1, 15 2, 15 3 for decay
227 8, 8, 8, 8, 8, 8, 8, 8, // 13 rates 15 0, 15 1, 15 2, 15 3 for attack (zero time)
228 0, 0, 0, 0, 0, 0, 0, 0, // 14 infinity rates for attack and decay(s)
229 };
230
231 #define O(a) (a * RATE_STEPS)
232 const UINT8 eg_rate_select[64] = {
233 O( 0),O( 1),O( 2),O( 3),
234 O( 0),O( 1),O( 2),O( 3),
235 O( 0),O( 1),O( 2),O( 3),
236 O( 0),O( 1),O( 2),O( 3),
237 O( 0),O( 1),O( 2),O( 3),
238 O( 0),O( 1),O( 2),O( 3),
239 O( 0),O( 1),O( 2),O( 3),
240 O( 0),O( 1),O( 2),O( 3),
241 O( 0),O( 1),O( 2),O( 3),
242 O( 0),O( 1),O( 2),O( 3),
243 O( 0),O( 1),O( 2),O( 3),
244 O( 0),O( 1),O( 2),O( 3),
245 O( 0),O( 1),O( 2),O( 3),
246 O( 4),O( 5),O( 6),O( 7),
247 O( 8),O( 9),O(10),O(11),
248 O(12),O(12),O(12),O(12),
249 };
250 #undef O
251
252 // rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
253 // shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0
254 // mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0
255 #define O(a) (a)
256 const UINT8 eg_rate_shift[64] = {
257 O(12),O(12),O(12),O(12),
258 O(11),O(11),O(11),O(11),
259 O(10),O(10),O(10),O(10),
260 O( 9),O( 9),O( 9),O( 9),
261 O( 8),O( 8),O( 8),O( 8),
262 O( 7),O( 7),O( 7),O( 7),
263 O( 6),O( 6),O( 6),O( 6),
264 O( 5),O( 5),O( 5),O( 5),
265 O( 4),O( 4),O( 4),O( 4),
266 O( 3),O( 3),O( 3),O( 3),
267 O( 2),O( 2),O( 2),O( 2),
268 O( 1),O( 1),O( 1),O( 1),
269 O( 0),O( 0),O( 0),O( 0),
270 O( 0),O( 0),O( 0),O( 0),
271 O( 0),O( 0),O( 0),O( 0),
272 O( 0),O( 0),O( 0),O( 0),
273 };
274 #undef O
275
276
277 // number of steps to take in quarter of lfo frequency
278 // TODO check if frequency matches real chip
279 #define O(a) ((EG_TIMER_OVERFLOW / a) / 6)
280 const INT32 lfo_period[8] = {
281 O(0.168), O(2.019), O(3.196), O(4.206),
282 O(5.215), O(5.888), O(6.224), O(7.066)
283 };
284 #undef O
285
286
287 #define O(a) (a * 65536)
288 const INT32 vib_depth[8] = {
289 O(0), O(3.378), O(5.065), O(6.750),
290 O(10.114), O(20.170), O(40.106), O(79.307)
291 };
292 #undef O
293
294
295 #define SC(db) (INT32)(db * (2.0 / ENV_STEP))
296 const INT32 am_depth[8] = {
297 SC(0), SC(1.781), SC(2.906), SC(3.656),
298 SC(4.406), SC(5.906), SC(7.406), SC(11.91)
299 };
300 #undef SC
301
ymf278b_slot_reset(YMF278BSlot * slot)302 void ymf278b_slot_reset(YMF278BSlot* slot)
303 {
304 slot->wave = slot->FN = slot->OCT = slot->PRVB = slot->LD = slot->TL = slot->pan =
305 slot->lfo = slot->vib = slot->AM = 0;
306 slot->AR = slot->D1R = slot->DL = slot->D2R = slot->RC = slot->RR = 0;
307 slot->step = slot->stepptr = 0;
308 slot->bits = slot->startaddr = slot->loopaddr = slot->endaddr = 0;
309 slot->env_vol = MAX_ATT_INDEX;
310
311 slot->lfo_active = 0;
312 slot->lfo_cnt = slot->lfo_step = 0;
313 slot->lfo_max = lfo_period[0];
314
315 slot->state = EG_OFF;
316 slot->active = 0;
317
318 // not strictly needed, but avoid UMR on savestate
319 slot->pos = slot->sample1 = slot->sample2 = 0;
320 }
321
ymf278b_slot_compute_rate(YMF278BSlot * slot,int val)322 INLINE int ymf278b_slot_compute_rate(YMF278BSlot* slot, int val)
323 {
324 int res;
325 int oct;
326
327 if (val == 0)
328 return 0;
329 else if (val == 15)
330 return 63;
331
332 if (slot->RC != 15)
333 {
334 oct = slot->OCT;
335
336 if (oct & 8)
337 {
338 oct |= -8;
339 }
340 res = (oct + slot->RC);
341 if (res < 0)
342 res = 0;
343 else if (res > 15)
344 res = 15;
345 res = res * 2 + ((slot->FN & 0x200) ? 1 : 0) + val * 4;
346 }
347 else
348 {
349 res = val * 4;
350 }
351
352 if (res < 0)
353 res = 0;
354 else if (res > 63)
355 res = 63;
356
357 return res;
358 }
359
ymf278b_slot_compute_vib(YMF278BSlot * slot)360 INLINE int ymf278b_slot_compute_vib(YMF278BSlot* slot)
361 {
362 return (((slot->lfo_step << 8) / slot->lfo_max) * vib_depth[slot->vib]) >> 24;
363 }
364
365
ymf278b_slot_compute_am(YMF278BSlot * slot)366 INLINE int ymf278b_slot_compute_am(YMF278BSlot* slot)
367 {
368 if (slot->lfo_active && slot->AM)
369 return (((slot->lfo_step << 8) / slot->lfo_max) * am_depth[slot->AM]) >> 12;
370 else
371 return 0;
372 }
373
ymf278b_slot_set_lfo(YMF278BSlot * slot,int newlfo)374 INLINE void ymf278b_slot_set_lfo(YMF278BSlot* slot, int newlfo)
375 {
376 slot->lfo_step = (((slot->lfo_step << 8) / slot->lfo_max) * newlfo) >> 8;
377 slot->lfo_cnt = (((slot->lfo_cnt << 8) / slot->lfo_max) * newlfo) >> 8;
378
379 slot->lfo = newlfo;
380 slot->lfo_max = lfo_period[slot->lfo];
381 }
382
ymf278b_advance(YMF278BChip * chip)383 INLINE void ymf278b_advance(YMF278BChip* chip)
384 {
385 YMF278BSlot* op;
386 int i;
387 UINT8 rate;
388 UINT8 shift;
389 UINT8 select;
390
391 chip->eg_cnt ++;
392 for (i = 0; i < 24; i ++)
393 {
394 op = &chip->slots[i];
395
396 if (op->lfo_active)
397 {
398 op->lfo_cnt ++;
399 if (op->lfo_cnt < op->lfo_max)
400 {
401 op->lfo_step ++;
402 }
403 else if (op->lfo_cnt < (op->lfo_max * 3))
404 {
405 op->lfo_step --;
406 }
407 else
408 {
409 op->lfo_step ++;
410 if (op->lfo_cnt == (op->lfo_max * 4))
411 op->lfo_cnt = 0;
412 }
413 }
414
415 // Envelope Generator
416 switch(op->state)
417 {
418 case EG_ATT: // attack phase
419 rate = ymf278b_slot_compute_rate(op, op->AR);
420 if (rate < 4)
421 break;
422
423 shift = eg_rate_shift[rate];
424 if (! (chip->eg_cnt & ((1 << shift) - 1)))
425 {
426 select = eg_rate_select[rate];
427 op->env_vol += (~op->env_vol * eg_inc[select + ((chip->eg_cnt >> shift) & 7)]) >> 4; // -VB
428 if (op->env_vol <= MIN_ATT_INDEX)
429 {
430 op->env_vol = MIN_ATT_INDEX;
431 if (op->DL)
432 op->state = EG_DEC;
433 else
434 op->state = EG_SUS;
435 }
436 }
437 break;
438 case EG_DEC: // decay phase
439 rate = ymf278b_slot_compute_rate(op, op->D1R);
440 if (rate < 4)
441 break;
442
443 shift = eg_rate_shift[rate];
444 if (! (chip->eg_cnt & ((1 << shift) - 1)))
445 {
446 select = eg_rate_select[rate];
447 op->env_vol += eg_inc[select + ((chip->eg_cnt >> shift) & 7)];
448
449 if ((op->env_vol > dl_tab[6]) && op->PRVB)
450 op->state = EG_REV;
451 else
452 {
453 if (op->env_vol >= op->DL)
454 op->state = EG_SUS;
455 }
456 }
457 break;
458 case EG_SUS: // sustain phase
459 rate = ymf278b_slot_compute_rate(op, op->D2R);
460 if (rate < 4)
461 break;
462
463 shift = eg_rate_shift[rate];
464 if (! (chip->eg_cnt & ((1 << shift) - 1)))
465 {
466 select = eg_rate_select[rate];
467 op->env_vol += eg_inc[select + ((chip->eg_cnt >> shift) & 7)];
468
469 if ((op->env_vol > dl_tab[6]) && op->PRVB)
470 op->state = EG_REV;
471 else
472 {
473 if (op->env_vol >= MAX_ATT_INDEX)
474 {
475 op->env_vol = MAX_ATT_INDEX;
476 op->active = 0;
477 }
478 }
479 }
480 break;
481 case EG_REL: // release phase
482 rate = ymf278b_slot_compute_rate(op, op->RR);
483 if (rate < 4)
484 break;
485
486 shift = eg_rate_shift[rate];
487 if (! (chip->eg_cnt & ((1 << shift) - 1)))
488 {
489 select = eg_rate_select[rate];
490 op->env_vol += eg_inc[select + ((chip->eg_cnt >> shift) & 7)];
491
492 if ((op->env_vol > dl_tab[6]) && op->PRVB)
493 op->state = EG_REV;
494 else
495 {
496 if (op->env_vol >= MAX_ATT_INDEX)
497 {
498 op->env_vol = MAX_ATT_INDEX;
499 op->active = 0;
500 }
501 }
502 }
503 break;
504 case EG_REV: // pseudo reverb
505 // TODO improve env_vol update
506 rate = ymf278b_slot_compute_rate(op, 5);
507 //if (rate < 4)
508 // break;
509
510 shift = eg_rate_shift[rate];
511 if (! (chip->eg_cnt & ((1 << shift) - 1)))
512 {
513 select = eg_rate_select[rate];
514 op->env_vol += eg_inc[select + ((chip->eg_cnt >> shift) & 7)];
515
516 if (op->env_vol >= MAX_ATT_INDEX)
517 {
518 op->env_vol = MAX_ATT_INDEX;
519 op->active = 0;
520 }
521 }
522 break;
523 case EG_DMP: // damping
524 // TODO improve env_vol update, damp is just fastest decay now
525 rate = 56;
526 shift = eg_rate_shift[rate];
527 if (! (chip->eg_cnt & ((1 << shift) - 1)))
528 {
529 select = eg_rate_select[rate];
530 op->env_vol += eg_inc[select + ((chip->eg_cnt >> shift) & 7)];
531
532 if (op->env_vol >= MAX_ATT_INDEX)
533 {
534 op->env_vol = MAX_ATT_INDEX;
535 op->active = 0;
536 }
537 }
538 break;
539 case EG_OFF:
540 // nothing
541 break;
542
543 default:
544 #ifdef _DEBUG
545 //logerror(...);
546 #endif
547 break;
548 }
549 }
550 }
551
ymf278b_readMem(YMF278BChip * chip,offs_t address)552 INLINE UINT8 ymf278b_readMem(YMF278BChip* chip, offs_t address)
553 {
554 if (address < chip->ROMSize)
555 return chip->rom[address&0x3fffff];
556 else if (address < chip->ROMSize + chip->RAMSize)
557 return chip->ram[address - (chip->ROMSize&0x3fffff)];
558 else
559 return 255; // TODO check
560 }
561
ymf278b_readMemAddr(YMF278BChip * chip,offs_t address)562 INLINE UINT8* ymf278b_readMemAddr(YMF278BChip* chip, offs_t address)
563 {
564 if (address < chip->ROMSize)
565 return &chip->rom[address&0x3fffff];
566 else if (address < chip->ROMSize + chip->RAMSize)
567 return &chip->ram[address - (chip->ROMSize&0x3fffff)];
568 else
569 return NULL; // TODO check
570 }
571
ymf278b_writeMem(YMF278BChip * chip,offs_t address,UINT8 value)572 INLINE void ymf278b_writeMem(YMF278BChip* chip, offs_t address, UINT8 value)
573 {
574 if (address < chip->ROMSize)
575 return; // can't write to ROM
576 else if (address < chip->ROMSize + chip->RAMSize)
577 chip->ram[address - chip->ROMSize] = value;
578 else
579 return; // can't write to unmapped memory
580
581 return;
582 }
583
ymf278b_getSample(YMF278BChip * chip,YMF278BSlot * op)584 INLINE INT16 ymf278b_getSample(YMF278BChip* chip, YMF278BSlot* op)
585 {
586 INT16 sample;
587 UINT32 addr;
588 UINT8* addrp;
589
590 switch (op->bits)
591 {
592 case 0:
593 // 8 bit
594 sample = ymf278b_readMem(chip, op->startaddr + op->pos) << 8;
595 break;
596 case 1:
597 // 12 bit
598 addr = op->startaddr + ((op->pos / 2) * 3);
599 addrp = ymf278b_readMemAddr(chip, addr);
600 if (op->pos & 1)
601 sample = (addrp[2] << 8) | ((addrp[1] << 4) & 0xF0);
602 else
603 sample = (addrp[0] << 8) | (addrp[1] & 0xF0);
604 break;
605 case 2:
606 // 16 bit
607 addr = op->startaddr + (op->pos * 2);
608 addrp = ymf278b_readMemAddr(chip, addr);
609 sample = (addrp[0] << 8) | addrp[1];
610 break;
611 default:
612 // TODO unspecified
613 sample = 0;
614 break;
615 }
616 return sample;
617 }
618
ymf278b_anyActive(YMF278BChip * chip)619 int ymf278b_anyActive(YMF278BChip* chip)
620 {
621 int i;
622
623 for (i = 0; i < 24; i ++)
624 {
625 if (chip->slots[i].active)
626 return 1;
627 }
628 return 0;
629 }
630
ymf278b_pcm_update(UINT8 ChipID,stream_sample_t ** outputs,int samples)631 void ymf278b_pcm_update(UINT8 ChipID, stream_sample_t** outputs, int samples)
632 {
633 YMF278BChip* chip = &YMF278BData[ChipID];
634 int i;
635 unsigned int j;
636 INT32 vl;
637 INT32 vr;
638
639 if (chip->FMEnabled)
640 {
641 /* memset is done by ymf262_update */
642 ymf262_update_one(chip->fmchip, outputs, samples);
643 // apply FM mixing level
644 vl = mix_level[chip->fm_l] - 8; vl = chip->volume[vl];
645 vr = mix_level[chip->fm_r] - 8; vr = chip->volume[vr];
646 // make FM softer by 3 db
647 vl = (vl * 0x16A) >> 8; vr = (vr * 0x16A) >> 8;
648 for (j = 0; j < samples; j ++)
649 {
650 outputs[0][j] = (outputs[0][j] * vl) >> 15;
651 outputs[1][j] = (outputs[1][j] * vr) >> 15;
652 }
653 }
654 else
655 {
656 memset(outputs[0], 0x00, samples * sizeof(stream_sample_t));
657 memset(outputs[1], 0x00, samples * sizeof(stream_sample_t));
658 }
659
660 if (! ymf278b_anyActive(chip))
661 {
662 // TODO update internal state, even if muted
663 // TODO also mute individual channels
664 return;
665 }
666
667 vl = mix_level[chip->pcm_l];
668 vr = mix_level[chip->pcm_r];
669 for (j = 0; j < samples; j ++)
670 {
671 for (i = 0; i < 24; i ++)
672 {
673 YMF278BSlot* sl;
674 INT16 sample;
675 int vol;
676 int volLeft;
677 int volRight;
678
679 sl = &chip->slots[i];
680 if (! sl->active || sl->Muted)
681 {
682 //outputs[0][j] += 0;
683 //outputs[1][j] += 0;
684 continue;
685 }
686
687 sample = (sl->sample1 * (0x10000 - sl->stepptr) +
688 sl->sample2 * sl->stepptr) >> 16;
689 vol = sl->TL + (sl->env_vol >> 2) + ymf278b_slot_compute_am(sl);
690
691 volLeft = vol + pan_left [sl->pan] + vl;
692 volRight = vol + pan_right[sl->pan] + vr;
693 // TODO prob doesn't happen in real chip
694 //volLeft = std::max(0, volLeft);
695 //volRight = std::max(0, volRight);
696 volLeft &= 0x3FF; // catch negative Volume values in a hardware-like way
697 volRight &= 0x3FF; // (anything beyond 0x100 results in *0)
698
699 outputs[0][j] += (sample * chip->volume[volLeft] ) >> 17;
700 outputs[1][j] += (sample * chip->volume[volRight]) >> 17;
701
702 if (sl->lfo_active && sl->vib)
703 {
704 int oct;
705 unsigned int step;
706
707 oct = sl->OCT;
708 if (oct & 8)
709 oct |= -8;
710 oct += 5;
711 step = (sl->FN | 1024) + ymf278b_slot_compute_vib(sl);
712 if (oct >= 0)
713 step <<= oct;
714 else
715 step >>= -oct;
716 sl->stepptr += step;
717 }
718 else
719 sl->stepptr += sl->step;
720
721 if (sl->stepptr >= 0x10000)
722 {
723 sl->sample1 = sl->sample2;
724
725 sl->sample2 = ymf278b_getSample(chip, sl);
726 sl->pos += (sl->stepptr >> 16);
727 sl->stepptr &= 0xFFFF;
728 if (sl->pos > sl->endaddr)
729 sl->pos = sl->pos - sl->endaddr + sl->loopaddr - 1;
730 }
731 }
732 ymf278b_advance(chip);
733 }
734 }
735
ymf278b_keyOnHelper(YMF278BChip * chip,YMF278BSlot * slot)736 INLINE void ymf278b_keyOnHelper(YMF278BChip* chip, YMF278BSlot* slot)
737 {
738 int oct;
739 unsigned int step;
740
741 slot->active = 1;
742
743 oct = slot->OCT;
744 if (oct & 8)
745 oct |= -8;
746 oct += 5;
747 step = slot->FN | 1024;
748 if (oct >= 0)
749 step <<= oct;
750 else
751 step >>= -oct;
752 slot->step = step;
753 slot->state = EG_ATT;
754 slot->stepptr = 0;
755 slot->pos = 0;
756 slot->sample1 = ymf278b_getSample(chip, slot);
757 slot->pos = 1;
758 slot->sample2 = ymf278b_getSample(chip, slot);
759 }
760
ymf278b_A_w(YMF278BChip * chip,UINT8 reg,UINT8 data)761 static void ymf278b_A_w(YMF278BChip *chip, UINT8 reg, UINT8 data)
762 {
763 switch(reg)
764 {
765 case 0x02:
766 //chip->timer_a_count = data;
767 //ymf278b_timer_a_reset(chip);
768 break;
769 case 0x03:
770 //chip->timer_b_count = data;
771 //ymf278b_timer_b_reset(chip);
772 break;
773 case 0x04:
774 /*if(data & 0x80)
775 chip->current_irq = 0;
776 else
777 {
778 UINT8 old_enable = chip->enable;
779 chip->enable = data;
780 chip->current_irq &= ~data;
781 if((old_enable ^ data) & 1)
782 ymf278b_timer_a_reset(chip);
783 if((old_enable ^ data) & 2)
784 ymf278b_timer_b_reset(chip);
785 }
786 ymf278b_irq_check(chip);*/
787 break;
788 default:
789 //#ifdef _DEBUG
790 // logerror("YMF278B: Port A write %02x, %02x\n", reg, data);
791 //#endif
792 ymf262_write(chip->fmchip, 1, data);
793 if ((reg & 0xF0) == 0xB0 && (data & 0x20)) // Key On set
794 chip->FMEnabled = 0x01;
795 else if (reg == 0xBD && (data & 0x1F)) // one of the Rhythm bits set
796 chip->FMEnabled = 0x01;
797 break;
798 }
799 }
800
ymf278b_B_w(YMF278BChip * chip,UINT8 reg,UINT8 data)801 static void ymf278b_B_w(YMF278BChip *chip, UINT8 reg, UINT8 data)
802 {
803 switch(reg)
804 {
805 case 0x05: // OPL3/OPL4 Enable
806 // Bit 1 enables OPL4 WaveTable Synth
807 chip->exp = data;
808 ymf262_write(chip->fmchip, 3, data & ~0x02);
809 break;
810 default:
811 ymf262_write(chip->fmchip, 3, data);
812 if ((reg & 0xF0) == 0xB0 && (data & 0x20))
813 chip->FMEnabled = 0x01;
814 break;
815 }
816 //#ifdef _DEBUG
817 // logerror("YMF278B: Port B write %02x, %02x\n", reg, data);
818 //#endif
819 }
820
ymf278b_C_w(YMF278BChip * chip,UINT8 reg,UINT8 data)821 void ymf278b_C_w(YMF278BChip* chip, UINT8 reg, UINT8 data)
822 {
823 // Handle slot registers specifically
824 if (reg >= 0x08 && reg <= 0xF7)
825 {
826 int snum = (reg - 8) % 24;
827 YMF278BSlot* slot = &chip->slots[snum];
828 int base;
829 UINT8* buf;
830 int oct;
831 unsigned int step;
832
833 switch((reg - 8) / 24)
834 {
835 case 0:
836 //loadTime = time + LOAD_DELAY;
837
838 slot->wave = (slot->wave & 0x100) | data;
839 base = (slot->wave < 384 || ! chip->wavetblhdr) ?
840 (slot->wave * 12) :
841 (chip->wavetblhdr * 0x80000 + ((slot->wave - 384) * 12));
842 buf = ymf278b_readMemAddr(chip, base);
843
844 slot->bits = (buf[0] & 0xC0) >> 6;
845 ymf278b_slot_set_lfo(slot, (buf[7] >> 3) & 7);
846 slot->vib = buf[7] & 7;
847 slot->AR = buf[8] >> 4;
848 slot->D1R = buf[8] & 0xF;
849 slot->DL = dl_tab[buf[9] >> 4];
850 slot->D2R = buf[9] & 0xF;
851 slot->RC = buf[10] >> 4;
852 slot->RR = buf[10] & 0xF;
853 slot->AM = buf[11] & 7;
854 slot->startaddr = buf[2] | (buf[1] << 8) |
855 ((buf[0] & 0x3F) << 16);
856 slot->loopaddr = buf[4] + (buf[3] << 8);
857 slot->endaddr = ((buf[6] + (buf[5] << 8)) ^ 0xFFFF);
858
859 if (chip->regs[reg + 4] & 0x080)
860 ymf278b_keyOnHelper(chip, slot);
861 break;
862 case 1:
863 slot->wave = (slot->wave & 0xFF) | ((data & 0x1) << 8);
864 slot->FN = (slot->FN & 0x380) | (data >> 1);
865
866 oct = slot->OCT;
867 if (oct & 8)
868 oct |= -8;
869 oct += 5;
870 step = slot->FN | 1024;
871 if (oct >= 0)
872 step <<= oct;
873 else
874 step >>= -oct;
875 slot->step = step;
876 break;
877 case 2:
878 slot->FN = (slot->FN & 0x07F) | ((data & 0x07) << 7);
879 slot->PRVB = ((data & 0x08) >> 3);
880 slot->OCT = ((data & 0xF0) >> 4);
881
882 oct = slot->OCT;
883 if (oct & 8)
884 oct |= -8;
885 oct += 5;
886 step = slot->FN | 1024;
887 if (oct >= 0)
888 step <<= oct;
889 else
890 step >>= -oct;
891 slot->step = step;
892 break;
893 case 3:
894 slot->TL = data >> 1;
895 slot->LD = data & 0x1;
896
897 // TODO
898 if (slot->LD) {
899 // directly change volume
900 } else {
901 // interpolate volume
902 }
903 break;
904 case 4:
905 if (data & 0x10)
906 {
907 // output to DO1 pin:
908 // this pin is not used in moonsound
909 // we emulate this by muting the sound
910 slot->pan = 8; // both left/right -inf dB
911 }
912 else
913 slot->pan = data & 0x0F;
914
915 if (data & 0x020)
916 {
917 // LFO reset
918 slot->lfo_active = 0;
919 slot->lfo_cnt = 0;
920 slot->lfo_max = lfo_period[slot->vib];
921 slot->lfo_step = 0;
922 }
923 else
924 {
925 // LFO activate
926 slot->lfo_active = 1;
927 }
928
929 switch (data >> 6)
930 {
931 case 0: // tone off, no damp
932 if (slot->active && (slot->state != EG_REV))
933 slot->state = EG_REL;
934 break;
935 case 2: // tone on, no damp
936 if (! (chip->regs[reg] & 0x080))
937 ymf278b_keyOnHelper(chip, slot);
938 break;
939 case 1: // tone off, damp
940 case 3: // tone on, damp
941 slot->state = EG_DMP;
942 break;
943 }
944 break;
945 case 5:
946 slot->vib = data & 0x7;
947 ymf278b_slot_set_lfo(slot, (data >> 3) & 0x7);
948 break;
949 case 6:
950 slot->AR = data >> 4;
951 slot->D1R = data & 0xF;
952 break;
953 case 7:
954 slot->DL = dl_tab[data >> 4];
955 slot->D2R = data & 0xF;
956 break;
957 case 8:
958 slot->RC = data >> 4;
959 slot->RR = data & 0xF;
960 break;
961 case 9:
962 slot->AM = data & 0x7;
963 break;
964 }
965 }
966 else
967 {
968 // All non-slot registers
969 switch (reg)
970 {
971 case 0x00: // TEST
972 case 0x01:
973 break;
974
975 case 0x02:
976 chip->wavetblhdr = (data >> 2) & 0x7;
977 chip->memmode = data & 1;
978 break;
979
980 case 0x03:
981 chip->memadr = (chip->memadr & 0x00FFFF) | (data << 16);
982 break;
983
984 case 0x04:
985 chip->memadr = (chip->memadr & 0xFF00FF) | (data << 8);
986 break;
987
988 case 0x05:
989 chip->memadr = (chip->memadr & 0xFFFF00) | data;
990 break;
991
992 case 0x06: // memory data
993 //busyTime = time + MEM_WRITE_DELAY;
994 ymf278b_writeMem(chip, chip->memadr, data);
995 chip->memadr = (chip->memadr + 1) & 0xFFFFFF;
996 break;
997
998 case 0xF8:
999 // TODO use these
1000 chip->fm_l = data & 0x7;
1001 chip->fm_r = (data >> 3) & 0x7;
1002 break;
1003
1004 case 0xF9:
1005 chip->pcm_l = data & 0x7;
1006 chip->pcm_r = (data >> 3) & 0x7;
1007 break;
1008 }
1009 }
1010
1011 chip->regs[reg] = data;
1012 }
1013
ymf278b_readReg(YMF278BChip * chip,UINT8 reg)1014 UINT8 ymf278b_readReg(YMF278BChip* chip, UINT8 reg)
1015 {
1016 // no need to call updateStream(time)
1017 UINT8 result;
1018 switch(reg)
1019 {
1020 case 2: // 3 upper bits are device ID
1021 result = (chip->regs[2] & 0x1F) | 0x20;
1022 break;
1023
1024 case 6: // Memory Data Register
1025 //busyTime = time + MEM_READ_DELAY;
1026 result = ymf278b_readMem(chip, chip->memadr);
1027 chip->memadr = (chip->memadr + 1) & 0xFFFFFF;
1028 break;
1029
1030 default:
1031 result = chip->regs[reg];
1032 break;
1033 }
1034
1035 return result;
1036 }
1037
ymf278b_peekReg(YMF278BChip * chip,UINT8 reg)1038 UINT8 ymf278b_peekReg(YMF278BChip* chip, UINT8 reg)
1039 {
1040 UINT8 result;
1041
1042 switch(reg)
1043 {
1044 case 2: // 3 upper bits are device ID
1045 result = (chip->regs[2] & 0x1F) | 0x20;
1046 break;
1047
1048 case 6: // Memory Data Register
1049 result = ymf278b_readMem(chip, chip->memadr);
1050 break;
1051
1052 default:
1053 result = chip->regs[reg];
1054 break;
1055 }
1056 return result;
1057 }
1058
ymf278b_readStatus(YMF278BChip * chip)1059 UINT8 ymf278b_readStatus(YMF278BChip* chip)
1060 {
1061 UINT8 result = 0;
1062 //if (time < busyTime)
1063 // result |= 0x01;
1064 //if (time < loadTime)
1065 // result |= 0x02;
1066 return result;
1067 }
1068
1069 //WRITE8_DEVICE_HANDLER( ymf278b_w )
ymf278b_w(UINT8 ChipID,offs_t offset,UINT8 data)1070 void ymf278b_w(UINT8 ChipID, offs_t offset, UINT8 data)
1071 {
1072 //YMF278BChip *chip = get_safe_token(device);
1073 YMF278BChip *chip = &YMF278BData[ChipID];
1074
1075 switch (offset)
1076 {
1077 case 0:
1078 chip->port_A = data;
1079 ymf262_write(chip->fmchip, offset, data);
1080 break;
1081
1082 case 1:
1083 ymf278b_A_w(chip, chip->port_A, data);
1084 break;
1085
1086 case 2:
1087 chip->port_B = data;
1088 ymf262_write(chip->fmchip, offset, data);
1089 break;
1090
1091 case 3:
1092 ymf278b_B_w(chip, chip->port_B, data);
1093 break;
1094
1095 case 4:
1096 chip->port_C = data;
1097 break;
1098
1099 case 5:
1100 // PCM regs are only accessible if NEW2 is set
1101 if (~chip->exp & 2)
1102 break;
1103
1104 ymf278b_C_w(chip, chip->port_C, data);
1105 break;
1106
1107 default:
1108 #ifdef _DEBUG
1109 logerror("YMF278B: unexpected write at offset %X to ymf278b = %02X\n", offset, data);
1110 #endif
1111 break;
1112 }
1113 }
1114
ymf278b_clearRam(YMF278BChip * chip)1115 void ymf278b_clearRam(YMF278BChip* chip)
1116 {
1117 memset(chip->ram, 0, chip->RAMSize);
1118 }
1119
ymf278b_load_rom(YMF278BChip * chip)1120 static void ymf278b_load_rom(YMF278BChip *chip)
1121 {
1122 const char* ROM_FILENAME = "yrw801.rom";
1123 char* FileName;
1124 FILE* hFile;
1125 size_t RetVal;
1126
1127 if (! ROMFileSize)
1128 {
1129 ROMFileSize = 0x00200000;
1130 ROMFile = (UINT8*)malloc(ROMFileSize);
1131 memset(ROMFile, 0xFF, ROMFileSize);
1132
1133 FileName = FindFile(ROM_FILENAME);
1134 if (FileName != NULL)
1135 {
1136 hFile = fopen(FileName, "rb");
1137 free(FileName);
1138 }
1139 else
1140 {
1141 hFile = NULL;
1142 }
1143 if (hFile != NULL)
1144 {
1145 RetVal = fread(ROMFile, 0x01, ROMFileSize, hFile);
1146 fclose(hFile);
1147 if (RetVal != ROMFileSize)
1148 fprintf(stderr, "Error while reading OPL4 Sample ROM (%s)!\n", ROM_FILENAME);
1149 }
1150 else
1151 {
1152 fprintf(stderr, "Warning! OPL4 Sample ROM (%s) not found!\n", ROM_FILENAME);
1153 }
1154 }
1155
1156 chip->ROMSize = ROMFileSize;
1157 chip->rom = (UINT8*)malloc(chip->ROMSize);
1158 memcpy(chip->rom, ROMFile, chip->ROMSize);
1159
1160 return;
1161 }
1162
ymf278b_init(YMF278BChip * chip,int clock,void (* cb)(int))1163 static int ymf278b_init(YMF278BChip *chip, int clock, void (*cb)(int))
1164 {
1165 int rate;
1166
1167 rate = clock / 768;
1168 //if (((CHIP_SAMPLING_MODE & 0x01) && rate < CHIP_SAMPLE_RATE) ||
1169 // CHIP_SAMPLING_MODE == 0x02)
1170 // rate = CHIP_SAMPLE_RATE;
1171 chip->fmchip = ymf262_init(clock * 8 / 19, rate);
1172 chip->FMEnabled = 0x00;
1173
1174 chip->rom = NULL;
1175 chip->irq_callback = cb;
1176 //chip->timer_a = timer_alloc(device->machine, ymf278b_timer_a_tick, chip);
1177 //chip->timer_b = timer_alloc(device->machine, ymf278b_timer_b_tick, chip);
1178 chip->clock = clock;
1179
1180 ymf278b_load_rom(chip);
1181 chip->RAMSize = 0x00080000;
1182 chip->ram = (UINT8*)malloc(chip->RAMSize);
1183 ymf278b_clearRam(chip);
1184
1185 return rate;
1186 }
1187
1188 //static DEVICE_START( ymf278b )
device_start_ymf278b(UINT8 ChipID,int clock)1189 int device_start_ymf278b(UINT8 ChipID, int clock)
1190 {
1191 static const ymf278b_interface defintrf = { 0 };
1192 const ymf278b_interface *intf;
1193 int i;
1194 YMF278BChip *chip;
1195 int rate;
1196
1197 if (ChipID >= MAX_CHIPS)
1198 return 0;
1199
1200 chip = &YMF278BData[ChipID];
1201
1202 //chip->device = device;
1203 //intf = (device->static_config != NULL) ? (const ymf278b_interface *)device->static_config : &defintrf;
1204 intf = &defintrf;
1205
1206 rate = ymf278b_init(chip, clock, intf->irq_callback);
1207 //chip->stream = stream_create(device, 0, 2, device->clock/768, chip, ymf278b_pcm_update);
1208
1209 chip->memadr = 0; // avoid UMR
1210
1211 // Volume table, 1 = -0.375dB, 8 = -3dB, 256 = -96dB
1212 for (i = 0; i < 256; i ++)
1213 {
1214 int vol_mul = 0x20 - (i & 0x0F); // 0x10 values per 6 db
1215 int vol_shift = 5 + (i >> 4); // approximation: -6 dB == divide by two (shift right)
1216 chip->volume[i] = (0x8000 * vol_mul) >> vol_shift;
1217 }
1218 for (i = 256; i < 256 * 4; i ++)
1219 chip->volume[i] = 0;
1220 for (i = 0; i < 24; i ++)
1221 chip->slots[i].Muted = 0x00;;
1222
1223 return rate;
1224 }
1225
1226 //static DEVICE_STOP( ymf278 )
device_stop_ymf278b(UINT8 ChipID)1227 void device_stop_ymf278b(UINT8 ChipID)
1228 {
1229 YMF278BChip* chip = &YMF278BData[ChipID];
1230
1231 ymf262_shutdown(chip->fmchip);
1232 free(chip->rom); chip->rom = NULL;
1233
1234 return;
1235 }
1236
device_reset_ymf278b(UINT8 ChipID)1237 void device_reset_ymf278b(UINT8 ChipID)
1238 {
1239 YMF278BChip* chip = &YMF278BData[ChipID];
1240 int i;
1241
1242 ymf262_reset_chip(chip->fmchip);
1243 chip->FMEnabled = 0x00;
1244
1245 chip->eg_cnt = 0;
1246
1247 for (i = 0; i < 24; i ++)
1248 ymf278b_slot_reset(&chip->slots[i]);
1249 for (i = 255; i >= 0; i --) // reverse order to avoid UMR
1250 ymf278b_C_w(chip, i, 0);
1251
1252 chip->wavetblhdr = chip->memmode = chip->memadr = 0;
1253 chip->fm_l = chip->fm_r = 3;
1254 chip->pcm_l = chip->pcm_r = 0;
1255 //busyTime = time;
1256 //loadTime = time;
1257 }
1258
ymf278b_write_rom(UINT8 ChipID,offs_t ROMSize,offs_t DataStart,offs_t DataLength,const UINT8 * ROMData)1259 void ymf278b_write_rom(UINT8 ChipID, offs_t ROMSize, offs_t DataStart, offs_t DataLength,
1260 const UINT8* ROMData)
1261 {
1262 YMF278BChip *chip = &YMF278BData[ChipID];
1263
1264 if (chip->ROMSize != ROMSize)
1265 {
1266 chip->rom = (UINT8*)realloc(chip->rom, ROMSize);
1267 chip->ROMSize = ROMSize;
1268 memset(chip->rom, 0xFF, ROMSize);
1269 }
1270 if (DataStart > ROMSize)
1271 return;
1272 if (DataStart + DataLength > ROMSize)
1273 DataLength = ROMSize - DataStart;
1274
1275 memcpy(chip->rom + DataStart, ROMData, DataLength);
1276
1277 return;
1278 }
1279
ymf278b_write_ram(UINT8 ChipID,offs_t DataStart,offs_t DataLength,const UINT8 * RAMData)1280 void ymf278b_write_ram(UINT8 ChipID, offs_t DataStart, offs_t DataLength, const UINT8* RAMData)
1281 {
1282 YMF278BChip *chip = &YMF278BData[ChipID];
1283
1284 if (DataStart >= chip->RAMSize)
1285 return;
1286 if (DataStart + DataLength > chip->RAMSize)
1287 DataLength = chip->RAMSize - DataStart;
1288
1289 memcpy(chip->ram + DataStart, RAMData, DataLength);
1290
1291 return;
1292 }
1293
1294
ymf278b_set_mute_mask(UINT8 ChipID,UINT32 MuteMaskFM,UINT32 MuteMaskWT)1295 void ymf278b_set_mute_mask(UINT8 ChipID, UINT32 MuteMaskFM, UINT32 MuteMaskWT)
1296 {
1297 YMF278BChip *chip = &YMF278BData[ChipID];
1298 UINT8 CurChn;
1299
1300 ymf262_set_mutemask(chip->fmchip, MuteMaskFM);
1301 for (CurChn = 0; CurChn < 24; CurChn ++)
1302 chip->slots[CurChn].Muted = (MuteMaskWT >> CurChn) & 0x01;
1303
1304 return;
1305 }
1306