1|// Low-level VM code for MIPS64 CPUs. 2|// Bytecode interpreter, fast functions and helper functions. 3|// Copyright (C) 2005-2017 Mike Pall. See Copyright Notice in luajit.h 4|// 5|// Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. 6|// Sponsored by Cisco Systems, Inc. 7| 8|.arch mips64 9|.section code_op, code_sub 10| 11|.actionlist build_actionlist 12|.globals GLOB_ 13|.globalnames globnames 14|.externnames extnames 15| 16|// Note: The ragged indentation of the instructions is intentional. 17|// The starting columns indicate data dependencies. 18| 19|//----------------------------------------------------------------------- 20| 21|// Fixed register assignments for the interpreter. 22|// Don't use: r0 = 0, r26/r27 = reserved, r28 = gp, r29 = sp, r31 = ra 23| 24|.macro .FPU, a, b 25|.if FPU 26| a, b 27|.endif 28|.endmacro 29| 30|// The following must be C callee-save (but BASE is often refetched). 31|.define BASE, r16 // Base of current Lua stack frame. 32|.define KBASE, r17 // Constants of current Lua function. 33|.define PC, r18 // Next PC. 34|.define DISPATCH, r19 // Opcode dispatch table. 35|.define LREG, r20 // Register holding lua_State (also in SAVE_L). 36|.define MULTRES, r21 // Size of multi-result: (nresults+1)*8. 37| 38|.define JGL, r30 // On-trace: global_State + 32768. 39| 40|// Constants for type-comparisons, stores and conversions. C callee-save. 41|.define TISNIL, r30 42|.define TISNUM, r22 43|.if FPU 44|.define TOBIT, f30 // 2^52 + 2^51. 45|.endif 46| 47|// The following temporaries are not saved across C calls, except for RA. 48|.define RA, r23 // Callee-save. 49|.define RB, r8 50|.define RC, r9 51|.define RD, r10 52|.define INS, r11 53| 54|.define AT, r1 // Assembler temporary. 55|.define TMP0, r12 56|.define TMP1, r13 57|.define TMP2, r14 58|.define TMP3, r15 59| 60|// MIPS n64 calling convention. 61|.define CFUNCADDR, r25 62|.define CARG1, r4 63|.define CARG2, r5 64|.define CARG3, r6 65|.define CARG4, r7 66|.define CARG5, r8 67|.define CARG6, r9 68|.define CARG7, r10 69|.define CARG8, r11 70| 71|.define CRET1, r2 72|.define CRET2, r3 73| 74|.if FPU 75|.define FARG1, f12 76|.define FARG2, f13 77|.define FARG3, f14 78|.define FARG4, f15 79|.define FARG5, f16 80|.define FARG6, f17 81|.define FARG7, f18 82|.define FARG8, f19 83| 84|.define FRET1, f0 85|.define FRET2, f2 86|.endif 87| 88|// Stack layout while in interpreter. Must match with lj_frame.h. 89|.if FPU // MIPS64 hard-float. 90| 91|.define CFRAME_SPACE, 192 // Delta for sp. 92| 93|//----- 16 byte aligned, <-- sp entering interpreter 94|.define SAVE_ERRF, 188(sp) // 32 bit values. 95|.define SAVE_NRES, 184(sp) 96|.define SAVE_CFRAME, 176(sp) // 64 bit values. 97|.define SAVE_L, 168(sp) 98|.define SAVE_PC, 160(sp) 99|//----- 16 byte aligned 100|.define SAVE_GPR_, 80 // .. 80+10*8: 64 bit GPR saves. 101|.define SAVE_FPR_, 16 // .. 16+8*8: 64 bit FPR saves. 102| 103|.else // MIPS64 soft-float 104| 105|.define CFRAME_SPACE, 128 // Delta for sp. 106| 107|//----- 16 byte aligned, <-- sp entering interpreter 108|.define SAVE_ERRF, 124(sp) // 32 bit values. 109|.define SAVE_NRES, 120(sp) 110|.define SAVE_CFRAME, 112(sp) // 64 bit values. 111|.define SAVE_L, 104(sp) 112|.define SAVE_PC, 96(sp) 113|//----- 16 byte aligned 114|.define SAVE_GPR_, 16 // .. 16+10*8: 64 bit GPR saves. 115| 116|.endif 117| 118|.define TMPX, 8(sp) // Unused by interpreter, temp for JIT code. 119|.define TMPD, 0(sp) 120|//----- 16 byte aligned 121| 122|.define TMPD_OFS, 0 123| 124|.define SAVE_MULTRES, TMPD 125| 126|//----------------------------------------------------------------------- 127| 128|.macro saveregs 129| daddiu sp, sp, -CFRAME_SPACE 130| sd ra, SAVE_GPR_+9*8(sp) 131| sd r30, SAVE_GPR_+8*8(sp) 132| .FPU sdc1 f31, SAVE_FPR_+7*8(sp) 133| sd r23, SAVE_GPR_+7*8(sp) 134| .FPU sdc1 f30, SAVE_FPR_+6*8(sp) 135| sd r22, SAVE_GPR_+6*8(sp) 136| .FPU sdc1 f29, SAVE_FPR_+5*8(sp) 137| sd r21, SAVE_GPR_+5*8(sp) 138| .FPU sdc1 f28, SAVE_FPR_+4*8(sp) 139| sd r20, SAVE_GPR_+4*8(sp) 140| .FPU sdc1 f27, SAVE_FPR_+3*8(sp) 141| sd r19, SAVE_GPR_+3*8(sp) 142| .FPU sdc1 f26, SAVE_FPR_+2*8(sp) 143| sd r18, SAVE_GPR_+2*8(sp) 144| .FPU sdc1 f25, SAVE_FPR_+1*8(sp) 145| sd r17, SAVE_GPR_+1*8(sp) 146| .FPU sdc1 f24, SAVE_FPR_+0*8(sp) 147| sd r16, SAVE_GPR_+0*8(sp) 148|.endmacro 149| 150|.macro restoreregs_ret 151| ld ra, SAVE_GPR_+9*8(sp) 152| ld r30, SAVE_GPR_+8*8(sp) 153| ld r23, SAVE_GPR_+7*8(sp) 154| .FPU ldc1 f31, SAVE_FPR_+7*8(sp) 155| ld r22, SAVE_GPR_+6*8(sp) 156| .FPU ldc1 f30, SAVE_FPR_+6*8(sp) 157| ld r21, SAVE_GPR_+5*8(sp) 158| .FPU ldc1 f29, SAVE_FPR_+5*8(sp) 159| ld r20, SAVE_GPR_+4*8(sp) 160| .FPU ldc1 f28, SAVE_FPR_+4*8(sp) 161| ld r19, SAVE_GPR_+3*8(sp) 162| .FPU ldc1 f27, SAVE_FPR_+3*8(sp) 163| ld r18, SAVE_GPR_+2*8(sp) 164| .FPU ldc1 f26, SAVE_FPR_+2*8(sp) 165| ld r17, SAVE_GPR_+1*8(sp) 166| .FPU ldc1 f25, SAVE_FPR_+1*8(sp) 167| ld r16, SAVE_GPR_+0*8(sp) 168| .FPU ldc1 f24, SAVE_FPR_+0*8(sp) 169| jr ra 170| daddiu sp, sp, CFRAME_SPACE 171|.endmacro 172| 173|// Type definitions. Some of these are only used for documentation. 174|.type L, lua_State, LREG 175|.type GL, global_State 176|.type TVALUE, TValue 177|.type GCOBJ, GCobj 178|.type STR, GCstr 179|.type TAB, GCtab 180|.type LFUNC, GCfuncL 181|.type CFUNC, GCfuncC 182|.type PROTO, GCproto 183|.type UPVAL, GCupval 184|.type NODE, Node 185|.type NARGS8, int 186|.type TRACE, GCtrace 187|.type SBUF, SBuf 188| 189|//----------------------------------------------------------------------- 190| 191|// Trap for not-yet-implemented parts. 192|.macro NYI; .long 0xf0f0f0f0; .endmacro 193| 194|// Macros to mark delay slots. 195|.macro ., a; a; .endmacro 196|.macro ., a,b; a,b; .endmacro 197|.macro ., a,b,c; a,b,c; .endmacro 198|.macro ., a,b,c,d; a,b,c,d; .endmacro 199| 200|.define FRAME_PC, -8 201|.define FRAME_FUNC, -16 202| 203|//----------------------------------------------------------------------- 204| 205|// Endian-specific defines. 206|.if ENDIAN_LE 207|.define HI, 4 208|.define LO, 0 209|.define OFS_RD, 2 210|.define OFS_RA, 1 211|.define OFS_OP, 0 212|.else 213|.define HI, 0 214|.define LO, 4 215|.define OFS_RD, 0 216|.define OFS_RA, 2 217|.define OFS_OP, 3 218|.endif 219| 220|// Instruction decode. 221|.macro decode_OP1, dst, ins; andi dst, ins, 0xff; .endmacro 222|.macro decode_OP8a, dst, ins; andi dst, ins, 0xff; .endmacro 223|.macro decode_OP8b, dst; sll dst, dst, 3; .endmacro 224|.macro decode_RC8a, dst, ins; srl dst, ins, 13; .endmacro 225|.macro decode_RC8b, dst; andi dst, dst, 0x7f8; .endmacro 226|.macro decode_RD4b, dst; sll dst, dst, 2; .endmacro 227|.macro decode_RA8a, dst, ins; srl dst, ins, 5; .endmacro 228|.macro decode_RA8b, dst; andi dst, dst, 0x7f8; .endmacro 229|.macro decode_RB8a, dst, ins; srl dst, ins, 21; .endmacro 230|.macro decode_RB8b, dst; andi dst, dst, 0x7f8; .endmacro 231|.macro decode_RD8a, dst, ins; srl dst, ins, 16; .endmacro 232|.macro decode_RD8b, dst; sll dst, dst, 3; .endmacro 233|.macro decode_RDtoRC8, dst, src; andi dst, src, 0x7f8; .endmacro 234| 235|// Instruction fetch. 236|.macro ins_NEXT1 237| lw INS, 0(PC) 238| daddiu PC, PC, 4 239|.endmacro 240|// Instruction decode+dispatch. 241|.macro ins_NEXT2 242| decode_OP8a TMP1, INS 243| decode_OP8b TMP1 244| daddu TMP0, DISPATCH, TMP1 245| decode_RD8a RD, INS 246| ld AT, 0(TMP0) 247| decode_RA8a RA, INS 248| decode_RD8b RD 249| jr AT 250| decode_RA8b RA 251|.endmacro 252|.macro ins_NEXT 253| ins_NEXT1 254| ins_NEXT2 255|.endmacro 256| 257|// Instruction footer. 258|.if 1 259| // Replicated dispatch. Less unpredictable branches, but higher I-Cache use. 260| .define ins_next, ins_NEXT 261| .define ins_next_, ins_NEXT 262| .define ins_next1, ins_NEXT1 263| .define ins_next2, ins_NEXT2 264|.else 265| // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch. 266| // Affects only certain kinds of benchmarks (and only with -j off). 267| .macro ins_next 268| b ->ins_next 269| .endmacro 270| .macro ins_next1 271| .endmacro 272| .macro ins_next2 273| b ->ins_next 274| .endmacro 275| .macro ins_next_ 276| ->ins_next: 277| ins_NEXT 278| .endmacro 279|.endif 280| 281|// Call decode and dispatch. 282|.macro ins_callt 283| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC 284| ld PC, LFUNC:RB->pc 285| lw INS, 0(PC) 286| daddiu PC, PC, 4 287| decode_OP8a TMP1, INS 288| decode_RA8a RA, INS 289| decode_OP8b TMP1 290| decode_RA8b RA 291| daddu TMP0, DISPATCH, TMP1 292| ld TMP0, 0(TMP0) 293| jr TMP0 294| daddu RA, RA, BASE 295|.endmacro 296| 297|.macro ins_call 298| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, PC = caller PC 299| sd PC, FRAME_PC(BASE) 300| ins_callt 301|.endmacro 302| 303|//----------------------------------------------------------------------- 304| 305|.macro branch_RD 306| srl TMP0, RD, 1 307| lui AT, (-(BCBIAS_J*4 >> 16) & 65535) 308| addu TMP0, TMP0, AT 309| daddu PC, PC, TMP0 310|.endmacro 311| 312|// Assumes DISPATCH is relative to GL. 313#define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field)) 314#define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field)) 315#define GG_DISP2GOT (GG_OFS(got) - GG_OFS(dispatch)) 316#define DISPATCH_GOT(name) (GG_DISP2GOT + sizeof(void*)*LJ_GOT_##name) 317| 318#define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto)) 319| 320|.macro load_got, func 321| ld CFUNCADDR, DISPATCH_GOT(func)(DISPATCH) 322|.endmacro 323|// Much faster. Sadly, there's no easy way to force the required code layout. 324|// .macro call_intern, func; bal extern func; .endmacro 325|.macro call_intern, func; jalr CFUNCADDR; .endmacro 326|.macro call_extern; jalr CFUNCADDR; .endmacro 327|.macro jmp_extern; jr CFUNCADDR; .endmacro 328| 329|.macro hotcheck, delta, target 330| dsrl TMP1, PC, 1 331| andi TMP1, TMP1, 126 332| daddu TMP1, TMP1, DISPATCH 333| lhu TMP2, GG_DISP2HOT(TMP1) 334| addiu TMP2, TMP2, -delta 335| bltz TMP2, target 336|. sh TMP2, GG_DISP2HOT(TMP1) 337|.endmacro 338| 339|.macro hotloop 340| hotcheck HOTCOUNT_LOOP, ->vm_hotloop 341|.endmacro 342| 343|.macro hotcall 344| hotcheck HOTCOUNT_CALL, ->vm_hotcall 345|.endmacro 346| 347|// Set current VM state. Uses TMP0. 348|.macro li_vmstate, st; li TMP0, ~LJ_VMST_..st; .endmacro 349|.macro st_vmstate; sw TMP0, DISPATCH_GL(vmstate)(DISPATCH); .endmacro 350| 351|// Move table write barrier back. Overwrites mark and tmp. 352|.macro barrierback, tab, mark, tmp, target 353| ld tmp, DISPATCH_GL(gc.grayagain)(DISPATCH) 354| andi mark, mark, ~LJ_GC_BLACK & 255 // black2gray(tab) 355| sd tab, DISPATCH_GL(gc.grayagain)(DISPATCH) 356| sb mark, tab->marked 357| b target 358|. sd tmp, tab->gclist 359|.endmacro 360| 361|// Clear type tag. Isolate lowest 14+32+1=47 bits of reg. 362|.macro cleartp, reg; dextm reg, reg, 0, 14; .endmacro 363|.macro cleartp, dst, reg; dextm dst, reg, 0, 14; .endmacro 364| 365|// Set type tag: Merge 17 type bits into bits [15+32=47, 31+32+1=64) of dst. 366|.macro settp, dst, tp; dinsu dst, tp, 15, 31; .endmacro 367| 368|// Extract (negative) type tag. 369|.macro gettp, dst, src; dsra dst, src, 47; .endmacro 370| 371|// Macros to check the TValue type and extract the GCobj. Branch on failure. 372|.macro checktp, reg, tp, target 373| gettp AT, reg 374| daddiu AT, AT, tp 375| bnez AT, target 376|. cleartp reg 377|.endmacro 378|.macro checktp, dst, reg, tp, target 379| gettp AT, reg 380| daddiu AT, AT, tp 381| bnez AT, target 382|. cleartp dst, reg 383|.endmacro 384|.macro checkstr, reg, target; checktp reg, -LJ_TSTR, target; .endmacro 385|.macro checktab, reg, target; checktp reg, -LJ_TTAB, target; .endmacro 386|.macro checkfunc, reg, target; checktp reg, -LJ_TFUNC, target; .endmacro 387|.macro checkint, reg, target // Caveat: has delay slot! 388| gettp AT, reg 389| bne AT, TISNUM, target 390|.endmacro 391|.macro checknum, reg, target // Caveat: has delay slot! 392| gettp AT, reg 393| sltiu AT, AT, LJ_TISNUM 394| beqz AT, target 395|.endmacro 396| 397|.macro mov_false, reg 398| lu reg, 0x8000 399| dsll reg, reg, 32 400| not reg, reg 401|.endmacro 402|.macro mov_true, reg 403| li reg, 0x0001 404| dsll reg, reg, 48 405| not reg, reg 406|.endmacro 407| 408|//----------------------------------------------------------------------- 409 410/* Generate subroutines used by opcodes and other parts of the VM. */ 411/* The .code_sub section should be last to help static branch prediction. */ 412static void build_subroutines(BuildCtx *ctx) 413{ 414 |.code_sub 415 | 416 |//----------------------------------------------------------------------- 417 |//-- Return handling ---------------------------------------------------- 418 |//----------------------------------------------------------------------- 419 | 420 |->vm_returnp: 421 | // See vm_return. Also: TMP2 = previous base. 422 | andi AT, PC, FRAME_P 423 | beqz AT, ->cont_dispatch 424 | 425 | // Return from pcall or xpcall fast func. 426 |. mov_true TMP1 427 | ld PC, FRAME_PC(TMP2) // Fetch PC of previous frame. 428 | move BASE, TMP2 // Restore caller base. 429 | // Prepending may overwrite the pcall frame, so do it at the end. 430 | sd TMP1, -8(RA) // Prepend true to results. 431 | daddiu RA, RA, -8 432 | 433 |->vm_returnc: 434 | addiu RD, RD, 8 // RD = (nresults+1)*8. 435 | andi TMP0, PC, FRAME_TYPE 436 | beqz RD, ->vm_unwind_c_eh 437 |. li CRET1, LUA_YIELD 438 | beqz TMP0, ->BC_RET_Z // Handle regular return to Lua. 439 |. move MULTRES, RD 440 | 441 |->vm_return: 442 | // BASE = base, RA = resultptr, RD/MULTRES = (nresults+1)*8, PC = return 443 | // TMP0 = PC & FRAME_TYPE 444 | li TMP2, -8 445 | xori AT, TMP0, FRAME_C 446 | and TMP2, PC, TMP2 447 | bnez AT, ->vm_returnp 448 | dsubu TMP2, BASE, TMP2 // TMP2 = previous base. 449 | 450 | addiu TMP1, RD, -8 451 | sd TMP2, L->base 452 | li_vmstate C 453 | lw TMP2, SAVE_NRES 454 | daddiu BASE, BASE, -16 455 | st_vmstate 456 | beqz TMP1, >2 457 |. sll TMP2, TMP2, 3 458 |1: 459 | addiu TMP1, TMP1, -8 460 | ld CRET1, 0(RA) 461 | daddiu RA, RA, 8 462 | sd CRET1, 0(BASE) 463 | bnez TMP1, <1 464 |. daddiu BASE, BASE, 8 465 | 466 |2: 467 | bne TMP2, RD, >6 468 |3: 469 |. sd BASE, L->top // Store new top. 470 | 471 |->vm_leave_cp: 472 | ld TMP0, SAVE_CFRAME // Restore previous C frame. 473 | move CRET1, r0 // Ok return status for vm_pcall. 474 | sd TMP0, L->cframe 475 | 476 |->vm_leave_unw: 477 | restoreregs_ret 478 | 479 |6: 480 | ld TMP1, L->maxstack 481 | slt AT, TMP2, RD 482 | bnez AT, >7 // Less results wanted? 483 | // More results wanted. Check stack size and fill up results with nil. 484 |. slt AT, BASE, TMP1 485 | beqz AT, >8 486 |. nop 487 | sd TISNIL, 0(BASE) 488 | addiu RD, RD, 8 489 | b <2 490 |. daddiu BASE, BASE, 8 491 | 492 |7: // Less results wanted. 493 | subu TMP0, RD, TMP2 494 | dsubu TMP0, BASE, TMP0 // Either keep top or shrink it. 495 | b <3 496 |. movn BASE, TMP0, TMP2 // LUA_MULTRET+1 case? 497 | 498 |8: // Corner case: need to grow stack for filling up results. 499 | // This can happen if: 500 | // - A C function grows the stack (a lot). 501 | // - The GC shrinks the stack in between. 502 | // - A return back from a lua_call() with (high) nresults adjustment. 503 | load_got lj_state_growstack 504 | move MULTRES, RD 505 | srl CARG2, TMP2, 3 506 | call_intern lj_state_growstack // (lua_State *L, int n) 507 |. move CARG1, L 508 | lw TMP2, SAVE_NRES 509 | ld BASE, L->top // Need the (realloced) L->top in BASE. 510 | move RD, MULTRES 511 | b <2 512 |. sll TMP2, TMP2, 3 513 | 514 |->vm_unwind_c: // Unwind C stack, return from vm_pcall. 515 | // (void *cframe, int errcode) 516 | move sp, CARG1 517 | move CRET1, CARG2 518 |->vm_unwind_c_eh: // Landing pad for external unwinder. 519 | ld L, SAVE_L 520 | li TMP0, ~LJ_VMST_C 521 | ld GL:TMP1, L->glref 522 | b ->vm_leave_unw 523 |. sw TMP0, GL:TMP1->vmstate 524 | 525 |->vm_unwind_ff: // Unwind C stack, return from ff pcall. 526 | // (void *cframe) 527 | li AT, -4 528 | and sp, CARG1, AT 529 |->vm_unwind_ff_eh: // Landing pad for external unwinder. 530 | ld L, SAVE_L 531 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). 532 | li TISNIL, LJ_TNIL 533 | li TISNUM, LJ_TISNUM 534 | ld BASE, L->base 535 | ld DISPATCH, L->glref // Setup pointer to dispatch table. 536 | .FPU mtc1 TMP3, TOBIT 537 | mov_false TMP1 538 | li_vmstate INTERP 539 | ld PC, FRAME_PC(BASE) // Fetch PC of previous frame. 540 | .FPU cvt.d.s TOBIT, TOBIT 541 | daddiu RA, BASE, -8 // Results start at BASE-8. 542 | daddiu DISPATCH, DISPATCH, GG_G2DISP 543 | sd TMP1, 0(RA) // Prepend false to error message. 544 | st_vmstate 545 | b ->vm_returnc 546 |. li RD, 16 // 2 results: false + error message. 547 | 548 |//----------------------------------------------------------------------- 549 |//-- Grow stack for calls ----------------------------------------------- 550 |//----------------------------------------------------------------------- 551 | 552 |->vm_growstack_c: // Grow stack for C function. 553 | b >2 554 |. li CARG2, LUA_MINSTACK 555 | 556 |->vm_growstack_l: // Grow stack for Lua function. 557 | // BASE = new base, RA = BASE+framesize*8, RC = nargs*8, PC = first PC 558 | daddu RC, BASE, RC 559 | dsubu RA, RA, BASE 560 | sd BASE, L->base 561 | daddiu PC, PC, 4 // Must point after first instruction. 562 | sd RC, L->top 563 | srl CARG2, RA, 3 564 |2: 565 | // L->base = new base, L->top = top 566 | load_got lj_state_growstack 567 | sd PC, SAVE_PC 568 | call_intern lj_state_growstack // (lua_State *L, int n) 569 |. move CARG1, L 570 | ld BASE, L->base 571 | ld RC, L->top 572 | ld LFUNC:RB, FRAME_FUNC(BASE) 573 | dsubu RC, RC, BASE 574 | cleartp LFUNC:RB 575 | // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC 576 | ins_callt // Just retry the call. 577 | 578 |//----------------------------------------------------------------------- 579 |//-- Entry points into the assembler VM --------------------------------- 580 |//----------------------------------------------------------------------- 581 | 582 |->vm_resume: // Setup C frame and resume thread. 583 | // (lua_State *L, TValue *base, int nres1 = 0, ptrdiff_t ef = 0) 584 | saveregs 585 | move L, CARG1 586 | ld DISPATCH, L->glref // Setup pointer to dispatch table. 587 | move BASE, CARG2 588 | lbu TMP1, L->status 589 | sd L, SAVE_L 590 | li PC, FRAME_CP 591 | daddiu TMP0, sp, CFRAME_RESUME 592 | daddiu DISPATCH, DISPATCH, GG_G2DISP 593 | sw r0, SAVE_NRES 594 | sw r0, SAVE_ERRF 595 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok. 596 | sd r0, SAVE_CFRAME 597 | beqz TMP1, >3 598 |. sd TMP0, L->cframe 599 | 600 | // Resume after yield (like a return). 601 | sd L, DISPATCH_GL(cur_L)(DISPATCH) 602 | move RA, BASE 603 | ld BASE, L->base 604 | ld TMP1, L->top 605 | ld PC, FRAME_PC(BASE) 606 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). 607 | dsubu RD, TMP1, BASE 608 | .FPU mtc1 TMP3, TOBIT 609 | sb r0, L->status 610 | .FPU cvt.d.s TOBIT, TOBIT 611 | li_vmstate INTERP 612 | daddiu RD, RD, 8 613 | st_vmstate 614 | move MULTRES, RD 615 | andi TMP0, PC, FRAME_TYPE 616 | li TISNIL, LJ_TNIL 617 | beqz TMP0, ->BC_RET_Z 618 |. li TISNUM, LJ_TISNUM 619 | b ->vm_return 620 |. nop 621 | 622 |->vm_pcall: // Setup protected C frame and enter VM. 623 | // (lua_State *L, TValue *base, int nres1, ptrdiff_t ef) 624 | saveregs 625 | sw CARG4, SAVE_ERRF 626 | b >1 627 |. li PC, FRAME_CP 628 | 629 |->vm_call: // Setup C frame and enter VM. 630 | // (lua_State *L, TValue *base, int nres1) 631 | saveregs 632 | li PC, FRAME_C 633 | 634 |1: // Entry point for vm_pcall above (PC = ftype). 635 | ld TMP1, L:CARG1->cframe 636 | move L, CARG1 637 | sw CARG3, SAVE_NRES 638 | ld DISPATCH, L->glref // Setup pointer to dispatch table. 639 | sd CARG1, SAVE_L 640 | move BASE, CARG2 641 | daddiu DISPATCH, DISPATCH, GG_G2DISP 642 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok. 643 | sd TMP1, SAVE_CFRAME 644 | sd sp, L->cframe // Add our C frame to cframe chain. 645 | 646 |3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype). 647 | sd L, DISPATCH_GL(cur_L)(DISPATCH) 648 | ld TMP2, L->base // TMP2 = old base (used in vmeta_call). 649 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). 650 | ld TMP1, L->top 651 | .FPU mtc1 TMP3, TOBIT 652 | daddu PC, PC, BASE 653 | dsubu NARGS8:RC, TMP1, BASE 654 | li TISNUM, LJ_TISNUM 655 | dsubu PC, PC, TMP2 // PC = frame delta + frame type 656 | .FPU cvt.d.s TOBIT, TOBIT 657 | li_vmstate INTERP 658 | li TISNIL, LJ_TNIL 659 | st_vmstate 660 | 661 |->vm_call_dispatch: 662 | // TMP2 = old base, BASE = new base, RC = nargs*8, PC = caller PC 663 | ld LFUNC:RB, FRAME_FUNC(BASE) 664 | checkfunc LFUNC:RB, ->vmeta_call 665 | 666 |->vm_call_dispatch_f: 667 | ins_call 668 | // BASE = new base, RB = func, RC = nargs*8, PC = caller PC 669 | 670 |->vm_cpcall: // Setup protected C frame, call C. 671 | // (lua_State *L, lua_CFunction func, void *ud, lua_CPFunction cp) 672 | saveregs 673 | move L, CARG1 674 | ld TMP0, L:CARG1->stack 675 | sd CARG1, SAVE_L 676 | ld TMP1, L->top 677 | ld DISPATCH, L->glref // Setup pointer to dispatch table. 678 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok. 679 | dsubu TMP0, TMP0, TMP1 // Compute -savestack(L, L->top). 680 | ld TMP1, L->cframe 681 | daddiu DISPATCH, DISPATCH, GG_G2DISP 682 | sw TMP0, SAVE_NRES // Neg. delta means cframe w/o frame. 683 | sw r0, SAVE_ERRF // No error function. 684 | sd TMP1, SAVE_CFRAME 685 | sd sp, L->cframe // Add our C frame to cframe chain. 686 | sd L, DISPATCH_GL(cur_L)(DISPATCH) 687 | jalr CARG4 // (lua_State *L, lua_CFunction func, void *ud) 688 |. move CFUNCADDR, CARG4 689 | move BASE, CRET1 690 | bnez CRET1, <3 // Else continue with the call. 691 |. li PC, FRAME_CP 692 | b ->vm_leave_cp // No base? Just remove C frame. 693 |. nop 694 | 695 |//----------------------------------------------------------------------- 696 |//-- Metamethod handling ------------------------------------------------ 697 |//----------------------------------------------------------------------- 698 | 699 |// The lj_meta_* functions (except for lj_meta_cat) don't reallocate the 700 |// stack, so BASE doesn't need to be reloaded across these calls. 701 | 702 |//-- Continuation dispatch ---------------------------------------------- 703 | 704 |->cont_dispatch: 705 | // BASE = meta base, RA = resultptr, RD = (nresults+1)*8 706 | ld TMP0, -32(BASE) // Continuation. 707 | move RB, BASE 708 | move BASE, TMP2 // Restore caller BASE. 709 | ld LFUNC:TMP1, FRAME_FUNC(TMP2) 710 |.if FFI 711 | sltiu AT, TMP0, 2 712 |.endif 713 | ld PC, -24(RB) // Restore PC from [cont|PC]. 714 | cleartp LFUNC:TMP1 715 | daddu TMP2, RA, RD 716 | ld TMP1, LFUNC:TMP1->pc 717 |.if FFI 718 | bnez AT, >1 719 |.endif 720 |. sd TISNIL, -8(TMP2) // Ensure one valid arg. 721 | // BASE = base, RA = resultptr, RB = meta base 722 | jr TMP0 // Jump to continuation. 723 |. ld KBASE, PC2PROTO(k)(TMP1) 724 | 725 |.if FFI 726 |1: 727 | bnez TMP0, ->cont_ffi_callback // cont = 1: return from FFI callback. 728 | // cont = 0: tailcall from C function. 729 |. daddiu TMP1, RB, -32 730 | b ->vm_call_tail 731 |. dsubu RC, TMP1, BASE 732 |.endif 733 | 734 |->cont_cat: // RA = resultptr, RB = meta base 735 | lw INS, -4(PC) 736 | daddiu CARG2, RB, -32 737 | ld CRET1, 0(RA) 738 | decode_RB8a MULTRES, INS 739 | decode_RA8a RA, INS 740 | decode_RB8b MULTRES 741 | decode_RA8b RA 742 | daddu TMP1, BASE, MULTRES 743 | sd BASE, L->base 744 | dsubu CARG3, CARG2, TMP1 745 | bne TMP1, CARG2, ->BC_CAT_Z 746 |. sd CRET1, 0(CARG2) 747 | daddu RA, BASE, RA 748 | b ->cont_nop 749 |. sd CRET1, 0(RA) 750 | 751 |//-- Table indexing metamethods ----------------------------------------- 752 | 753 |->vmeta_tgets1: 754 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv) 755 | li TMP0, LJ_TSTR 756 | settp STR:RC, TMP0 757 | b >1 758 |. sd STR:RC, 0(CARG3) 759 | 760 |->vmeta_tgets: 761 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv) 762 | li TMP0, LJ_TTAB 763 | li TMP1, LJ_TSTR 764 | settp TAB:RB, TMP0 765 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2) 766 | sd TAB:RB, 0(CARG2) 767 | settp STR:RC, TMP1 768 | b >1 769 |. sd STR:RC, 0(CARG3) 770 | 771 |->vmeta_tgetb: // TMP0 = index 772 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv) 773 | settp TMP0, TISNUM 774 | sd TMP0, 0(CARG3) 775 | 776 |->vmeta_tgetv: 777 |1: 778 | load_got lj_meta_tget 779 | sd BASE, L->base 780 | sd PC, SAVE_PC 781 | call_intern lj_meta_tget // (lua_State *L, TValue *o, TValue *k) 782 |. move CARG1, L 783 | // Returns TValue * (finished) or NULL (metamethod). 784 | beqz CRET1, >3 785 |. daddiu TMP1, BASE, -FRAME_CONT 786 | ld CARG1, 0(CRET1) 787 | ins_next1 788 | sd CARG1, 0(RA) 789 | ins_next2 790 | 791 |3: // Call __index metamethod. 792 | // BASE = base, L->top = new base, stack = cont/func/t/k 793 | ld BASE, L->top 794 | sd PC, -24(BASE) // [cont|PC] 795 | dsubu PC, BASE, TMP1 796 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here. 797 | cleartp LFUNC:RB 798 | b ->vm_call_dispatch_f 799 |. li NARGS8:RC, 16 // 2 args for func(t, k). 800 | 801 |->vmeta_tgetr: 802 | load_got lj_tab_getinth 803 | call_intern lj_tab_getinth // (GCtab *t, int32_t key) 804 |. nop 805 | // Returns cTValue * or NULL. 806 | beqz CRET1, ->BC_TGETR_Z 807 |. move CARG2, TISNIL 808 | b ->BC_TGETR_Z 809 |. ld CARG2, 0(CRET1) 810 | 811 |//----------------------------------------------------------------------- 812 | 813 |->vmeta_tsets1: 814 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv) 815 | li TMP0, LJ_TSTR 816 | settp STR:RC, TMP0 817 | b >1 818 |. sd STR:RC, 0(CARG3) 819 | 820 |->vmeta_tsets: 821 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv) 822 | li TMP0, LJ_TTAB 823 | li TMP1, LJ_TSTR 824 | settp TAB:RB, TMP0 825 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2) 826 | sd TAB:RB, 0(CARG2) 827 | settp STR:RC, TMP1 828 | b >1 829 |. sd STR:RC, 0(CARG3) 830 | 831 |->vmeta_tsetb: // TMP0 = index 832 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv) 833 | settp TMP0, TISNUM 834 | sd TMP0, 0(CARG3) 835 | 836 |->vmeta_tsetv: 837 |1: 838 | load_got lj_meta_tset 839 | sd BASE, L->base 840 | sd PC, SAVE_PC 841 | call_intern lj_meta_tset // (lua_State *L, TValue *o, TValue *k) 842 |. move CARG1, L 843 | // Returns TValue * (finished) or NULL (metamethod). 844 | beqz CRET1, >3 845 |. ld CARG1, 0(RA) 846 | // NOBARRIER: lj_meta_tset ensures the table is not black. 847 | ins_next1 848 | sd CARG1, 0(CRET1) 849 | ins_next2 850 | 851 |3: // Call __newindex metamethod. 852 | // BASE = base, L->top = new base, stack = cont/func/t/k/(v) 853 | daddiu TMP1, BASE, -FRAME_CONT 854 | ld BASE, L->top 855 | sd PC, -24(BASE) // [cont|PC] 856 | dsubu PC, BASE, TMP1 857 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here. 858 | cleartp LFUNC:RB 859 | sd CARG1, 16(BASE) // Copy value to third argument. 860 | b ->vm_call_dispatch_f 861 |. li NARGS8:RC, 24 // 3 args for func(t, k, v) 862 | 863 |->vmeta_tsetr: 864 | load_got lj_tab_setinth 865 | sd BASE, L->base 866 | sd PC, SAVE_PC 867 | call_intern lj_tab_setinth // (lua_State *L, GCtab *t, int32_t key) 868 |. move CARG1, L 869 | // Returns TValue *. 870 | b ->BC_TSETR_Z 871 |. nop 872 | 873 |//-- Comparison metamethods --------------------------------------------- 874 | 875 |->vmeta_comp: 876 | // RA/RD point to o1/o2. 877 | move CARG2, RA 878 | move CARG3, RD 879 | load_got lj_meta_comp 880 | daddiu PC, PC, -4 881 | sd BASE, L->base 882 | sd PC, SAVE_PC 883 | decode_OP1 CARG4, INS 884 | call_intern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op) 885 |. move CARG1, L 886 | // Returns 0/1 or TValue * (metamethod). 887 |3: 888 | sltiu AT, CRET1, 2 889 | beqz AT, ->vmeta_binop 890 | negu TMP2, CRET1 891 |4: 892 | lhu RD, OFS_RD(PC) 893 | daddiu PC, PC, 4 894 | lui TMP1, (-(BCBIAS_J*4 >> 16) & 65535) 895 | sll RD, RD, 2 896 | addu RD, RD, TMP1 897 | and RD, RD, TMP2 898 | daddu PC, PC, RD 899 |->cont_nop: 900 | ins_next 901 | 902 |->cont_ra: // RA = resultptr 903 | lbu TMP1, -4+OFS_RA(PC) 904 | ld CRET1, 0(RA) 905 | sll TMP1, TMP1, 3 906 | daddu TMP1, BASE, TMP1 907 | b ->cont_nop 908 |. sd CRET1, 0(TMP1) 909 | 910 |->cont_condt: // RA = resultptr 911 | ld TMP0, 0(RA) 912 | gettp TMP0, TMP0 913 | sltiu AT, TMP0, LJ_TISTRUECOND 914 | b <4 915 |. negu TMP2, AT // Branch if result is true. 916 | 917 |->cont_condf: // RA = resultptr 918 | ld TMP0, 0(RA) 919 | gettp TMP0, TMP0 920 | sltiu AT, TMP0, LJ_TISTRUECOND 921 | b <4 922 |. addiu TMP2, AT, -1 // Branch if result is false. 923 | 924 |->vmeta_equal: 925 | // CARG1/CARG2 point to o1/o2. TMP0 is set to 0/1. 926 | load_got lj_meta_equal 927 | cleartp LFUNC:CARG3, CARG2 928 | cleartp LFUNC:CARG2, CARG1 929 | move CARG4, TMP0 930 | daddiu PC, PC, -4 931 | sd BASE, L->base 932 | sd PC, SAVE_PC 933 | call_intern lj_meta_equal // (lua_State *L, GCobj *o1, *o2, int ne) 934 |. move CARG1, L 935 | // Returns 0/1 or TValue * (metamethod). 936 | b <3 937 |. nop 938 | 939 |->vmeta_equal_cd: 940 |.if FFI 941 | load_got lj_meta_equal_cd 942 | move CARG2, INS 943 | daddiu PC, PC, -4 944 | sd BASE, L->base 945 | sd PC, SAVE_PC 946 | call_intern lj_meta_equal_cd // (lua_State *L, BCIns op) 947 |. move CARG1, L 948 | // Returns 0/1 or TValue * (metamethod). 949 | b <3 950 |. nop 951 |.endif 952 | 953 |->vmeta_istype: 954 | load_got lj_meta_istype 955 | daddiu PC, PC, -4 956 | sd BASE, L->base 957 | srl CARG2, RA, 3 958 | srl CARG3, RD, 3 959 | sd PC, SAVE_PC 960 | call_intern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp) 961 |. move CARG1, L 962 | b ->cont_nop 963 |. nop 964 | 965 |//-- Arithmetic metamethods --------------------------------------------- 966 | 967 |->vmeta_unm: 968 | move RC, RB 969 | 970 |->vmeta_arith: 971 | load_got lj_meta_arith 972 | sd BASE, L->base 973 | move CARG2, RA 974 | sd PC, SAVE_PC 975 | move CARG3, RB 976 | move CARG4, RC 977 | decode_OP1 CARG5, INS // CARG5 == RB. 978 | call_intern lj_meta_arith // (lua_State *L, TValue *ra,*rb,*rc, BCReg op) 979 |. move CARG1, L 980 | // Returns NULL (finished) or TValue * (metamethod). 981 | beqz CRET1, ->cont_nop 982 |. nop 983 | 984 | // Call metamethod for binary op. 985 |->vmeta_binop: 986 | // BASE = old base, CRET1 = new base, stack = cont/func/o1/o2 987 | dsubu TMP1, CRET1, BASE 988 | sd PC, -24(CRET1) // [cont|PC] 989 | move TMP2, BASE 990 | daddiu PC, TMP1, FRAME_CONT 991 | move BASE, CRET1 992 | b ->vm_call_dispatch 993 |. li NARGS8:RC, 16 // 2 args for func(o1, o2). 994 | 995 |->vmeta_len: 996 | // CARG2 already set by BC_LEN. 997#if LJ_52 998 | move MULTRES, CARG1 999#endif 1000 | load_got lj_meta_len 1001 | sd BASE, L->base 1002 | sd PC, SAVE_PC 1003 | call_intern lj_meta_len // (lua_State *L, TValue *o) 1004 |. move CARG1, L 1005 | // Returns NULL (retry) or TValue * (metamethod base). 1006#if LJ_52 1007 | bnez CRET1, ->vmeta_binop // Binop call for compatibility. 1008 |. nop 1009 | b ->BC_LEN_Z 1010 |. move CARG1, MULTRES 1011#else 1012 | b ->vmeta_binop // Binop call for compatibility. 1013 |. nop 1014#endif 1015 | 1016 |//-- Call metamethod ---------------------------------------------------- 1017 | 1018 |->vmeta_call: // Resolve and call __call metamethod. 1019 | // TMP2 = old base, BASE = new base, RC = nargs*8 1020 | load_got lj_meta_call 1021 | sd TMP2, L->base // This is the callers base! 1022 | daddiu CARG2, BASE, -16 1023 | sd PC, SAVE_PC 1024 | daddu CARG3, BASE, RC 1025 | move MULTRES, NARGS8:RC 1026 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top) 1027 |. move CARG1, L 1028 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here. 1029 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now. 1030 | cleartp LFUNC:RB 1031 | ins_call 1032 | 1033 |->vmeta_callt: // Resolve __call for BC_CALLT. 1034 | // BASE = old base, RA = new base, RC = nargs*8 1035 | load_got lj_meta_call 1036 | sd BASE, L->base 1037 | daddiu CARG2, RA, -16 1038 | sd PC, SAVE_PC 1039 | daddu CARG3, RA, RC 1040 | move MULTRES, NARGS8:RC 1041 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top) 1042 |. move CARG1, L 1043 | ld RB, FRAME_FUNC(RA) // Guaranteed to be a function here. 1044 | ld TMP1, FRAME_PC(BASE) 1045 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now. 1046 | b ->BC_CALLT_Z 1047 |. cleartp LFUNC:CARG3, RB 1048 | 1049 |//-- Argument coercion for 'for' statement ------------------------------ 1050 | 1051 |->vmeta_for: 1052 | load_got lj_meta_for 1053 | sd BASE, L->base 1054 | move CARG2, RA 1055 | sd PC, SAVE_PC 1056 | move MULTRES, INS 1057 | call_intern lj_meta_for // (lua_State *L, TValue *base) 1058 |. move CARG1, L 1059 |.if JIT 1060 | decode_OP1 TMP0, MULTRES 1061 | li AT, BC_JFORI 1062 |.endif 1063 | decode_RA8a RA, MULTRES 1064 | decode_RD8a RD, MULTRES 1065 | decode_RA8b RA 1066 |.if JIT 1067 | beq TMP0, AT, =>BC_JFORI 1068 |. decode_RD8b RD 1069 | b =>BC_FORI 1070 |. nop 1071 |.else 1072 | b =>BC_FORI 1073 |. decode_RD8b RD 1074 |.endif 1075 | 1076 |//----------------------------------------------------------------------- 1077 |//-- Fast functions ----------------------------------------------------- 1078 |//----------------------------------------------------------------------- 1079 | 1080 |.macro .ffunc, name 1081 |->ff_ .. name: 1082 |.endmacro 1083 | 1084 |.macro .ffunc_1, name 1085 |->ff_ .. name: 1086 | beqz NARGS8:RC, ->fff_fallback 1087 |. ld CARG1, 0(BASE) 1088 |.endmacro 1089 | 1090 |.macro .ffunc_2, name 1091 |->ff_ .. name: 1092 | sltiu AT, NARGS8:RC, 16 1093 | ld CARG1, 0(BASE) 1094 | bnez AT, ->fff_fallback 1095 |. ld CARG2, 8(BASE) 1096 |.endmacro 1097 | 1098 |.macro .ffunc_n, name // Caveat: has delay slot! 1099 |->ff_ .. name: 1100 | ld CARG1, 0(BASE) 1101 | beqz NARGS8:RC, ->fff_fallback 1102 | // Either ldc1 or the 1st instruction of checknum is in the delay slot. 1103 | .FPU ldc1 FARG1, 0(BASE) 1104 | checknum CARG1, ->fff_fallback 1105 |.endmacro 1106 | 1107 |.macro .ffunc_nn, name // Caveat: has delay slot! 1108 |->ff_ .. name: 1109 | ld CARG1, 0(BASE) 1110 | sltiu AT, NARGS8:RC, 16 1111 | ld CARG2, 8(BASE) 1112 | bnez AT, ->fff_fallback 1113 |. gettp TMP0, CARG1 1114 | gettp TMP1, CARG2 1115 | sltiu TMP0, TMP0, LJ_TISNUM 1116 | sltiu TMP1, TMP1, LJ_TISNUM 1117 | .FPU ldc1 FARG1, 0(BASE) 1118 | and TMP0, TMP0, TMP1 1119 | .FPU ldc1 FARG2, 8(BASE) 1120 | beqz TMP0, ->fff_fallback 1121 |.endmacro 1122 | 1123 |// Inlined GC threshold check. Caveat: uses TMP0 and TMP1 and has delay slot! 1124 |.macro ffgccheck 1125 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH) 1126 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH) 1127 | dsubu AT, TMP0, TMP1 1128 | bgezal AT, ->fff_gcstep 1129 |.endmacro 1130 | 1131 |//-- Base library: checks ----------------------------------------------- 1132 |.ffunc_1 assert 1133 | gettp AT, CARG1 1134 | sltiu AT, AT, LJ_TISTRUECOND 1135 | beqz AT, ->fff_fallback 1136 |. daddiu RA, BASE, -16 1137 | ld PC, FRAME_PC(BASE) 1138 | addiu RD, NARGS8:RC, 8 // Compute (nresults+1)*8. 1139 | daddu TMP2, RA, RD 1140 | daddiu TMP1, BASE, 8 1141 | beq BASE, TMP2, ->fff_res // Done if exactly 1 argument. 1142 |. sd CARG1, 0(RA) 1143 |1: 1144 | ld CRET1, 0(TMP1) 1145 | sd CRET1, -16(TMP1) 1146 | bne TMP1, TMP2, <1 1147 |. daddiu TMP1, TMP1, 8 1148 | b ->fff_res 1149 |. nop 1150 | 1151 |.ffunc_1 type 1152 | gettp TMP0, CARG1 1153 | sltu TMP1, TISNUM, TMP0 1154 | not TMP2, TMP0 1155 | li TMP3, ~LJ_TISNUM 1156 | movz TMP2, TMP3, TMP1 1157 | dsll TMP2, TMP2, 3 1158 | daddu TMP2, CFUNC:RB, TMP2 1159 | b ->fff_restv 1160 |. ld CARG1, CFUNC:TMP2->upvalue 1161 | 1162 |//-- Base library: getters and setters --------------------------------- 1163 | 1164 |.ffunc_1 getmetatable 1165 | gettp TMP2, CARG1 1166 | daddiu TMP0, TMP2, -LJ_TTAB 1167 | daddiu TMP1, TMP2, -LJ_TUDATA 1168 | movn TMP0, TMP1, TMP0 1169 | bnez TMP0, >6 1170 |. cleartp TAB:CARG1 1171 |1: // Field metatable must be at same offset for GCtab and GCudata! 1172 | ld TAB:RB, TAB:CARG1->metatable 1173 |2: 1174 | ld STR:RC, DISPATCH_GL(gcroot[GCROOT_MMNAME+MM_metatable])(DISPATCH) 1175 | beqz TAB:RB, ->fff_restv 1176 |. li CARG1, LJ_TNIL 1177 | lw TMP0, TAB:RB->hmask 1178 | lw TMP1, STR:RC->hash 1179 | ld NODE:TMP2, TAB:RB->node 1180 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask 1181 | dsll TMP0, TMP1, 5 1182 | dsll TMP1, TMP1, 3 1183 | dsubu TMP1, TMP0, TMP1 1184 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8) 1185 | li CARG4, LJ_TSTR 1186 | settp STR:RC, CARG4 // Tagged key to look for. 1187 |3: // Rearranged logic, because we expect _not_ to find the key. 1188 | ld TMP0, NODE:TMP2->key 1189 | ld CARG1, NODE:TMP2->val 1190 | ld NODE:TMP2, NODE:TMP2->next 1191 | beq RC, TMP0, >5 1192 |. li AT, LJ_TTAB 1193 | bnez NODE:TMP2, <3 1194 |. nop 1195 |4: 1196 | move CARG1, RB 1197 | b ->fff_restv // Not found, keep default result. 1198 |. settp CARG1, AT 1199 |5: 1200 | bne CARG1, TISNIL, ->fff_restv 1201 |. nop 1202 | b <4 // Ditto for nil value. 1203 |. nop 1204 | 1205 |6: 1206 | sltiu AT, TMP2, LJ_TISNUM 1207 | movn TMP2, TISNUM, AT 1208 | dsll TMP2, TMP2, 3 1209 | dsubu TMP0, DISPATCH, TMP2 1210 | b <2 1211 |. ld TAB:RB, DISPATCH_GL(gcroot[GCROOT_BASEMT])-8(TMP0) 1212 | 1213 |.ffunc_2 setmetatable 1214 | // Fast path: no mt for table yet and not clearing the mt. 1215 | checktp TMP1, CARG1, -LJ_TTAB, ->fff_fallback 1216 | gettp TMP3, CARG2 1217 | ld TAB:TMP0, TAB:TMP1->metatable 1218 | lbu TMP2, TAB:TMP1->marked 1219 | daddiu AT, TMP3, -LJ_TTAB 1220 | cleartp TAB:CARG2 1221 | or AT, AT, TAB:TMP0 1222 | bnez AT, ->fff_fallback 1223 |. andi AT, TMP2, LJ_GC_BLACK // isblack(table) 1224 | beqz AT, ->fff_restv 1225 |. sd TAB:CARG2, TAB:TMP1->metatable 1226 | barrierback TAB:TMP1, TMP2, TMP0, ->fff_restv 1227 | 1228 |.ffunc rawget 1229 | ld CARG2, 0(BASE) 1230 | sltiu AT, NARGS8:RC, 16 1231 | load_got lj_tab_get 1232 | gettp TMP0, CARG2 1233 | cleartp CARG2 1234 | daddiu TMP0, TMP0, -LJ_TTAB 1235 | or AT, AT, TMP0 1236 | bnez AT, ->fff_fallback 1237 |. daddiu CARG3, BASE, 8 1238 | call_intern lj_tab_get // (lua_State *L, GCtab *t, cTValue *key) 1239 |. move CARG1, L 1240 | b ->fff_restv 1241 |. ld CARG1, 0(CRET1) 1242 | 1243 |//-- Base library: conversions ------------------------------------------ 1244 | 1245 |.ffunc tonumber 1246 | // Only handles the number case inline (without a base argument). 1247 | ld CARG1, 0(BASE) 1248 | xori AT, NARGS8:RC, 8 // Exactly one number argument. 1249 | gettp TMP1, CARG1 1250 | sltu TMP0, TISNUM, TMP1 1251 | or AT, AT, TMP0 1252 | bnez AT, ->fff_fallback 1253 |. nop 1254 | b ->fff_restv 1255 |. nop 1256 | 1257 |.ffunc_1 tostring 1258 | // Only handles the string or number case inline. 1259 | gettp TMP0, CARG1 1260 | daddiu AT, TMP0, -LJ_TSTR 1261 | // A __tostring method in the string base metatable is ignored. 1262 | beqz AT, ->fff_restv // String key? 1263 | // Handle numbers inline, unless a number base metatable is present. 1264 |. ld TMP1, DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM])(DISPATCH) 1265 | sltu TMP0, TISNUM, TMP0 1266 | or TMP0, TMP0, TMP1 1267 | bnez TMP0, ->fff_fallback 1268 |. sd BASE, L->base // Add frame since C call can throw. 1269 | ffgccheck 1270 |. sd PC, SAVE_PC // Redundant (but a defined value). 1271 | load_got lj_strfmt_number 1272 | move CARG1, L 1273 | call_intern lj_strfmt_number // (lua_State *L, cTValue *o) 1274 |. move CARG2, BASE 1275 | // Returns GCstr *. 1276 | li AT, LJ_TSTR 1277 | settp CRET1, AT 1278 | b ->fff_restv 1279 |. move CARG1, CRET1 1280 | 1281 |//-- Base library: iterators ------------------------------------------- 1282 | 1283 |.ffunc_1 next 1284 | checktp CARG2, CARG1, -LJ_TTAB, ->fff_fallback 1285 | daddu TMP2, BASE, NARGS8:RC 1286 | sd TISNIL, 0(TMP2) // Set missing 2nd arg to nil. 1287 | ld PC, FRAME_PC(BASE) 1288 | load_got lj_tab_next 1289 | sd BASE, L->base // Add frame since C call can throw. 1290 | sd BASE, L->top // Dummy frame length is ok. 1291 | daddiu CARG3, BASE, 8 1292 | sd PC, SAVE_PC 1293 | call_intern lj_tab_next // (lua_State *L, GCtab *t, TValue *key) 1294 |. move CARG1, L 1295 | // Returns 0 at end of traversal. 1296 | beqz CRET1, ->fff_restv // End of traversal: return nil. 1297 |. move CARG1, TISNIL 1298 | ld TMP0, 8(BASE) 1299 | daddiu RA, BASE, -16 1300 | ld TMP2, 16(BASE) 1301 | sd TMP0, 0(RA) 1302 | sd TMP2, 8(RA) 1303 | b ->fff_res 1304 |. li RD, (2+1)*8 1305 | 1306 |.ffunc_1 pairs 1307 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback 1308 | ld PC, FRAME_PC(BASE) 1309#if LJ_52 1310 | ld TAB:TMP2, TAB:TMP1->metatable 1311 | ld TMP0, CFUNC:RB->upvalue[0] 1312 | bnez TAB:TMP2, ->fff_fallback 1313#else 1314 | ld TMP0, CFUNC:RB->upvalue[0] 1315#endif 1316 |. daddiu RA, BASE, -16 1317 | sd TISNIL, 0(BASE) 1318 | sd CARG1, -8(BASE) 1319 | sd TMP0, 0(RA) 1320 | b ->fff_res 1321 |. li RD, (3+1)*8 1322 | 1323 |.ffunc_2 ipairs_aux 1324 | checktab CARG1, ->fff_fallback 1325 | checkint CARG2, ->fff_fallback 1326 |. lw TMP0, TAB:CARG1->asize 1327 | ld TMP1, TAB:CARG1->array 1328 | ld PC, FRAME_PC(BASE) 1329 | sextw TMP2, CARG2 1330 | addiu TMP2, TMP2, 1 1331 | sltu AT, TMP2, TMP0 1332 | daddiu RA, BASE, -16 1333 | zextw TMP0, TMP2 1334 | settp TMP0, TISNUM 1335 | beqz AT, >2 // Not in array part? 1336 |. sd TMP0, 0(RA) 1337 | dsll TMP3, TMP2, 3 1338 | daddu TMP3, TMP1, TMP3 1339 | ld TMP1, 0(TMP3) 1340 |1: 1341 | beq TMP1, TISNIL, ->fff_res // End of iteration, return 0 results. 1342 |. li RD, (0+1)*8 1343 | sd TMP1, -8(BASE) 1344 | b ->fff_res 1345 |. li RD, (2+1)*8 1346 |2: // Check for empty hash part first. Otherwise call C function. 1347 | lw TMP0, TAB:CARG1->hmask 1348 | load_got lj_tab_getinth 1349 | beqz TMP0, ->fff_res 1350 |. li RD, (0+1)*8 1351 | call_intern lj_tab_getinth // (GCtab *t, int32_t key) 1352 |. move CARG2, TMP2 1353 | // Returns cTValue * or NULL. 1354 | beqz CRET1, ->fff_res 1355 |. li RD, (0+1)*8 1356 | b <1 1357 |. ld TMP1, 0(CRET1) 1358 | 1359 |.ffunc_1 ipairs 1360 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback 1361 | ld PC, FRAME_PC(BASE) 1362#if LJ_52 1363 | ld TAB:TMP2, TAB:TMP1->metatable 1364 | ld CFUNC:TMP0, CFUNC:RB->upvalue[0] 1365 | bnez TAB:TMP2, ->fff_fallback 1366#else 1367 | ld TMP0, CFUNC:RB->upvalue[0] 1368#endif 1369 | daddiu RA, BASE, -16 1370 | dsll AT, TISNUM, 47 1371 | sd CARG1, -8(BASE) 1372 | sd AT, 0(BASE) 1373 | sd CFUNC:TMP0, 0(RA) 1374 | b ->fff_res 1375 |. li RD, (3+1)*8 1376 | 1377 |//-- Base library: catch errors ---------------------------------------- 1378 | 1379 |.ffunc pcall 1380 | daddiu NARGS8:RC, NARGS8:RC, -8 1381 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH) 1382 | bltz NARGS8:RC, ->fff_fallback 1383 |. move TMP2, BASE 1384 | daddiu BASE, BASE, 16 1385 | // Remember active hook before pcall. 1386 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT 1387 | andi TMP3, TMP3, 1 1388 | daddiu PC, TMP3, 16+FRAME_PCALL 1389 | beqz NARGS8:RC, ->vm_call_dispatch 1390 |1: 1391 |. daddu TMP0, BASE, NARGS8:RC 1392 |2: 1393 | ld TMP1, -16(TMP0) 1394 | sd TMP1, -8(TMP0) 1395 | daddiu TMP0, TMP0, -8 1396 | bne TMP0, BASE, <2 1397 |. nop 1398 | b ->vm_call_dispatch 1399 |. nop 1400 | 1401 |.ffunc xpcall 1402 | daddiu NARGS8:RC, NARGS8:RC, -16 1403 | ld CARG1, 0(BASE) 1404 | ld CARG2, 8(BASE) 1405 | bltz NARGS8:RC, ->fff_fallback 1406 |. lbu TMP1, DISPATCH_GL(hookmask)(DISPATCH) 1407 | gettp AT, CARG2 1408 | daddiu AT, AT, -LJ_TFUNC 1409 | bnez AT, ->fff_fallback // Traceback must be a function. 1410 |. move TMP2, BASE 1411 | daddiu BASE, BASE, 24 1412 | // Remember active hook before pcall. 1413 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT 1414 | sd CARG2, 0(TMP2) // Swap function and traceback. 1415 | andi TMP3, TMP3, 1 1416 | sd CARG1, 8(TMP2) 1417 | beqz NARGS8:RC, ->vm_call_dispatch 1418 |. daddiu PC, TMP3, 24+FRAME_PCALL 1419 | b <1 1420 |. nop 1421 | 1422 |//-- Coroutine library -------------------------------------------------- 1423 | 1424 |.macro coroutine_resume_wrap, resume 1425 |.if resume 1426 |.ffunc_1 coroutine_resume 1427 | checktp CARG1, CARG1, -LJ_TTHREAD, ->fff_fallback 1428 |.else 1429 |.ffunc coroutine_wrap_aux 1430 | ld L:CARG1, CFUNC:RB->upvalue[0].gcr 1431 | cleartp L:CARG1 1432 |.endif 1433 | lbu TMP0, L:CARG1->status 1434 | ld TMP1, L:CARG1->cframe 1435 | ld CARG2, L:CARG1->top 1436 | ld TMP2, L:CARG1->base 1437 | addiu AT, TMP0, -LUA_YIELD 1438 | daddu CARG3, CARG2, TMP0 1439 | daddiu TMP3, CARG2, 8 1440 | bgtz AT, ->fff_fallback // st > LUA_YIELD? 1441 |. movn CARG2, TMP3, AT 1442 | xor TMP2, TMP2, CARG3 1443 | bnez TMP1, ->fff_fallback // cframe != 0? 1444 |. or AT, TMP2, TMP0 1445 | ld TMP0, L:CARG1->maxstack 1446 | beqz AT, ->fff_fallback // base == top && st == 0? 1447 |. ld PC, FRAME_PC(BASE) 1448 | daddu TMP2, CARG2, NARGS8:RC 1449 | sltu AT, TMP0, TMP2 1450 | bnez AT, ->fff_fallback // Stack overflow? 1451 |. sd PC, SAVE_PC 1452 | sd BASE, L->base 1453 |1: 1454 |.if resume 1455 | daddiu BASE, BASE, 8 // Keep resumed thread in stack for GC. 1456 | daddiu NARGS8:RC, NARGS8:RC, -8 1457 | daddiu TMP2, TMP2, -8 1458 |.endif 1459 | sd TMP2, L:CARG1->top 1460 | daddu TMP1, BASE, NARGS8:RC 1461 | move CARG3, CARG2 1462 | sd BASE, L->top 1463 |2: // Move args to coroutine. 1464 | ld CRET1, 0(BASE) 1465 | sltu AT, BASE, TMP1 1466 | beqz AT, >3 1467 |. daddiu BASE, BASE, 8 1468 | sd CRET1, 0(CARG3) 1469 | b <2 1470 |. daddiu CARG3, CARG3, 8 1471 |3: 1472 | bal ->vm_resume // (lua_State *L, TValue *base, 0, 0) 1473 |. move L:RA, L:CARG1 1474 | // Returns thread status. 1475 |4: 1476 | ld TMP2, L:RA->base 1477 | sltiu AT, CRET1, LUA_YIELD+1 1478 | ld TMP3, L:RA->top 1479 | li_vmstate INTERP 1480 | ld BASE, L->base 1481 | sd L, DISPATCH_GL(cur_L)(DISPATCH) 1482 | st_vmstate 1483 | beqz AT, >8 1484 |. dsubu RD, TMP3, TMP2 1485 | ld TMP0, L->maxstack 1486 | beqz RD, >6 // No results? 1487 |. daddu TMP1, BASE, RD 1488 | sltu AT, TMP0, TMP1 1489 | bnez AT, >9 // Need to grow stack? 1490 |. daddu TMP3, TMP2, RD 1491 | sd TMP2, L:RA->top // Clear coroutine stack. 1492 | move TMP1, BASE 1493 |5: // Move results from coroutine. 1494 | ld CRET1, 0(TMP2) 1495 | daddiu TMP2, TMP2, 8 1496 | sltu AT, TMP2, TMP3 1497 | sd CRET1, 0(TMP1) 1498 | bnez AT, <5 1499 |. daddiu TMP1, TMP1, 8 1500 |6: 1501 | andi TMP0, PC, FRAME_TYPE 1502 |.if resume 1503 | mov_true TMP1 1504 | daddiu RA, BASE, -8 1505 | sd TMP1, -8(BASE) // Prepend true to results. 1506 | daddiu RD, RD, 16 1507 |.else 1508 | move RA, BASE 1509 | daddiu RD, RD, 8 1510 |.endif 1511 |7: 1512 | sd PC, SAVE_PC 1513 | beqz TMP0, ->BC_RET_Z 1514 |. move MULTRES, RD 1515 | b ->vm_return 1516 |. nop 1517 | 1518 |8: // Coroutine returned with error (at co->top-1). 1519 |.if resume 1520 | daddiu TMP3, TMP3, -8 1521 | mov_false TMP1 1522 | ld CRET1, 0(TMP3) 1523 | sd TMP3, L:RA->top // Remove error from coroutine stack. 1524 | li RD, (2+1)*8 1525 | sd TMP1, -8(BASE) // Prepend false to results. 1526 | daddiu RA, BASE, -8 1527 | sd CRET1, 0(BASE) // Copy error message. 1528 | b <7 1529 |. andi TMP0, PC, FRAME_TYPE 1530 |.else 1531 | load_got lj_ffh_coroutine_wrap_err 1532 | move CARG2, L:RA 1533 | call_intern lj_ffh_coroutine_wrap_err // (lua_State *L, lua_State *co) 1534 |. move CARG1, L 1535 |.endif 1536 | 1537 |9: // Handle stack expansion on return from yield. 1538 | load_got lj_state_growstack 1539 | srl CARG2, RD, 3 1540 | call_intern lj_state_growstack // (lua_State *L, int n) 1541 |. move CARG1, L 1542 | b <4 1543 |. li CRET1, 0 1544 |.endmacro 1545 | 1546 | coroutine_resume_wrap 1 // coroutine.resume 1547 | coroutine_resume_wrap 0 // coroutine.wrap 1548 | 1549 |.ffunc coroutine_yield 1550 | ld TMP0, L->cframe 1551 | daddu TMP1, BASE, NARGS8:RC 1552 | sd BASE, L->base 1553 | andi TMP0, TMP0, CFRAME_RESUME 1554 | sd TMP1, L->top 1555 | beqz TMP0, ->fff_fallback 1556 |. li CRET1, LUA_YIELD 1557 | sd r0, L->cframe 1558 | b ->vm_leave_unw 1559 |. sb CRET1, L->status 1560 | 1561 |//-- Math library ------------------------------------------------------- 1562 | 1563 |.ffunc_1 math_abs 1564 | gettp CARG2, CARG1 1565 | daddiu AT, CARG2, -LJ_TISNUM 1566 | bnez AT, >1 1567 |. sextw TMP1, CARG1 1568 | sra TMP0, TMP1, 31 // Extract sign. 1569 | xor TMP1, TMP1, TMP0 1570 | dsubu CARG1, TMP1, TMP0 1571 | dsll TMP3, CARG1, 32 1572 | bgez TMP3, ->fff_restv 1573 |. settp CARG1, TISNUM 1574 | li CARG1, 0x41e0 // 2^31 as a double. 1575 | b ->fff_restv 1576 |. dsll CARG1, CARG1, 48 1577 |1: 1578 | sltiu AT, CARG2, LJ_TISNUM 1579 | beqz AT, ->fff_fallback 1580 |. dextm CARG1, CARG1, 0, 30 1581 |// fallthrough 1582 | 1583 |->fff_restv: 1584 | // CARG1 = TValue result. 1585 | ld PC, FRAME_PC(BASE) 1586 | daddiu RA, BASE, -16 1587 | sd CARG1, -16(BASE) 1588 |->fff_res1: 1589 | // RA = results, PC = return. 1590 | li RD, (1+1)*8 1591 |->fff_res: 1592 | // RA = results, RD = (nresults+1)*8, PC = return. 1593 | andi TMP0, PC, FRAME_TYPE 1594 | bnez TMP0, ->vm_return 1595 |. move MULTRES, RD 1596 | lw INS, -4(PC) 1597 | decode_RB8a RB, INS 1598 | decode_RB8b RB 1599 |5: 1600 | sltu AT, RD, RB 1601 | bnez AT, >6 // More results expected? 1602 |. decode_RA8a TMP0, INS 1603 | decode_RA8b TMP0 1604 | ins_next1 1605 | // Adjust BASE. KBASE is assumed to be set for the calling frame. 1606 | dsubu BASE, RA, TMP0 1607 | ins_next2 1608 | 1609 |6: // Fill up results with nil. 1610 | daddu TMP1, RA, RD 1611 | daddiu RD, RD, 8 1612 | b <5 1613 |. sd TISNIL, -8(TMP1) 1614 | 1615 |.macro math_extern, func 1616 | .ffunc_n math_ .. func 1617 | load_got func 1618 | call_extern 1619 |. nop 1620 | b ->fff_resn 1621 |. nop 1622 |.endmacro 1623 | 1624 |.macro math_extern2, func 1625 | .ffunc_nn math_ .. func 1626 |. load_got func 1627 | call_extern 1628 |. nop 1629 | b ->fff_resn 1630 |. nop 1631 |.endmacro 1632 | 1633 |// TODO: Return integer type if result is integer (own sf implementation). 1634 |.macro math_round, func 1635 |->ff_math_ .. func: 1636 | ld CARG1, 0(BASE) 1637 | beqz NARGS8:RC, ->fff_fallback 1638 |. gettp TMP0, CARG1 1639 | beq TMP0, TISNUM, ->fff_restv 1640 |. sltu AT, TMP0, TISNUM 1641 | beqz AT, ->fff_fallback 1642 |.if FPU 1643 |. ldc1 FARG1, 0(BASE) 1644 | bal ->vm_ .. func 1645 |. nop 1646 |.else 1647 |. load_got func 1648 | call_extern 1649 |. nop 1650 |.endif 1651 | b ->fff_resn 1652 |. nop 1653 |.endmacro 1654 | 1655 | math_round floor 1656 | math_round ceil 1657 | 1658 |.ffunc math_log 1659 | li AT, 8 1660 | bne NARGS8:RC, AT, ->fff_fallback // Exactly 1 argument. 1661 |. ld CARG1, 0(BASE) 1662 | checknum CARG1, ->fff_fallback 1663 |. load_got log 1664 |.if FPU 1665 | call_extern 1666 |. ldc1 FARG1, 0(BASE) 1667 |.else 1668 | call_extern 1669 |. nop 1670 |.endif 1671 | b ->fff_resn 1672 |. nop 1673 | 1674 | math_extern log10 1675 | math_extern exp 1676 | math_extern sin 1677 | math_extern cos 1678 | math_extern tan 1679 | math_extern asin 1680 | math_extern acos 1681 | math_extern atan 1682 | math_extern sinh 1683 | math_extern cosh 1684 | math_extern tanh 1685 | math_extern2 pow 1686 | math_extern2 atan2 1687 | math_extern2 fmod 1688 | 1689 |.if FPU 1690 |.ffunc_n math_sqrt 1691 |. sqrt.d FRET1, FARG1 1692 |// fallthrough to ->fff_resn 1693 |.else 1694 | math_extern sqrt 1695 |.endif 1696 | 1697 |->fff_resn: 1698 | ld PC, FRAME_PC(BASE) 1699 | daddiu RA, BASE, -16 1700 | b ->fff_res1 1701 |.if FPU 1702 |. sdc1 FRET1, 0(RA) 1703 |.else 1704 |. sd CRET1, 0(RA) 1705 |.endif 1706 | 1707 | 1708 |.ffunc_2 math_ldexp 1709 | checknum CARG1, ->fff_fallback 1710 | checkint CARG2, ->fff_fallback 1711 |. load_got ldexp 1712 | .FPU ldc1 FARG1, 0(BASE) 1713 | call_extern 1714 |. lw CARG2, 8+LO(BASE) 1715 | b ->fff_resn 1716 |. nop 1717 | 1718 |.ffunc_n math_frexp 1719 | load_got frexp 1720 | ld PC, FRAME_PC(BASE) 1721 | call_extern 1722 |. daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv) 1723 | lw TMP1, DISPATCH_GL(tmptv)(DISPATCH) 1724 | daddiu RA, BASE, -16 1725 |.if FPU 1726 | mtc1 TMP1, FARG2 1727 | sdc1 FRET1, 0(RA) 1728 | cvt.d.w FARG2, FARG2 1729 | sdc1 FARG2, 8(RA) 1730 |.else 1731 | sd CRET1, 0(RA) 1732 | zextw TMP1, TMP1 1733 | settp TMP1, TISNUM 1734 | sd TMP1, 8(RA) 1735 |.endif 1736 | b ->fff_res 1737 |. li RD, (2+1)*8 1738 | 1739 |.ffunc_n math_modf 1740 | load_got modf 1741 | ld PC, FRAME_PC(BASE) 1742 | call_extern 1743 |. daddiu CARG2, BASE, -16 1744 | daddiu RA, BASE, -16 1745 |.if FPU 1746 | sdc1 FRET1, -8(BASE) 1747 |.else 1748 | sd CRET1, -8(BASE) 1749 |.endif 1750 | b ->fff_res 1751 |. li RD, (2+1)*8 1752 | 1753 |.macro math_minmax, name, intins, fpins 1754 | .ffunc_1 name 1755 | daddu TMP3, BASE, NARGS8:RC 1756 | checkint CARG1, >5 1757 |. daddiu TMP2, BASE, 8 1758 |1: // Handle integers. 1759 | beq TMP2, TMP3, ->fff_restv 1760 |. ld CARG2, 0(TMP2) 1761 | checkint CARG2, >3 1762 |. sextw CARG1, CARG1 1763 | lw CARG2, LO(TMP2) 1764 |. slt AT, CARG1, CARG2 1765 | intins CARG1, CARG2, AT 1766 | daddiu TMP2, TMP2, 8 1767 | zextw CARG1, CARG1 1768 | b <1 1769 |. settp CARG1, TISNUM 1770 | 1771 |3: // Convert intermediate result to number and continue with number loop. 1772 | checknum CARG2, ->fff_fallback 1773 |.if FPU 1774 |. mtc1 CARG1, FRET1 1775 | cvt.d.w FRET1, FRET1 1776 | b >7 1777 |. ldc1 FARG1, 0(TMP2) 1778 |.else 1779 |. nop 1780 | bal ->vm_sfi2d_1 1781 |. nop 1782 | b >7 1783 |. nop 1784 |.endif 1785 | 1786 |5: 1787 | .FPU ldc1 FRET1, 0(BASE) 1788 | checknum CARG1, ->fff_fallback 1789 |6: // Handle numbers. 1790 |. ld CARG2, 0(TMP2) 1791 | beq TMP2, TMP3, ->fff_resn 1792 |.if FPU 1793 | ldc1 FARG1, 0(TMP2) 1794 |.else 1795 | move CRET1, CARG1 1796 |.endif 1797 | checknum CARG2, >8 1798 |. nop 1799 |7: 1800 |.if FPU 1801 | c.olt.d FRET1, FARG1 1802 | fpins FRET1, FARG1 1803 |.else 1804 | bal ->vm_sfcmpolt 1805 |. nop 1806 | intins CARG1, CARG2, CRET1 1807 |.endif 1808 | b <6 1809 |. daddiu TMP2, TMP2, 8 1810 | 1811 |8: // Convert integer to number and continue with number loop. 1812 | checkint CARG2, ->fff_fallback 1813 |.if FPU 1814 |. lwc1 FARG1, LO(TMP2) 1815 | b <7 1816 |. cvt.d.w FARG1, FARG1 1817 |.else 1818 |. lw CARG2, LO(TMP2) 1819 | bal ->vm_sfi2d_2 1820 |. nop 1821 | b <7 1822 |. nop 1823 |.endif 1824 | 1825 |.endmacro 1826 | 1827 | math_minmax math_min, movz, movf.d 1828 | math_minmax math_max, movn, movt.d 1829 | 1830 |//-- String library ----------------------------------------------------- 1831 | 1832 |.ffunc string_byte // Only handle the 1-arg case here. 1833 | ld CARG1, 0(BASE) 1834 | gettp TMP0, CARG1 1835 | xori AT, NARGS8:RC, 8 1836 | daddiu TMP0, TMP0, -LJ_TSTR 1837 | or AT, AT, TMP0 1838 | bnez AT, ->fff_fallback // Need exactly 1 string argument. 1839 |. cleartp STR:CARG1 1840 | lw TMP0, STR:CARG1->len 1841 | daddiu RA, BASE, -16 1842 | ld PC, FRAME_PC(BASE) 1843 | sltu RD, r0, TMP0 1844 | lbu TMP1, STR:CARG1[1] // Access is always ok (NUL at end). 1845 | addiu RD, RD, 1 1846 | sll RD, RD, 3 // RD = ((str->len != 0)+1)*8 1847 | settp TMP1, TISNUM 1848 | b ->fff_res 1849 |. sd TMP1, 0(RA) 1850 | 1851 |.ffunc string_char // Only handle the 1-arg case here. 1852 | ffgccheck 1853 |. nop 1854 | ld CARG1, 0(BASE) 1855 | gettp TMP0, CARG1 1856 | xori AT, NARGS8:RC, 8 // Exactly 1 argument. 1857 | daddiu TMP0, TMP0, -LJ_TISNUM // Integer. 1858 | li TMP1, 255 1859 | sextw CARG1, CARG1 1860 | or AT, AT, TMP0 1861 | sltu TMP1, TMP1, CARG1 // !(255 < n). 1862 | or AT, AT, TMP1 1863 | bnez AT, ->fff_fallback 1864 |. li CARG3, 1 1865 | daddiu CARG2, sp, TMPD_OFS 1866 | sb CARG1, TMPD 1867 |->fff_newstr: 1868 | load_got lj_str_new 1869 | sd BASE, L->base 1870 | sd PC, SAVE_PC 1871 | call_intern lj_str_new // (lua_State *L, char *str, size_t l) 1872 |. move CARG1, L 1873 | // Returns GCstr *. 1874 | ld BASE, L->base 1875 |->fff_resstr: 1876 | li AT, LJ_TSTR 1877 | settp CRET1, AT 1878 | b ->fff_restv 1879 |. move CARG1, CRET1 1880 | 1881 |.ffunc string_sub 1882 | ffgccheck 1883 |. nop 1884 | addiu AT, NARGS8:RC, -16 1885 | ld TMP0, 0(BASE) 1886 | bltz AT, ->fff_fallback 1887 |. gettp TMP3, TMP0 1888 | cleartp STR:CARG1, TMP0 1889 | ld CARG2, 8(BASE) 1890 | beqz AT, >1 1891 |. li CARG4, -1 1892 | ld CARG3, 16(BASE) 1893 | checkint CARG3, ->fff_fallback 1894 |. sextw CARG4, CARG3 1895 |1: 1896 | checkint CARG2, ->fff_fallback 1897 |. li AT, LJ_TSTR 1898 | bne TMP3, AT, ->fff_fallback 1899 |. sextw CARG3, CARG2 1900 | lw CARG2, STR:CARG1->len 1901 | // STR:CARG1 = str, CARG2 = str->len, CARG3 = start, CARG4 = end 1902 | slt AT, CARG4, r0 1903 | addiu TMP0, CARG2, 1 1904 | addu TMP1, CARG4, TMP0 1905 | slt TMP3, CARG3, r0 1906 | movn CARG4, TMP1, AT // if (end < 0) end += len+1 1907 | addu TMP1, CARG3, TMP0 1908 | movn CARG3, TMP1, TMP3 // if (start < 0) start += len+1 1909 | li TMP2, 1 1910 | slt AT, CARG4, r0 1911 | slt TMP3, r0, CARG3 1912 | movn CARG4, r0, AT // if (end < 0) end = 0 1913 | movz CARG3, TMP2, TMP3 // if (start < 1) start = 1 1914 | slt AT, CARG2, CARG4 1915 | movn CARG4, CARG2, AT // if (end > len) end = len 1916 | daddu CARG2, STR:CARG1, CARG3 1917 | subu CARG3, CARG4, CARG3 // len = end - start 1918 | daddiu CARG2, CARG2, sizeof(GCstr)-1 1919 | bgez CARG3, ->fff_newstr 1920 |. addiu CARG3, CARG3, 1 // len++ 1921 |->fff_emptystr: // Return empty string. 1922 | li AT, LJ_TSTR 1923 | daddiu STR:CARG1, DISPATCH, DISPATCH_GL(strempty) 1924 | b ->fff_restv 1925 |. settp CARG1, AT 1926 | 1927 |.macro ffstring_op, name 1928 | .ffunc string_ .. name 1929 | ffgccheck 1930 |. nop 1931 | beqz NARGS8:RC, ->fff_fallback 1932 |. ld CARG2, 0(BASE) 1933 | checkstr STR:CARG2, ->fff_fallback 1934 | daddiu SBUF:CARG1, DISPATCH, DISPATCH_GL(tmpbuf) 1935 | load_got lj_buf_putstr_ .. name 1936 | ld TMP0, SBUF:CARG1->b 1937 | sd L, SBUF:CARG1->L 1938 | sd BASE, L->base 1939 | sd TMP0, SBUF:CARG1->p 1940 | call_intern extern lj_buf_putstr_ .. name 1941 |. sd PC, SAVE_PC 1942 | load_got lj_buf_tostr 1943 | call_intern lj_buf_tostr 1944 |. move SBUF:CARG1, SBUF:CRET1 1945 | b ->fff_resstr 1946 |. ld BASE, L->base 1947 |.endmacro 1948 | 1949 |ffstring_op reverse 1950 |ffstring_op lower 1951 |ffstring_op upper 1952 | 1953 |//-- Bit library -------------------------------------------------------- 1954 | 1955 |->vm_tobit_fb: 1956 | beqz TMP1, ->fff_fallback 1957 |.if FPU 1958 |. ldc1 FARG1, 0(BASE) 1959 | add.d FARG1, FARG1, TOBIT 1960 | mfc1 CRET1, FARG1 1961 | jr ra 1962 |. zextw CRET1, CRET1 1963 |.else 1964 |// FP number to bit conversion for soft-float. 1965 |->vm_tobit: 1966 | dsll TMP0, CARG1, 1 1967 | li CARG3, 1076 1968 | dsrl AT, TMP0, 53 1969 | dsubu CARG3, CARG3, AT 1970 | sltiu AT, CARG3, 54 1971 | beqz AT, >1 1972 |. dextm TMP0, TMP0, 0, 20 1973 | dinsu TMP0, AT, 21, 21 1974 | slt AT, CARG1, r0 1975 | dsrlv CRET1, TMP0, CARG3 1976 | dsubu TMP0, r0, CRET1 1977 | movn CRET1, TMP0, AT 1978 | jr ra 1979 |. zextw CRET1, CRET1 1980 |1: 1981 | jr ra 1982 |. move CRET1, r0 1983 |.endif 1984 | 1985 |.macro .ffunc_bit, name 1986 | .ffunc_1 bit_..name 1987 | gettp TMP0, CARG1 1988 | beq TMP0, TISNUM, >6 1989 |. zextw CRET1, CARG1 1990 | bal ->vm_tobit_fb 1991 |. sltiu TMP1, TMP0, LJ_TISNUM 1992 |6: 1993 |.endmacro 1994 | 1995 |.macro .ffunc_bit_op, name, bins 1996 | .ffunc_bit name 1997 | daddiu TMP2, BASE, 8 1998 | daddu TMP3, BASE, NARGS8:RC 1999 |1: 2000 | beq TMP2, TMP3, ->fff_resi 2001 |. ld CARG1, 0(TMP2) 2002 | gettp TMP0, CARG1 2003 |.if FPU 2004 | bne TMP0, TISNUM, >2 2005 |. daddiu TMP2, TMP2, 8 2006 | zextw CARG1, CARG1 2007 | b <1 2008 |. bins CRET1, CRET1, CARG1 2009 |2: 2010 | ldc1 FARG1, -8(TMP2) 2011 | sltiu AT, TMP0, LJ_TISNUM 2012 | beqz AT, ->fff_fallback 2013 |. add.d FARG1, FARG1, TOBIT 2014 | mfc1 CARG1, FARG1 2015 | zextw CARG1, CARG1 2016 | b <1 2017 |. bins CRET1, CRET1, CARG1 2018 |.else 2019 | beq TMP0, TISNUM, >2 2020 |. move CRET2, CRET1 2021 | bal ->vm_tobit_fb 2022 |. sltiu TMP1, TMP0, LJ_TISNUM 2023 | move CARG1, CRET2 2024 |2: 2025 | zextw CARG1, CARG1 2026 | bins CRET1, CRET1, CARG1 2027 | b <1 2028 |. daddiu TMP2, TMP2, 8 2029 |.endif 2030 |.endmacro 2031 | 2032 |.ffunc_bit_op band, and 2033 |.ffunc_bit_op bor, or 2034 |.ffunc_bit_op bxor, xor 2035 | 2036 |.ffunc_bit bswap 2037 | dsrl TMP0, CRET1, 8 2038 | dsrl TMP1, CRET1, 24 2039 | andi TMP2, TMP0, 0xff00 2040 | dins TMP1, CRET1, 24, 31 2041 | dins TMP2, TMP0, 16, 23 2042 | b ->fff_resi 2043 |. or CRET1, TMP1, TMP2 2044 | 2045 |.ffunc_bit bnot 2046 | not CRET1, CRET1 2047 | b ->fff_resi 2048 |. zextw CRET1, CRET1 2049 | 2050 |.macro .ffunc_bit_sh, name, shins, shmod 2051 | .ffunc_2 bit_..name 2052 | gettp TMP0, CARG1 2053 | beq TMP0, TISNUM, >1 2054 |. nop 2055 | bal ->vm_tobit_fb 2056 |. sltiu TMP1, TMP0, LJ_TISNUM 2057 | move CARG1, CRET1 2058 |1: 2059 | gettp TMP0, CARG2 2060 | bne TMP0, TISNUM, ->fff_fallback 2061 |. zextw CARG2, CARG2 2062 | sextw CARG1, CARG1 2063 |.if shmod == 1 2064 | negu CARG2, CARG2 2065 |.endif 2066 | shins CRET1, CARG1, CARG2 2067 | b ->fff_resi 2068 |. zextw CRET1, CRET1 2069 |.endmacro 2070 | 2071 |.ffunc_bit_sh lshift, sllv, 0 2072 |.ffunc_bit_sh rshift, srlv, 0 2073 |.ffunc_bit_sh arshift, srav, 0 2074 |.ffunc_bit_sh rol, rotrv, 1 2075 |.ffunc_bit_sh ror, rotrv, 0 2076 | 2077 |.ffunc_bit tobit 2078 |->fff_resi: 2079 | ld PC, FRAME_PC(BASE) 2080 | daddiu RA, BASE, -16 2081 | settp CRET1, TISNUM 2082 | b ->fff_res1 2083 |. sd CRET1, -16(BASE) 2084 | 2085 |//----------------------------------------------------------------------- 2086 |->fff_fallback: // Call fast function fallback handler. 2087 | // BASE = new base, RB = CFUNC, RC = nargs*8 2088 | ld TMP3, CFUNC:RB->f 2089 | daddu TMP1, BASE, NARGS8:RC 2090 | ld PC, FRAME_PC(BASE) // Fallback may overwrite PC. 2091 | daddiu TMP0, TMP1, 8*LUA_MINSTACK 2092 | ld TMP2, L->maxstack 2093 | sd PC, SAVE_PC // Redundant (but a defined value). 2094 | sltu AT, TMP2, TMP0 2095 | sd BASE, L->base 2096 | sd TMP1, L->top 2097 | bnez AT, >5 // Need to grow stack. 2098 |. move CFUNCADDR, TMP3 2099 | jalr TMP3 // (lua_State *L) 2100 |. move CARG1, L 2101 | // Either throws an error, or recovers and returns -1, 0 or nresults+1. 2102 | ld BASE, L->base 2103 | sll RD, CRET1, 3 2104 | bgtz CRET1, ->fff_res // Returned nresults+1? 2105 |. daddiu RA, BASE, -16 2106 |1: // Returned 0 or -1: retry fast path. 2107 | ld LFUNC:RB, FRAME_FUNC(BASE) 2108 | ld TMP0, L->top 2109 | cleartp LFUNC:RB 2110 | bnez CRET1, ->vm_call_tail // Returned -1? 2111 |. dsubu NARGS8:RC, TMP0, BASE 2112 | ins_callt // Returned 0: retry fast path. 2113 | 2114 |// Reconstruct previous base for vmeta_call during tailcall. 2115 |->vm_call_tail: 2116 | andi TMP0, PC, FRAME_TYPE 2117 | li AT, -4 2118 | bnez TMP0, >3 2119 |. and TMP1, PC, AT 2120 | lbu TMP1, OFS_RA(PC) 2121 | sll TMP1, TMP1, 3 2122 | addiu TMP1, TMP1, 16 2123 |3: 2124 | b ->vm_call_dispatch // Resolve again for tailcall. 2125 |. dsubu TMP2, BASE, TMP1 2126 | 2127 |5: // Grow stack for fallback handler. 2128 | load_got lj_state_growstack 2129 | li CARG2, LUA_MINSTACK 2130 | call_intern lj_state_growstack // (lua_State *L, int n) 2131 |. move CARG1, L 2132 | ld BASE, L->base 2133 | b <1 2134 |. li CRET1, 0 // Force retry. 2135 | 2136 |->fff_gcstep: // Call GC step function. 2137 | // BASE = new base, RC = nargs*8 2138 | move MULTRES, ra 2139 | load_got lj_gc_step 2140 | sd BASE, L->base 2141 | daddu TMP0, BASE, NARGS8:RC 2142 | sd PC, SAVE_PC // Redundant (but a defined value). 2143 | sd TMP0, L->top 2144 | call_intern lj_gc_step // (lua_State *L) 2145 |. move CARG1, L 2146 | ld BASE, L->base 2147 | move ra, MULTRES 2148 | ld TMP0, L->top 2149 | ld CFUNC:RB, FRAME_FUNC(BASE) 2150 | cleartp CFUNC:RB 2151 | jr ra 2152 |. dsubu NARGS8:RC, TMP0, BASE 2153 | 2154 |//----------------------------------------------------------------------- 2155 |//-- Special dispatch targets ------------------------------------------- 2156 |//----------------------------------------------------------------------- 2157 | 2158 |->vm_record: // Dispatch target for recording phase. 2159 |.if JIT 2160 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH) 2161 | andi AT, TMP3, HOOK_VMEVENT // No recording while in vmevent. 2162 | bnez AT, >5 2163 | // Decrement the hookcount for consistency, but always do the call. 2164 |. lw TMP2, DISPATCH_GL(hookcount)(DISPATCH) 2165 | andi AT, TMP3, HOOK_ACTIVE 2166 | bnez AT, >1 2167 |. addiu TMP2, TMP2, -1 2168 | andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT 2169 | beqz AT, >1 2170 |. nop 2171 | b >1 2172 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH) 2173 |.endif 2174 | 2175 |->vm_rethook: // Dispatch target for return hooks. 2176 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH) 2177 | andi AT, TMP3, HOOK_ACTIVE // Hook already active? 2178 | beqz AT, >1 2179 |5: // Re-dispatch to static ins. 2180 |. ld AT, GG_DISP2STATIC(TMP0) // Assumes TMP0 holds DISPATCH+OP*4. 2181 | jr AT 2182 |. nop 2183 | 2184 |->vm_inshook: // Dispatch target for instr/line hooks. 2185 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH) 2186 | lw TMP2, DISPATCH_GL(hookcount)(DISPATCH) 2187 | andi AT, TMP3, HOOK_ACTIVE // Hook already active? 2188 | bnez AT, <5 2189 |. andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT 2190 | beqz AT, <5 2191 |. addiu TMP2, TMP2, -1 2192 | beqz TMP2, >1 2193 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH) 2194 | andi AT, TMP3, LUA_MASKLINE 2195 | beqz AT, <5 2196 |1: 2197 |. load_got lj_dispatch_ins 2198 | sw MULTRES, SAVE_MULTRES 2199 | move CARG2, PC 2200 | sd BASE, L->base 2201 | // SAVE_PC must hold the _previous_ PC. The callee updates it with PC. 2202 | call_intern lj_dispatch_ins // (lua_State *L, const BCIns *pc) 2203 |. move CARG1, L 2204 |3: 2205 | ld BASE, L->base 2206 |4: // Re-dispatch to static ins. 2207 | lw INS, -4(PC) 2208 | decode_OP8a TMP1, INS 2209 | decode_OP8b TMP1 2210 | daddu TMP0, DISPATCH, TMP1 2211 | decode_RD8a RD, INS 2212 | ld AT, GG_DISP2STATIC(TMP0) 2213 | decode_RA8a RA, INS 2214 | decode_RD8b RD 2215 | jr AT 2216 | decode_RA8b RA 2217 | 2218 |->cont_hook: // Continue from hook yield. 2219 | daddiu PC, PC, 4 2220 | b <4 2221 |. lw MULTRES, -24+LO(RB) // Restore MULTRES for *M ins. 2222 | 2223 |->vm_hotloop: // Hot loop counter underflow. 2224 |.if JIT 2225 | ld LFUNC:TMP1, FRAME_FUNC(BASE) 2226 | daddiu CARG1, DISPATCH, GG_DISP2J 2227 | cleartp LFUNC:TMP1 2228 | sd PC, SAVE_PC 2229 | ld TMP1, LFUNC:TMP1->pc 2230 | move CARG2, PC 2231 | sd L, DISPATCH_J(L)(DISPATCH) 2232 | lbu TMP1, PC2PROTO(framesize)(TMP1) 2233 | load_got lj_trace_hot 2234 | sd BASE, L->base 2235 | dsll TMP1, TMP1, 3 2236 | daddu TMP1, BASE, TMP1 2237 | call_intern lj_trace_hot // (jit_State *J, const BCIns *pc) 2238 |. sd TMP1, L->top 2239 | b <3 2240 |. nop 2241 |.endif 2242 | 2243 | 2244 |->vm_callhook: // Dispatch target for call hooks. 2245 |.if JIT 2246 | b >1 2247 |.endif 2248 |. move CARG2, PC 2249 | 2250 |->vm_hotcall: // Hot call counter underflow. 2251 |.if JIT 2252 | ori CARG2, PC, 1 2253 |1: 2254 |.endif 2255 | load_got lj_dispatch_call 2256 | daddu TMP0, BASE, RC 2257 | sd PC, SAVE_PC 2258 | sd BASE, L->base 2259 | dsubu RA, RA, BASE 2260 | sd TMP0, L->top 2261 | call_intern lj_dispatch_call // (lua_State *L, const BCIns *pc) 2262 |. move CARG1, L 2263 | // Returns ASMFunction. 2264 | ld BASE, L->base 2265 | ld TMP0, L->top 2266 | sd r0, SAVE_PC // Invalidate for subsequent line hook. 2267 | dsubu NARGS8:RC, TMP0, BASE 2268 | daddu RA, BASE, RA 2269 | ld LFUNC:RB, FRAME_FUNC(BASE) 2270 | cleartp LFUNC:RB 2271 | jr CRET1 2272 |. lw INS, -4(PC) 2273 | 2274 |->cont_stitch: // Trace stitching. 2275 |.if JIT 2276 | // RA = resultptr, RB = meta base 2277 | lw INS, -4(PC) 2278 | ld TRACE:TMP2, -40(RB) // Save previous trace. 2279 | decode_RA8a RC, INS 2280 | daddiu AT, MULTRES, -8 2281 | cleartp TRACE:TMP2 2282 | decode_RA8b RC 2283 | beqz AT, >2 2284 |. daddu RC, BASE, RC // Call base. 2285 |1: // Move results down. 2286 | ld CARG1, 0(RA) 2287 | daddiu AT, AT, -8 2288 | daddiu RA, RA, 8 2289 | sd CARG1, 0(RC) 2290 | bnez AT, <1 2291 |. daddiu RC, RC, 8 2292 |2: 2293 | decode_RA8a RA, INS 2294 | decode_RB8a RB, INS 2295 | decode_RA8b RA 2296 | decode_RB8b RB 2297 | daddu RA, RA, RB 2298 | daddu RA, BASE, RA 2299 |3: 2300 | sltu AT, RC, RA 2301 | bnez AT, >9 // More results wanted? 2302 |. nop 2303 | 2304 | lhu TMP3, TRACE:TMP2->traceno 2305 | lhu RD, TRACE:TMP2->link 2306 | beq RD, TMP3, ->cont_nop // Blacklisted. 2307 |. load_got lj_dispatch_stitch 2308 | bnez RD, =>BC_JLOOP // Jump to stitched trace. 2309 |. sll RD, RD, 3 2310 | 2311 | // Stitch a new trace to the previous trace. 2312 | sw TMP3, DISPATCH_J(exitno)(DISPATCH) 2313 | sd L, DISPATCH_J(L)(DISPATCH) 2314 | sd BASE, L->base 2315 | daddiu CARG1, DISPATCH, GG_DISP2J 2316 | call_intern lj_dispatch_stitch // (jit_State *J, const BCIns *pc) 2317 |. move CARG2, PC 2318 | b ->cont_nop 2319 |. ld BASE, L->base 2320 | 2321 |9: 2322 | sd TISNIL, 0(RC) 2323 | b <3 2324 |. daddiu RC, RC, 8 2325 |.endif 2326 | 2327 |->vm_profhook: // Dispatch target for profiler hook. 2328#if LJ_HASPROFILE 2329 | load_got lj_dispatch_profile 2330 | sd MULTRES, SAVE_MULTRES 2331 | move CARG2, PC 2332 | sd BASE, L->base 2333 | call_intern lj_dispatch_profile // (lua_State *L, const BCIns *pc) 2334 |. move CARG1, L 2335 | // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction. 2336 | daddiu PC, PC, -4 2337 | b ->cont_nop 2338 |. ld BASE, L->base 2339#endif 2340 | 2341 |//----------------------------------------------------------------------- 2342 |//-- Trace exit handler ------------------------------------------------- 2343 |//----------------------------------------------------------------------- 2344 | 2345 |.macro savex_, a, b 2346 |.if FPU 2347 | sdc1 f..a, a*8(sp) 2348 | sdc1 f..b, b*8(sp) 2349 | sd r..a, 32*8+a*8(sp) 2350 | sd r..b, 32*8+b*8(sp) 2351 |.else 2352 | sd r..a, a*8(sp) 2353 | sd r..b, b*8(sp) 2354 |.endif 2355 |.endmacro 2356 | 2357 |->vm_exit_handler: 2358 |.if JIT 2359 |.if FPU 2360 | daddiu sp, sp, -(32*8+32*8) 2361 |.else 2362 | daddiu sp, sp, -(32*8) 2363 |.endif 2364 | savex_ 0, 1 2365 | savex_ 2, 3 2366 | savex_ 4, 5 2367 | savex_ 6, 7 2368 | savex_ 8, 9 2369 | savex_ 10, 11 2370 | savex_ 12, 13 2371 | savex_ 14, 15 2372 | savex_ 16, 17 2373 | savex_ 18, 19 2374 | savex_ 20, 21 2375 | savex_ 22, 23 2376 | savex_ 24, 25 2377 | savex_ 26, 27 2378 | savex_ 28, 30 2379 |.if FPU 2380 | sdc1 f29, 29*8(sp) 2381 | sdc1 f31, 31*8(sp) 2382 | sd r0, 32*8+31*8(sp) // Clear RID_TMP. 2383 | daddiu TMP2, sp, 32*8+32*8 // Recompute original value of sp. 2384 | sd TMP2, 32*8+29*8(sp) // Store sp in RID_SP 2385 |.else 2386 | sd r0, 31*8(sp) // Clear RID_TMP. 2387 | daddiu TMP2, sp, 32*8 // Recompute original value of sp. 2388 | sd TMP2, 29*8(sp) // Store sp in RID_SP 2389 |.endif 2390 | li_vmstate EXIT 2391 | daddiu DISPATCH, JGL, -GG_DISP2G-32768 2392 | lw TMP1, 0(TMP2) // Load exit number. 2393 | st_vmstate 2394 | ld L, DISPATCH_GL(cur_L)(DISPATCH) 2395 | ld BASE, DISPATCH_GL(jit_base)(DISPATCH) 2396 | load_got lj_trace_exit 2397 | sd L, DISPATCH_J(L)(DISPATCH) 2398 | sw ra, DISPATCH_J(parent)(DISPATCH) // Store trace number. 2399 | sd BASE, L->base 2400 | sw TMP1, DISPATCH_J(exitno)(DISPATCH) // Store exit number. 2401 | daddiu CARG1, DISPATCH, GG_DISP2J 2402 | sd r0, DISPATCH_GL(jit_base)(DISPATCH) 2403 | call_intern lj_trace_exit // (jit_State *J, ExitState *ex) 2404 |. move CARG2, sp 2405 | // Returns MULTRES (unscaled) or negated error code. 2406 | ld TMP1, L->cframe 2407 | li AT, -4 2408 | ld BASE, L->base 2409 | and sp, TMP1, AT 2410 | ld PC, SAVE_PC // Get SAVE_PC. 2411 | b >1 2412 |. sd L, SAVE_L // Set SAVE_L (on-trace resume/yield). 2413 |.endif 2414 |->vm_exit_interp: 2415 |.if JIT 2416 | // CRET1 = MULTRES or negated error code, BASE, PC and JGL set. 2417 | ld L, SAVE_L 2418 | daddiu DISPATCH, JGL, -GG_DISP2G-32768 2419 | sd BASE, L->base 2420 |1: 2421 | bltz CRET1, >9 // Check for error from exit. 2422 |. ld LFUNC:RB, FRAME_FUNC(BASE) 2423 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). 2424 | dsll MULTRES, CRET1, 3 2425 | cleartp LFUNC:RB 2426 | sd MULTRES, SAVE_MULTRES 2427 | li TISNIL, LJ_TNIL 2428 | li TISNUM, LJ_TISNUM // Setup type comparison constants. 2429 | .FPU mtc1 TMP3, TOBIT 2430 | ld TMP1, LFUNC:RB->pc 2431 | sd r0, DISPATCH_GL(jit_base)(DISPATCH) 2432 | ld KBASE, PC2PROTO(k)(TMP1) 2433 | .FPU cvt.d.s TOBIT, TOBIT 2434 | // Modified copy of ins_next which handles function header dispatch, too. 2435 | lw INS, 0(PC) 2436 | daddiu PC, PC, 4 2437 | // Assumes TISNIL == ~LJ_VMST_INTERP == -1 2438 | sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH) 2439 | decode_OP8a TMP1, INS 2440 | decode_OP8b TMP1 2441 | sltiu TMP2, TMP1, BC_FUNCF*8 2442 | daddu TMP0, DISPATCH, TMP1 2443 | decode_RD8a RD, INS 2444 | ld AT, 0(TMP0) 2445 | decode_RA8a RA, INS 2446 | beqz TMP2, >2 2447 |. decode_RA8b RA 2448 | jr AT 2449 |. decode_RD8b RD 2450 |2: 2451 | sltiu TMP2, TMP1, (BC_FUNCC+2)*8 // Fast function? 2452 | bnez TMP2, >3 2453 |. ld TMP1, FRAME_PC(BASE) 2454 | // Check frame below fast function. 2455 | andi TMP0, TMP1, FRAME_TYPE 2456 | bnez TMP0, >3 // Trace stitching continuation? 2457 |. nop 2458 | // Otherwise set KBASE for Lua function below fast function. 2459 | lw TMP2, -4(TMP1) 2460 | decode_RA8a TMP0, TMP2 2461 | decode_RA8b TMP0 2462 | dsubu TMP1, BASE, TMP0 2463 | ld LFUNC:TMP2, -32(TMP1) 2464 | cleartp LFUNC:TMP2 2465 | ld TMP1, LFUNC:TMP2->pc 2466 | ld KBASE, PC2PROTO(k)(TMP1) 2467 |3: 2468 | daddiu RC, MULTRES, -8 2469 | jr AT 2470 |. daddu RA, RA, BASE 2471 | 2472 |9: // Rethrow error from the right C frame. 2473 | load_got lj_err_throw 2474 | negu CARG2, CRET1 2475 | call_intern lj_err_throw // (lua_State *L, int errcode) 2476 |. move CARG1, L 2477 |.endif 2478 | 2479 |//----------------------------------------------------------------------- 2480 |//-- Math helper functions ---------------------------------------------- 2481 |//----------------------------------------------------------------------- 2482 | 2483 |// Hard-float round to integer. 2484 |// Modifies AT, TMP0, FRET1, FRET2, f4. Keeps all others incl. FARG1. 2485 |.macro vm_round_hf, func 2486 | lui TMP0, 0x4330 // Hiword of 2^52 (double). 2487 | dsll TMP0, TMP0, 32 2488 | dmtc1 TMP0, f4 2489 | abs.d FRET2, FARG1 // |x| 2490 | dmfc1 AT, FARG1 2491 | c.olt.d 0, FRET2, f4 2492 | add.d FRET1, FRET2, f4 // (|x| + 2^52) - 2^52 2493 | bc1f 0, >1 // Truncate only if |x| < 2^52. 2494 |. sub.d FRET1, FRET1, f4 2495 | slt AT, AT, r0 2496 |.if "func" == "ceil" 2497 | lui TMP0, 0xbff0 // Hiword of -1 (double). Preserves -0. 2498 |.else 2499 | lui TMP0, 0x3ff0 // Hiword of +1 (double). 2500 |.endif 2501 |.if "func" == "trunc" 2502 | dsll TMP0, TMP0, 32 2503 | dmtc1 TMP0, f4 2504 | c.olt.d 0, FRET2, FRET1 // |x| < result? 2505 | sub.d FRET2, FRET1, f4 2506 | movt.d FRET1, FRET2, 0 // If yes, subtract +1. 2507 | neg.d FRET2, FRET1 2508 | jr ra 2509 |. movn.d FRET1, FRET2, AT // Merge sign bit back in. 2510 |.else 2511 | neg.d FRET2, FRET1 2512 | dsll TMP0, TMP0, 32 2513 | dmtc1 TMP0, f4 2514 | movn.d FRET1, FRET2, AT // Merge sign bit back in. 2515 |.if "func" == "ceil" 2516 | c.olt.d 0, FRET1, FARG1 // x > result? 2517 |.else 2518 | c.olt.d 0, FARG1, FRET1 // x < result? 2519 |.endif 2520 | sub.d FRET2, FRET1, f4 // If yes, subtract +-1. 2521 | jr ra 2522 |. movt.d FRET1, FRET2, 0 2523 |.endif 2524 |1: 2525 | jr ra 2526 |. mov.d FRET1, FARG1 2527 |.endmacro 2528 | 2529 |.macro vm_round, func 2530 |.if FPU 2531 | vm_round_hf, func 2532 |.endif 2533 |.endmacro 2534 | 2535 |->vm_floor: 2536 | vm_round floor 2537 |->vm_ceil: 2538 | vm_round ceil 2539 |->vm_trunc: 2540 |.if JIT 2541 | vm_round trunc 2542 |.endif 2543 | 2544 |// Soft-float integer to number conversion. 2545 |.macro sfi2d, ARG 2546 |.if not FPU 2547 | beqz ARG, >9 // Handle zero first. 2548 |. sra TMP0, ARG, 31 2549 | xor TMP1, ARG, TMP0 2550 | dsubu TMP1, TMP1, TMP0 // Absolute value in TMP1. 2551 | dclz ARG, TMP1 2552 | addiu ARG, ARG, -11 2553 | li AT, 0x3ff+63-11-1 2554 | dsllv TMP1, TMP1, ARG // Align mantissa left with leading 1. 2555 | subu ARG, AT, ARG // Exponent - 1. 2556 | ins ARG, TMP0, 11, 11 // Sign | Exponent. 2557 | dsll ARG, ARG, 52 // Align left. 2558 | jr ra 2559 |. daddu ARG, ARG, TMP1 // Add mantissa, increment exponent. 2560 |9: 2561 | jr ra 2562 |. nop 2563 |.endif 2564 |.endmacro 2565 | 2566 |// Input CARG1. Output: CARG1. Temporaries: AT, TMP0, TMP1. 2567 |->vm_sfi2d_1: 2568 | sfi2d CARG1 2569 | 2570 |// Input CARG2. Output: CARG2. Temporaries: AT, TMP0, TMP1. 2571 |->vm_sfi2d_2: 2572 | sfi2d CARG2 2573 | 2574 |// Soft-float comparison. Equivalent to c.eq.d. 2575 |// Input: CARG*. Output: CRET1. Temporaries: AT, TMP0, TMP1. 2576 |->vm_sfcmpeq: 2577 |.if not FPU 2578 | dsll AT, CARG1, 1 2579 | dsll TMP0, CARG2, 1 2580 | or TMP1, AT, TMP0 2581 | beqz TMP1, >8 // Both args +-0: return 1. 2582 |. lui TMP1, 0xffe0 2583 | dsll TMP1, TMP1, 32 2584 | sltu AT, TMP1, AT 2585 | sltu TMP0, TMP1, TMP0 2586 | or TMP1, AT, TMP0 2587 | bnez TMP1, >9 // Either arg is NaN: return 0; 2588 |. xor AT, CARG1, CARG2 2589 | jr ra 2590 |. sltiu CRET1, AT, 1 // Same values: return 1. 2591 |8: 2592 | jr ra 2593 |. li CRET1, 1 2594 |9: 2595 | jr ra 2596 |. li CRET1, 0 2597 |.endif 2598 | 2599 |// Soft-float comparison. Equivalent to c.ult.d and c.olt.d. 2600 |// Input: CARG1, CARG2. Output: CRET1. Temporaries: AT, TMP0, TMP1, CRET2. 2601 |->vm_sfcmpult: 2602 |.if not FPU 2603 | b >1 2604 |. li CRET2, 1 2605 |.endif 2606 | 2607 |->vm_sfcmpolt: 2608 |.if not FPU 2609 | li CRET2, 0 2610 |1: 2611 | dsll AT, CARG1, 1 2612 | dsll TMP0, CARG2, 1 2613 | or TMP1, AT, TMP0 2614 | beqz TMP1, >8 // Both args +-0: return 0. 2615 |. lui TMP1, 0xffe0 2616 | dsll TMP1, TMP1, 32 2617 | sltu AT, TMP1, AT 2618 | sltu TMP0, TMP1, TMP0 2619 | or TMP1, AT, TMP0 2620 | bnez TMP1, >9 // Either arg is NaN: return 0 or 1; 2621 |. and AT, CARG1, CARG2 2622 | bltz AT, >5 // Both args negative? 2623 |. nop 2624 | jr ra 2625 |. slt CRET1, CARG1, CARG2 2626 |5: // Swap conditions if both operands are negative. 2627 | jr ra 2628 |. slt CRET1, CARG2, CARG1 2629 |8: 2630 | jr ra 2631 |. nop 2632 |9: 2633 | jr ra 2634 |. move CRET1, CRET2 2635 |.endif 2636 | 2637 |// Soft-float comparison. Equivalent to c.ole.d a, b or c.ole.d b, a. 2638 |// Input: CARG1, CARG2, TMP3. Output: CRET1. Temporaries: AT, TMP0, TMP1. 2639 |->vm_sfcmpolex: 2640 |.if not FPU 2641 | dsll AT, CARG1, 1 2642 | dsll TMP0, CARG2, 1 2643 | or TMP1, AT, TMP0 2644 | beqz TMP1, >8 // Both args +-0: return 1. 2645 |. lui TMP1, 0xffe0 2646 | dsll TMP1, TMP1, 32 2647 | sltu AT, TMP1, AT 2648 | sltu TMP0, TMP1, TMP0 2649 | or TMP1, AT, TMP0 2650 | bnez TMP1, >9 // Either arg is NaN: return 0; 2651 |. and AT, CARG1, CARG2 2652 | xor AT, AT, TMP3 2653 | bltz AT, >5 // Both args negative? 2654 |. nop 2655 | jr ra 2656 |. slt CRET1, CARG2, CARG1 2657 |5: // Swap conditions if both operands are negative. 2658 | jr ra 2659 |. slt CRET1, CARG1, CARG2 2660 |8: 2661 | jr ra 2662 |. li CRET1, 1 2663 |9: 2664 | jr ra 2665 |. li CRET1, 0 2666 |.endif 2667 | 2668 |//----------------------------------------------------------------------- 2669 |//-- Miscellaneous functions -------------------------------------------- 2670 |//----------------------------------------------------------------------- 2671 | 2672 |//----------------------------------------------------------------------- 2673 |//-- FFI helper functions ----------------------------------------------- 2674 |//----------------------------------------------------------------------- 2675 | 2676 |// Handler for callback functions. Callback slot number in r1, g in r2. 2677 |->vm_ffi_callback: 2678 |.if FFI 2679 |.type CTSTATE, CTState, PC 2680 | saveregs 2681 | ld CTSTATE, GL:r2->ctype_state 2682 | daddiu DISPATCH, r2, GG_G2DISP 2683 | load_got lj_ccallback_enter 2684 | sw r1, CTSTATE->cb.slot 2685 | sd CARG1, CTSTATE->cb.gpr[0] 2686 | .FPU sdc1 FARG1, CTSTATE->cb.fpr[0] 2687 | sd CARG2, CTSTATE->cb.gpr[1] 2688 | .FPU sdc1 FARG2, CTSTATE->cb.fpr[1] 2689 | sd CARG3, CTSTATE->cb.gpr[2] 2690 | .FPU sdc1 FARG3, CTSTATE->cb.fpr[2] 2691 | sd CARG4, CTSTATE->cb.gpr[3] 2692 | .FPU sdc1 FARG4, CTSTATE->cb.fpr[3] 2693 | sd CARG5, CTSTATE->cb.gpr[4] 2694 | .FPU sdc1 FARG5, CTSTATE->cb.fpr[4] 2695 | sd CARG6, CTSTATE->cb.gpr[5] 2696 | .FPU sdc1 FARG6, CTSTATE->cb.fpr[5] 2697 | sd CARG7, CTSTATE->cb.gpr[6] 2698 | .FPU sdc1 FARG7, CTSTATE->cb.fpr[6] 2699 | sd CARG8, CTSTATE->cb.gpr[7] 2700 | .FPU sdc1 FARG8, CTSTATE->cb.fpr[7] 2701 | daddiu TMP0, sp, CFRAME_SPACE 2702 | sd TMP0, CTSTATE->cb.stack 2703 | sd r0, SAVE_PC // Any value outside of bytecode is ok. 2704 | move CARG2, sp 2705 | call_intern lj_ccallback_enter // (CTState *cts, void *cf) 2706 |. move CARG1, CTSTATE 2707 | // Returns lua_State *. 2708 | ld BASE, L:CRET1->base 2709 | ld RC, L:CRET1->top 2710 | move L, CRET1 2711 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float). 2712 | ld LFUNC:RB, FRAME_FUNC(BASE) 2713 | .FPU mtc1 TMP3, TOBIT 2714 | li TISNIL, LJ_TNIL 2715 | li TISNUM, LJ_TISNUM 2716 | li_vmstate INTERP 2717 | subu RC, RC, BASE 2718 | cleartp LFUNC:RB 2719 | st_vmstate 2720 | .FPU cvt.d.s TOBIT, TOBIT 2721 | ins_callt 2722 |.endif 2723 | 2724 |->cont_ffi_callback: // Return from FFI callback. 2725 |.if FFI 2726 | load_got lj_ccallback_leave 2727 | ld CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH) 2728 | sd BASE, L->base 2729 | sd RB, L->top 2730 | sd L, CTSTATE->L 2731 | move CARG2, RA 2732 | call_intern lj_ccallback_leave // (CTState *cts, TValue *o) 2733 |. move CARG1, CTSTATE 2734 | .FPU ldc1 FRET1, CTSTATE->cb.fpr[0] 2735 | ld CRET1, CTSTATE->cb.gpr[0] 2736 | .FPU ldc1 FRET2, CTSTATE->cb.fpr[1] 2737 | b ->vm_leave_unw 2738 |. ld CRET2, CTSTATE->cb.gpr[1] 2739 |.endif 2740 | 2741 |->vm_ffi_call: // Call C function via FFI. 2742 | // Caveat: needs special frame unwinding, see below. 2743 |.if FFI 2744 | .type CCSTATE, CCallState, CARG1 2745 | lw TMP1, CCSTATE->spadj 2746 | lbu CARG2, CCSTATE->nsp 2747 | move TMP2, sp 2748 | dsubu sp, sp, TMP1 2749 | sd ra, -8(TMP2) 2750 | sll CARG2, CARG2, 3 2751 | sd r16, -16(TMP2) 2752 | sd CCSTATE, -24(TMP2) 2753 | move r16, TMP2 2754 | daddiu TMP1, CCSTATE, offsetof(CCallState, stack) 2755 | move TMP2, sp 2756 | beqz CARG2, >2 2757 |. daddu TMP3, TMP1, CARG2 2758 |1: 2759 | ld TMP0, 0(TMP1) 2760 | daddiu TMP1, TMP1, 8 2761 | sltu AT, TMP1, TMP3 2762 | sd TMP0, 0(TMP2) 2763 | bnez AT, <1 2764 |. daddiu TMP2, TMP2, 8 2765 |2: 2766 | ld CFUNCADDR, CCSTATE->func 2767 | .FPU ldc1 FARG1, CCSTATE->gpr[0] 2768 | ld CARG2, CCSTATE->gpr[1] 2769 | .FPU ldc1 FARG2, CCSTATE->gpr[1] 2770 | ld CARG3, CCSTATE->gpr[2] 2771 | .FPU ldc1 FARG3, CCSTATE->gpr[2] 2772 | ld CARG4, CCSTATE->gpr[3] 2773 | .FPU ldc1 FARG4, CCSTATE->gpr[3] 2774 | ld CARG5, CCSTATE->gpr[4] 2775 | .FPU ldc1 FARG5, CCSTATE->gpr[4] 2776 | ld CARG6, CCSTATE->gpr[5] 2777 | .FPU ldc1 FARG6, CCSTATE->gpr[5] 2778 | ld CARG7, CCSTATE->gpr[6] 2779 | .FPU ldc1 FARG7, CCSTATE->gpr[6] 2780 | ld CARG8, CCSTATE->gpr[7] 2781 | .FPU ldc1 FARG8, CCSTATE->gpr[7] 2782 | jalr CFUNCADDR 2783 |. ld CARG1, CCSTATE->gpr[0] // Do this last, since CCSTATE is CARG1. 2784 | ld CCSTATE:TMP1, -24(r16) 2785 | ld TMP2, -16(r16) 2786 | ld ra, -8(r16) 2787 | sd CRET1, CCSTATE:TMP1->gpr[0] 2788 | sd CRET2, CCSTATE:TMP1->gpr[1] 2789 |.if FPU 2790 | sdc1 FRET1, CCSTATE:TMP1->fpr[0] 2791 | sdc1 FRET2, CCSTATE:TMP1->fpr[1] 2792 |.else 2793 | sd CARG1, CCSTATE:TMP1->gpr[2] // 2nd FP struct field for soft-float. 2794 |.endif 2795 | move sp, r16 2796 | jr ra 2797 |. move r16, TMP2 2798 |.endif 2799 |// Note: vm_ffi_call must be the last function in this object file! 2800 | 2801 |//----------------------------------------------------------------------- 2802} 2803 2804/* Generate the code for a single instruction. */ 2805static void build_ins(BuildCtx *ctx, BCOp op, int defop) 2806{ 2807 int vk = 0; 2808 |=>defop: 2809 2810 switch (op) { 2811 2812 /* -- Comparison ops ---------------------------------------------------- */ 2813 2814 /* Remember: all ops branch for a true comparison, fall through otherwise. */ 2815 2816 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT: 2817 | // RA = src1*8, RD = src2*8, JMP with RD = target 2818 |.macro bc_comp, FRA, FRD, ARGRA, ARGRD, movop, fmovop, fcomp, sfcomp 2819 | daddu RA, BASE, RA 2820 | daddu RD, BASE, RD 2821 | ld ARGRA, 0(RA) 2822 | ld ARGRD, 0(RD) 2823 | lhu TMP2, OFS_RD(PC) 2824 | gettp CARG3, ARGRA 2825 | gettp CARG4, ARGRD 2826 | bne CARG3, TISNUM, >2 2827 |. daddiu PC, PC, 4 2828 | bne CARG4, TISNUM, >5 2829 |. decode_RD4b TMP2 2830 | sextw ARGRA, ARGRA 2831 | sextw ARGRD, ARGRD 2832 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 2833 | slt AT, CARG1, CARG2 2834 | addu TMP2, TMP2, TMP3 2835 | movop TMP2, r0, AT 2836 |1: 2837 | daddu PC, PC, TMP2 2838 | ins_next 2839 | 2840 |2: // RA is not an integer. 2841 | sltiu AT, CARG3, LJ_TISNUM 2842 | beqz AT, ->vmeta_comp 2843 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 2844 | sltiu AT, CARG4, LJ_TISNUM 2845 | beqz AT, >4 2846 |. decode_RD4b TMP2 2847 |.if FPU 2848 | ldc1 FRA, 0(RA) 2849 | ldc1 FRD, 0(RD) 2850 |.endif 2851 |3: // RA and RD are both numbers. 2852 |.if FPU 2853 | fcomp f20, f22 2854 | addu TMP2, TMP2, TMP3 2855 | b <1 2856 |. fmovop TMP2, r0 2857 |.else 2858 | bal sfcomp 2859 |. addu TMP2, TMP2, TMP3 2860 | b <1 2861 |. movop TMP2, r0, CRET1 2862 |.endif 2863 | 2864 |4: // RA is a number, RD is not a number. 2865 | bne CARG4, TISNUM, ->vmeta_comp 2866 | // RA is a number, RD is an integer. Convert RD to a number. 2867 |.if FPU 2868 |. lwc1 FRD, LO(RD) 2869 | ldc1 FRA, 0(RA) 2870 | b <3 2871 |. cvt.d.w FRD, FRD 2872 |.else 2873 |.if "ARGRD" == "CARG1" 2874 |. sextw CARG1, CARG1 2875 | bal ->vm_sfi2d_1 2876 |. nop 2877 |.else 2878 |. sextw CARG2, CARG2 2879 | bal ->vm_sfi2d_2 2880 |. nop 2881 |.endif 2882 | b <3 2883 |. nop 2884 |.endif 2885 | 2886 |5: // RA is an integer, RD is not an integer 2887 | sltiu AT, CARG4, LJ_TISNUM 2888 | beqz AT, ->vmeta_comp 2889 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 2890 | // RA is an integer, RD is a number. Convert RA to a number. 2891 |.if FPU 2892 | lwc1 FRA, LO(RA) 2893 | ldc1 FRD, 0(RD) 2894 | b <3 2895 | cvt.d.w FRA, FRA 2896 |.else 2897 |.if "ARGRA" == "CARG1" 2898 | bal ->vm_sfi2d_1 2899 |. sextw CARG1, CARG1 2900 |.else 2901 | bal ->vm_sfi2d_2 2902 |. sextw CARG2, CARG2 2903 |.endif 2904 | b <3 2905 |. nop 2906 |.endif 2907 |.endmacro 2908 | 2909 if (op == BC_ISLT) { 2910 | bc_comp f20, f22, CARG1, CARG2, movz, movf, c.olt.d, ->vm_sfcmpolt 2911 } else if (op == BC_ISGE) { 2912 | bc_comp f20, f22, CARG1, CARG2, movn, movt, c.olt.d, ->vm_sfcmpolt 2913 } else if (op == BC_ISLE) { 2914 | bc_comp f22, f20, CARG2, CARG1, movn, movt, c.ult.d, ->vm_sfcmpult 2915 } else { 2916 | bc_comp f22, f20, CARG2, CARG1, movz, movf, c.ult.d, ->vm_sfcmpult 2917 } 2918 break; 2919 2920 case BC_ISEQV: case BC_ISNEV: 2921 vk = op == BC_ISEQV; 2922 | // RA = src1*8, RD = src2*8, JMP with RD = target 2923 | daddu RA, BASE, RA 2924 | daddiu PC, PC, 4 2925 | daddu RD, BASE, RD 2926 | ld CARG1, 0(RA) 2927 | lhu TMP2, -4+OFS_RD(PC) 2928 | ld CARG2, 0(RD) 2929 | gettp CARG3, CARG1 2930 | gettp CARG4, CARG2 2931 | sltu AT, TISNUM, CARG3 2932 | sltu TMP1, TISNUM, CARG4 2933 | or AT, AT, TMP1 2934 if (vk) { 2935 | beqz AT, ->BC_ISEQN_Z 2936 } else { 2937 | beqz AT, ->BC_ISNEN_Z 2938 } 2939 | // Either or both types are not numbers. 2940 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 2941 |.if FFI 2942 |. li AT, LJ_TCDATA 2943 | beq CARG3, AT, ->vmeta_equal_cd 2944 |.endif 2945 | decode_RD4b TMP2 2946 |.if FFI 2947 | beq CARG4, AT, ->vmeta_equal_cd 2948 |. nop 2949 |.endif 2950 | bne CARG1, CARG2, >2 2951 |. addu TMP2, TMP2, TMP3 2952 | // Tag and value are equal. 2953 if (vk) { 2954 |->BC_ISEQV_Z: 2955 | daddu PC, PC, TMP2 2956 } 2957 |1: 2958 | ins_next 2959 | 2960 |2: // Check if the tags are the same and it's a table or userdata. 2961 | xor AT, CARG3, CARG4 // Same type? 2962 | sltiu TMP0, CARG3, LJ_TISTABUD+1 // Table or userdata? 2963 | movn TMP0, r0, AT 2964 if (vk) { 2965 | beqz TMP0, <1 2966 } else { 2967 | beqz TMP0, ->BC_ISEQV_Z // Reuse code from opposite instruction. 2968 } 2969 | // Different tables or userdatas. Need to check __eq metamethod. 2970 | // Field metatable must be at same offset for GCtab and GCudata! 2971 |. cleartp TAB:TMP1, CARG1 2972 | ld TAB:TMP3, TAB:TMP1->metatable 2973 if (vk) { 2974 | beqz TAB:TMP3, <1 // No metatable? 2975 |. nop 2976 | lbu TMP3, TAB:TMP3->nomm 2977 | andi TMP3, TMP3, 1<<MM_eq 2978 | bnez TMP3, >1 // Or 'no __eq' flag set? 2979 } else { 2980 | beqz TAB:TMP3,->BC_ISEQV_Z // No metatable? 2981 |. nop 2982 | lbu TMP3, TAB:TMP3->nomm 2983 | andi TMP3, TMP3, 1<<MM_eq 2984 | bnez TMP3, ->BC_ISEQV_Z // Or 'no __eq' flag set? 2985 } 2986 |. nop 2987 | b ->vmeta_equal // Handle __eq metamethod. 2988 |. li TMP0, 1-vk // ne = 0 or 1. 2989 break; 2990 2991 case BC_ISEQS: case BC_ISNES: 2992 vk = op == BC_ISEQS; 2993 | // RA = src*8, RD = str_const*8 (~), JMP with RD = target 2994 | daddu RA, BASE, RA 2995 | daddiu PC, PC, 4 2996 | ld CARG1, 0(RA) 2997 | dsubu RD, KBASE, RD 2998 | lhu TMP2, -4+OFS_RD(PC) 2999 | ld CARG2, -8(RD) // KBASE-8-str_const*8 3000 |.if FFI 3001 | gettp TMP0, CARG1 3002 | li AT, LJ_TCDATA 3003 |.endif 3004 | li TMP1, LJ_TSTR 3005 | decode_RD4b TMP2 3006 |.if FFI 3007 | beq TMP0, AT, ->vmeta_equal_cd 3008 |.endif 3009 |. settp CARG2, TMP1 3010 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 3011 | xor TMP1, CARG1, CARG2 3012 | addu TMP2, TMP2, TMP3 3013 if (vk) { 3014 | movn TMP2, r0, TMP1 3015 } else { 3016 | movz TMP2, r0, TMP1 3017 } 3018 | daddu PC, PC, TMP2 3019 | ins_next 3020 break; 3021 3022 case BC_ISEQN: case BC_ISNEN: 3023 vk = op == BC_ISEQN; 3024 | // RA = src*8, RD = num_const*8, JMP with RD = target 3025 | daddu RA, BASE, RA 3026 | daddu RD, KBASE, RD 3027 | ld CARG1, 0(RA) 3028 | ld CARG2, 0(RD) 3029 | lhu TMP2, OFS_RD(PC) 3030 | gettp CARG3, CARG1 3031 | gettp CARG4, CARG2 3032 | daddiu PC, PC, 4 3033 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 3034 if (vk) { 3035 |->BC_ISEQN_Z: 3036 } else { 3037 |->BC_ISNEN_Z: 3038 } 3039 | bne CARG3, TISNUM, >3 3040 |. decode_RD4b TMP2 3041 | bne CARG4, TISNUM, >6 3042 |. addu TMP2, TMP2, TMP3 3043 | xor AT, CARG1, CARG2 3044 if (vk) { 3045 | movn TMP2, r0, AT 3046 |1: 3047 | daddu PC, PC, TMP2 3048 |2: 3049 } else { 3050 | movz TMP2, r0, AT 3051 |1: 3052 |2: 3053 | daddu PC, PC, TMP2 3054 } 3055 | ins_next 3056 | 3057 |3: // RA is not an integer. 3058 | sltu AT, CARG3, TISNUM 3059 |.if FFI 3060 | beqz AT, >8 3061 |.else 3062 | beqz AT, <2 3063 |.endif 3064 |. addu TMP2, TMP2, TMP3 3065 | sltu AT, CARG4, TISNUM 3066 |.if FPU 3067 | ldc1 f20, 0(RA) 3068 | ldc1 f22, 0(RD) 3069 |.endif 3070 | beqz AT, >5 3071 |. nop 3072 |4: // RA and RD are both numbers. 3073 |.if FPU 3074 | c.eq.d f20, f22 3075 | b <1 3076 if (vk) { 3077 |. movf TMP2, r0 3078 } else { 3079 |. movt TMP2, r0 3080 } 3081 |.else 3082 | bal ->vm_sfcmpeq 3083 |. nop 3084 | b <1 3085 if (vk) { 3086 |. movz TMP2, r0, CRET1 3087 } else { 3088 |. movn TMP2, r0, CRET1 3089 } 3090 |.endif 3091 | 3092 |5: // RA is a number, RD is not a number. 3093 |.if FFI 3094 | bne CARG4, TISNUM, >9 3095 |.else 3096 | bne CARG4, TISNUM, <2 3097 |.endif 3098 | // RA is a number, RD is an integer. Convert RD to a number. 3099 |.if FPU 3100 |. lwc1 f22, LO(RD) 3101 | b <4 3102 |. cvt.d.w f22, f22 3103 |.else 3104 |. sextw CARG2, CARG2 3105 | bal ->vm_sfi2d_2 3106 |. nop 3107 | b <4 3108 |. nop 3109 |.endif 3110 | 3111 |6: // RA is an integer, RD is not an integer 3112 | sltu AT, CARG4, TISNUM 3113 |.if FFI 3114 | beqz AT, >9 3115 |.else 3116 | beqz AT, <2 3117 |.endif 3118 | // RA is an integer, RD is a number. Convert RA to a number. 3119 |.if FPU 3120 |. lwc1 f20, LO(RA) 3121 | ldc1 f22, 0(RD) 3122 | b <4 3123 | cvt.d.w f20, f20 3124 |.else 3125 |. sextw CARG1, CARG1 3126 | bal ->vm_sfi2d_1 3127 |. nop 3128 | b <4 3129 |. nop 3130 |.endif 3131 | 3132 |.if FFI 3133 |8: 3134 | li AT, LJ_TCDATA 3135 | bne CARG3, AT, <2 3136 |. nop 3137 | b ->vmeta_equal_cd 3138 |. nop 3139 |9: 3140 | li AT, LJ_TCDATA 3141 | bne CARG4, AT, <2 3142 |. nop 3143 | b ->vmeta_equal_cd 3144 |. nop 3145 |.endif 3146 break; 3147 3148 case BC_ISEQP: case BC_ISNEP: 3149 vk = op == BC_ISEQP; 3150 | // RA = src*8, RD = primitive_type*8 (~), JMP with RD = target 3151 | daddu RA, BASE, RA 3152 | srl TMP1, RD, 3 3153 | ld TMP0, 0(RA) 3154 | lhu TMP2, OFS_RD(PC) 3155 | not TMP1, TMP1 3156 | gettp TMP0, TMP0 3157 | daddiu PC, PC, 4 3158 |.if FFI 3159 | li AT, LJ_TCDATA 3160 | beq TMP0, AT, ->vmeta_equal_cd 3161 |.endif 3162 |. xor TMP0, TMP0, TMP1 3163 | decode_RD4b TMP2 3164 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 3165 | addu TMP2, TMP2, TMP3 3166 if (vk) { 3167 | movn TMP2, r0, TMP0 3168 } else { 3169 | movz TMP2, r0, TMP0 3170 } 3171 | daddu PC, PC, TMP2 3172 | ins_next 3173 break; 3174 3175 /* -- Unary test and copy ops ------------------------------------------- */ 3176 3177 case BC_ISTC: case BC_ISFC: case BC_IST: case BC_ISF: 3178 | // RA = dst*8 or unused, RD = src*8, JMP with RD = target 3179 | daddu RD, BASE, RD 3180 | lhu TMP2, OFS_RD(PC) 3181 | ld TMP0, 0(RD) 3182 | daddiu PC, PC, 4 3183 | gettp TMP0, TMP0 3184 | sltiu TMP0, TMP0, LJ_TISTRUECOND 3185 if (op == BC_IST || op == BC_ISF) { 3186 | decode_RD4b TMP2 3187 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 3188 | addu TMP2, TMP2, TMP3 3189 if (op == BC_IST) { 3190 | movz TMP2, r0, TMP0 3191 } else { 3192 | movn TMP2, r0, TMP0 3193 } 3194 | daddu PC, PC, TMP2 3195 } else { 3196 | ld CRET1, 0(RD) 3197 if (op == BC_ISTC) { 3198 | beqz TMP0, >1 3199 } else { 3200 | bnez TMP0, >1 3201 } 3202 |. daddu RA, BASE, RA 3203 | decode_RD4b TMP2 3204 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 3205 | addu TMP2, TMP2, TMP3 3206 | sd CRET1, 0(RA) 3207 | daddu PC, PC, TMP2 3208 |1: 3209 } 3210 | ins_next 3211 break; 3212 3213 case BC_ISTYPE: 3214 | // RA = src*8, RD = -type*8 3215 | daddu TMP2, BASE, RA 3216 | srl TMP1, RD, 3 3217 | ld TMP0, 0(TMP2) 3218 | ins_next1 3219 | gettp TMP0, TMP0 3220 | daddu AT, TMP0, TMP1 3221 | bnez AT, ->vmeta_istype 3222 |. ins_next2 3223 break; 3224 case BC_ISNUM: 3225 | // RA = src*8, RD = -(TISNUM-1)*8 3226 | daddu TMP2, BASE, RA 3227 | ld TMP0, 0(TMP2) 3228 | ins_next1 3229 | checknum TMP0, ->vmeta_istype 3230 |. ins_next2 3231 break; 3232 3233 /* -- Unary ops --------------------------------------------------------- */ 3234 3235 case BC_MOV: 3236 | // RA = dst*8, RD = src*8 3237 | daddu RD, BASE, RD 3238 | daddu RA, BASE, RA 3239 | ld CRET1, 0(RD) 3240 | ins_next1 3241 | sd CRET1, 0(RA) 3242 | ins_next2 3243 break; 3244 case BC_NOT: 3245 | // RA = dst*8, RD = src*8 3246 | daddu RD, BASE, RD 3247 | daddu RA, BASE, RA 3248 | ld TMP0, 0(RD) 3249 | li AT, LJ_TTRUE 3250 | gettp TMP0, TMP0 3251 | sltu TMP0, AT, TMP0 3252 | addiu TMP0, TMP0, 1 3253 | dsll TMP0, TMP0, 47 3254 | not TMP0, TMP0 3255 | ins_next1 3256 | sd TMP0, 0(RA) 3257 | ins_next2 3258 break; 3259 case BC_UNM: 3260 | // RA = dst*8, RD = src*8 3261 | daddu RB, BASE, RD 3262 | ld CARG1, 0(RB) 3263 | daddu RA, BASE, RA 3264 | gettp CARG3, CARG1 3265 | bne CARG3, TISNUM, >2 3266 |. lui TMP1, 0x8000 3267 | sextw CARG1, CARG1 3268 | beq CARG1, TMP1, ->vmeta_unm // Meta handler deals with -2^31. 3269 |. negu CARG1, CARG1 3270 | zextw CARG1, CARG1 3271 | settp CARG1, TISNUM 3272 |1: 3273 | ins_next1 3274 | sd CARG1, 0(RA) 3275 | ins_next2 3276 |2: 3277 | sltiu AT, CARG3, LJ_TISNUM 3278 | beqz AT, ->vmeta_unm 3279 |. dsll TMP1, TMP1, 32 3280 | b <1 3281 |. xor CARG1, CARG1, TMP1 3282 break; 3283 case BC_LEN: 3284 | // RA = dst*8, RD = src*8 3285 | daddu CARG2, BASE, RD 3286 | daddu RA, BASE, RA 3287 | ld TMP0, 0(CARG2) 3288 | gettp TMP1, TMP0 3289 | daddiu AT, TMP1, -LJ_TSTR 3290 | bnez AT, >2 3291 |. cleartp STR:CARG1, TMP0 3292 | lw CRET1, STR:CARG1->len 3293 |1: 3294 | settp CRET1, TISNUM 3295 | ins_next1 3296 | sd CRET1, 0(RA) 3297 | ins_next2 3298 |2: 3299 | daddiu AT, TMP1, -LJ_TTAB 3300 | bnez AT, ->vmeta_len 3301 |. nop 3302#if LJ_52 3303 | ld TAB:TMP2, TAB:CARG1->metatable 3304 | bnez TAB:TMP2, >9 3305 |. nop 3306 |3: 3307#endif 3308 |->BC_LEN_Z: 3309 | load_got lj_tab_len 3310 | call_intern lj_tab_len // (GCtab *t) 3311 |. nop 3312 | // Returns uint32_t (but less than 2^31). 3313 | b <1 3314 |. nop 3315#if LJ_52 3316 |9: 3317 | lbu TMP0, TAB:TMP2->nomm 3318 | andi TMP0, TMP0, 1<<MM_len 3319 | bnez TMP0, <3 // 'no __len' flag set: done. 3320 |. nop 3321 | b ->vmeta_len 3322 |. nop 3323#endif 3324 break; 3325 3326 /* -- Binary ops -------------------------------------------------------- */ 3327 3328 |.macro fpmod, a, b, c 3329 | bal ->vm_floor // floor(b/c) 3330 |. div.d FARG1, b, c 3331 | mul.d a, FRET1, c 3332 | sub.d a, b, a // b - floor(b/c)*c 3333 |.endmacro 3334 3335 |.macro sfpmod 3336 | daddiu sp, sp, -16 3337 | 3338 | load_got __divdf3 3339 | sd CARG1, 0(sp) 3340 | call_extern 3341 |. sd CARG2, 8(sp) 3342 | 3343 | load_got floor 3344 | call_extern 3345 |. move CARG1, CRET1 3346 | 3347 | load_got __muldf3 3348 | move CARG1, CRET1 3349 | call_extern 3350 |. ld CARG2, 8(sp) 3351 | 3352 | load_got __subdf3 3353 | ld CARG1, 0(sp) 3354 | call_extern 3355 |. move CARG2, CRET1 3356 | 3357 | daddiu sp, sp, 16 3358 |.endmacro 3359 3360 |.macro ins_arithpre, label 3361 ||vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN); 3362 | // RA = dst*8, RB = src1*8, RC = src2*8 | num_const*8 3363 ||switch (vk) { 3364 ||case 0: 3365 | decode_RB8a RB, INS 3366 | decode_RB8b RB 3367 | decode_RDtoRC8 RC, RD 3368 | // RA = dst*8, RB = src1*8, RC = num_const*8 3369 | daddu RB, BASE, RB 3370 |.if "label" ~= "none" 3371 | b label 3372 |.endif 3373 |. daddu RC, KBASE, RC 3374 || break; 3375 ||case 1: 3376 | decode_RB8a RC, INS 3377 | decode_RB8b RC 3378 | decode_RDtoRC8 RB, RD 3379 | // RA = dst*8, RB = num_const*8, RC = src1*8 3380 | daddu RC, BASE, RC 3381 |.if "label" ~= "none" 3382 | b label 3383 |.endif 3384 |. daddu RB, KBASE, RB 3385 || break; 3386 ||default: 3387 | decode_RB8a RB, INS 3388 | decode_RB8b RB 3389 | decode_RDtoRC8 RC, RD 3390 | // RA = dst*8, RB = src1*8, RC = src2*8 3391 | daddu RB, BASE, RB 3392 |.if "label" ~= "none" 3393 | b label 3394 |.endif 3395 |. daddu RC, BASE, RC 3396 || break; 3397 ||} 3398 |.endmacro 3399 | 3400 |.macro ins_arith, intins, fpins, fpcall, label 3401 | ins_arithpre none 3402 | 3403 |.if "label" ~= "none" 3404 |label: 3405 |.endif 3406 | 3407 |// Used in 5. 3408 | ld CARG1, 0(RB) 3409 | ld CARG2, 0(RC) 3410 | gettp TMP0, CARG1 3411 | gettp TMP1, CARG2 3412 | 3413 |.if "intins" ~= "div" 3414 | 3415 | // Check for two integers. 3416 | sextw CARG3, CARG1 3417 | bne TMP0, TISNUM, >5 3418 |. sextw CARG4, CARG2 3419 | bne TMP1, TISNUM, >5 3420 | 3421 |.if "intins" == "addu" 3422 |. intins CRET1, CARG3, CARG4 3423 | xor TMP1, CRET1, CARG3 // ((y^a) & (y^b)) < 0: overflow. 3424 | xor TMP2, CRET1, CARG4 3425 | and TMP1, TMP1, TMP2 3426 | bltz TMP1, ->vmeta_arith 3427 |. daddu RA, BASE, RA 3428 |.elif "intins" == "subu" 3429 |. intins CRET1, CARG3, CARG4 3430 | xor TMP1, CRET1, CARG3 // ((y^a) & (a^b)) < 0: overflow. 3431 | xor TMP2, CARG3, CARG4 3432 | and TMP1, TMP1, TMP2 3433 | bltz TMP1, ->vmeta_arith 3434 |. daddu RA, BASE, RA 3435 |.elif "intins" == "mult" 3436 |. intins CARG3, CARG4 3437 | mflo CRET1 3438 | mfhi TMP2 3439 | sra TMP1, CRET1, 31 3440 | bne TMP1, TMP2, ->vmeta_arith 3441 |. daddu RA, BASE, RA 3442 |.else 3443 |. load_got lj_vm_modi 3444 | beqz CARG4, ->vmeta_arith 3445 |. daddu RA, BASE, RA 3446 | move CARG1, CARG3 3447 | call_extern 3448 |. move CARG2, CARG4 3449 |.endif 3450 | 3451 | zextw CRET1, CRET1 3452 | settp CRET1, TISNUM 3453 | ins_next1 3454 | sd CRET1, 0(RA) 3455 |3: 3456 | ins_next2 3457 | 3458 |.endif 3459 | 3460 |5: // Check for two numbers. 3461 | .FPU ldc1 f20, 0(RB) 3462 | sltu AT, TMP0, TISNUM 3463 | sltu TMP0, TMP1, TISNUM 3464 | .FPU ldc1 f22, 0(RC) 3465 | and AT, AT, TMP0 3466 | beqz AT, ->vmeta_arith 3467 |. daddu RA, BASE, RA 3468 | 3469 |.if FPU 3470 | fpins FRET1, f20, f22 3471 |.elif "fpcall" == "sfpmod" 3472 | sfpmod 3473 |.else 3474 | load_got fpcall 3475 | call_extern 3476 |. nop 3477 |.endif 3478 | 3479 | ins_next1 3480 |.if "intins" ~= "div" 3481 | b <3 3482 |.endif 3483 |.if FPU 3484 |. sdc1 FRET1, 0(RA) 3485 |.else 3486 |. sd CRET1, 0(RA) 3487 |.endif 3488 |.if "intins" == "div" 3489 | ins_next2 3490 |.endif 3491 | 3492 |.endmacro 3493 3494 case BC_ADDVN: case BC_ADDNV: case BC_ADDVV: 3495 | ins_arith addu, add.d, __adddf3, none 3496 break; 3497 case BC_SUBVN: case BC_SUBNV: case BC_SUBVV: 3498 | ins_arith subu, sub.d, __subdf3, none 3499 break; 3500 case BC_MULVN: case BC_MULNV: case BC_MULVV: 3501 | ins_arith mult, mul.d, __muldf3, none 3502 break; 3503 case BC_DIVVN: 3504 | ins_arith div, div.d, __divdf3, ->BC_DIVVN_Z 3505 break; 3506 case BC_DIVNV: case BC_DIVVV: 3507 | ins_arithpre ->BC_DIVVN_Z 3508 break; 3509 case BC_MODVN: 3510 | ins_arith modi, fpmod, sfpmod, ->BC_MODVN_Z 3511 break; 3512 case BC_MODNV: case BC_MODVV: 3513 | ins_arithpre ->BC_MODVN_Z 3514 break; 3515 case BC_POW: 3516 | ins_arithpre none 3517 | ld CARG1, 0(RB) 3518 | ld CARG2, 0(RC) 3519 | gettp TMP0, CARG1 3520 | gettp TMP1, CARG2 3521 | sltiu TMP0, TMP0, LJ_TISNUM 3522 | sltiu TMP1, TMP1, LJ_TISNUM 3523 | and AT, TMP0, TMP1 3524 | load_got pow 3525 | beqz AT, ->vmeta_arith 3526 |. daddu RA, BASE, RA 3527 |.if FPU 3528 | ldc1 FARG1, 0(RB) 3529 | ldc1 FARG2, 0(RC) 3530 |.endif 3531 | call_extern 3532 |. nop 3533 | ins_next1 3534 |.if FPU 3535 | sdc1 FRET1, 0(RA) 3536 |.else 3537 | sd CRET1, 0(RA) 3538 |.endif 3539 | ins_next2 3540 break; 3541 3542 case BC_CAT: 3543 | // RA = dst*8, RB = src_start*8, RC = src_end*8 3544 | decode_RB8a RB, INS 3545 | decode_RB8b RB 3546 | decode_RDtoRC8 RC, RD 3547 | dsubu CARG3, RC, RB 3548 | sd BASE, L->base 3549 | daddu CARG2, BASE, RC 3550 | move MULTRES, RB 3551 |->BC_CAT_Z: 3552 | load_got lj_meta_cat 3553 | srl CARG3, CARG3, 3 3554 | sd PC, SAVE_PC 3555 | call_intern lj_meta_cat // (lua_State *L, TValue *top, int left) 3556 |. move CARG1, L 3557 | // Returns NULL (finished) or TValue * (metamethod). 3558 | bnez CRET1, ->vmeta_binop 3559 |. ld BASE, L->base 3560 | daddu RB, BASE, MULTRES 3561 | ld CRET1, 0(RB) 3562 | daddu RA, BASE, RA 3563 | ins_next1 3564 | sd CRET1, 0(RA) 3565 | ins_next2 3566 break; 3567 3568 /* -- Constant ops ------------------------------------------------------ */ 3569 3570 case BC_KSTR: 3571 | // RA = dst*8, RD = str_const*8 (~) 3572 | dsubu TMP1, KBASE, RD 3573 | ins_next1 3574 | li TMP2, LJ_TSTR 3575 | ld TMP0, -8(TMP1) // KBASE-8-str_const*8 3576 | daddu RA, BASE, RA 3577 | settp TMP0, TMP2 3578 | sd TMP0, 0(RA) 3579 | ins_next2 3580 break; 3581 case BC_KCDATA: 3582 |.if FFI 3583 | // RA = dst*8, RD = cdata_const*8 (~) 3584 | dsubu TMP1, KBASE, RD 3585 | ins_next1 3586 | ld TMP0, -8(TMP1) // KBASE-8-cdata_const*8 3587 | li TMP2, LJ_TCDATA 3588 | daddu RA, BASE, RA 3589 | settp TMP0, TMP2 3590 | sd TMP0, 0(RA) 3591 | ins_next2 3592 |.endif 3593 break; 3594 case BC_KSHORT: 3595 | // RA = dst*8, RD = int16_literal*8 3596 | sra RD, INS, 16 3597 | daddu RA, BASE, RA 3598 | zextw RD, RD 3599 | ins_next1 3600 | settp RD, TISNUM 3601 | sd RD, 0(RA) 3602 | ins_next2 3603 break; 3604 case BC_KNUM: 3605 | // RA = dst*8, RD = num_const*8 3606 | daddu RD, KBASE, RD 3607 | daddu RA, BASE, RA 3608 | ld CRET1, 0(RD) 3609 | ins_next1 3610 | sd CRET1, 0(RA) 3611 | ins_next2 3612 break; 3613 case BC_KPRI: 3614 | // RA = dst*8, RD = primitive_type*8 (~) 3615 | daddu RA, BASE, RA 3616 | dsll TMP0, RD, 44 3617 | not TMP0, TMP0 3618 | ins_next1 3619 | sd TMP0, 0(RA) 3620 | ins_next2 3621 break; 3622 case BC_KNIL: 3623 | // RA = base*8, RD = end*8 3624 | daddu RA, BASE, RA 3625 | sd TISNIL, 0(RA) 3626 | daddiu RA, RA, 8 3627 | daddu RD, BASE, RD 3628 |1: 3629 | sd TISNIL, 0(RA) 3630 | slt AT, RA, RD 3631 | bnez AT, <1 3632 |. daddiu RA, RA, 8 3633 | ins_next_ 3634 break; 3635 3636 /* -- Upvalue and function ops ------------------------------------------ */ 3637 3638 case BC_UGET: 3639 | // RA = dst*8, RD = uvnum*8 3640 | ld LFUNC:RB, FRAME_FUNC(BASE) 3641 | daddu RA, BASE, RA 3642 | cleartp LFUNC:RB 3643 | daddu RD, RD, LFUNC:RB 3644 | ld UPVAL:RB, LFUNC:RD->uvptr 3645 | ins_next1 3646 | ld TMP1, UPVAL:RB->v 3647 | ld CRET1, 0(TMP1) 3648 | sd CRET1, 0(RA) 3649 | ins_next2 3650 break; 3651 case BC_USETV: 3652 | // RA = uvnum*8, RD = src*8 3653 | ld LFUNC:RB, FRAME_FUNC(BASE) 3654 | daddu RD, BASE, RD 3655 | cleartp LFUNC:RB 3656 | daddu RA, RA, LFUNC:RB 3657 | ld UPVAL:RB, LFUNC:RA->uvptr 3658 | ld CRET1, 0(RD) 3659 | lbu TMP3, UPVAL:RB->marked 3660 | ld CARG2, UPVAL:RB->v 3661 | andi TMP3, TMP3, LJ_GC_BLACK // isblack(uv) 3662 | lbu TMP0, UPVAL:RB->closed 3663 | gettp TMP2, RD 3664 | sd CRET1, 0(CARG2) 3665 | li AT, LJ_GC_BLACK|1 3666 | or TMP3, TMP3, TMP0 3667 | beq TMP3, AT, >2 // Upvalue is closed and black? 3668 |. daddiu TMP2, TMP2, -(LJ_TNUMX+1) 3669 |1: 3670 | ins_next 3671 | 3672 |2: // Check if new value is collectable. 3673 | sltiu AT, TMP2, LJ_TISGCV - (LJ_TNUMX+1) 3674 | beqz AT, <1 // tvisgcv(v) 3675 |. cleartp GCOBJ:TMP1, RB 3676 | lbu TMP3, GCOBJ:TMP1->gch.marked 3677 | andi TMP3, TMP3, LJ_GC_WHITES // iswhite(v) 3678 | beqz TMP3, <1 3679 |. load_got lj_gc_barrieruv 3680 | // Crossed a write barrier. Move the barrier forward. 3681 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv) 3682 |. daddiu CARG1, DISPATCH, GG_DISP2G 3683 | b <1 3684 |. nop 3685 break; 3686 case BC_USETS: 3687 | // RA = uvnum*8, RD = str_const*8 (~) 3688 | ld LFUNC:RB, FRAME_FUNC(BASE) 3689 | dsubu TMP1, KBASE, RD 3690 | cleartp LFUNC:RB 3691 | daddu RA, RA, LFUNC:RB 3692 | ld UPVAL:RB, LFUNC:RA->uvptr 3693 | ld STR:TMP1, -8(TMP1) // KBASE-8-str_const*8 3694 | lbu TMP2, UPVAL:RB->marked 3695 | ld CARG2, UPVAL:RB->v 3696 | lbu TMP3, STR:TMP1->marked 3697 | andi AT, TMP2, LJ_GC_BLACK // isblack(uv) 3698 | lbu TMP2, UPVAL:RB->closed 3699 | li TMP0, LJ_TSTR 3700 | settp TMP1, TMP0 3701 | bnez AT, >2 3702 |. sd TMP1, 0(CARG2) 3703 |1: 3704 | ins_next 3705 | 3706 |2: // Check if string is white and ensure upvalue is closed. 3707 | beqz TMP2, <1 3708 |. andi AT, TMP3, LJ_GC_WHITES // iswhite(str) 3709 | beqz AT, <1 3710 |. load_got lj_gc_barrieruv 3711 | // Crossed a write barrier. Move the barrier forward. 3712 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv) 3713 |. daddiu CARG1, DISPATCH, GG_DISP2G 3714 | b <1 3715 |. nop 3716 break; 3717 case BC_USETN: 3718 | // RA = uvnum*8, RD = num_const*8 3719 | ld LFUNC:RB, FRAME_FUNC(BASE) 3720 | daddu RD, KBASE, RD 3721 | cleartp LFUNC:RB 3722 | daddu RA, RA, LFUNC:RB 3723 | ld UPVAL:RB, LFUNC:RA->uvptr 3724 | ld CRET1, 0(RD) 3725 | ld TMP1, UPVAL:RB->v 3726 | ins_next1 3727 | sd CRET1, 0(TMP1) 3728 | ins_next2 3729 break; 3730 case BC_USETP: 3731 | // RA = uvnum*8, RD = primitive_type*8 (~) 3732 | ld LFUNC:RB, FRAME_FUNC(BASE) 3733 | dsll TMP0, RD, 44 3734 | cleartp LFUNC:RB 3735 | daddu RA, RA, LFUNC:RB 3736 | not TMP0, TMP0 3737 | ld UPVAL:RB, LFUNC:RA->uvptr 3738 | ins_next1 3739 | ld TMP1, UPVAL:RB->v 3740 | sd TMP0, 0(TMP1) 3741 | ins_next2 3742 break; 3743 3744 case BC_UCLO: 3745 | // RA = level*8, RD = target 3746 | ld TMP2, L->openupval 3747 | branch_RD // Do this first since RD is not saved. 3748 | load_got lj_func_closeuv 3749 | sd BASE, L->base 3750 | beqz TMP2, >1 3751 |. move CARG1, L 3752 | call_intern lj_func_closeuv // (lua_State *L, TValue *level) 3753 |. daddu CARG2, BASE, RA 3754 | ld BASE, L->base 3755 |1: 3756 | ins_next 3757 break; 3758 3759 case BC_FNEW: 3760 | // RA = dst*8, RD = proto_const*8 (~) (holding function prototype) 3761 | load_got lj_func_newL_gc 3762 | dsubu TMP1, KBASE, RD 3763 | ld CARG3, FRAME_FUNC(BASE) 3764 | ld CARG2, -8(TMP1) // KBASE-8-tab_const*8 3765 | sd BASE, L->base 3766 | sd PC, SAVE_PC 3767 | cleartp CARG3 3768 | // (lua_State *L, GCproto *pt, GCfuncL *parent) 3769 | call_intern lj_func_newL_gc 3770 |. move CARG1, L 3771 | // Returns GCfuncL *. 3772 | li TMP0, LJ_TFUNC 3773 | ld BASE, L->base 3774 | ins_next1 3775 | settp CRET1, TMP0 3776 | daddu RA, BASE, RA 3777 | sd CRET1, 0(RA) 3778 | ins_next2 3779 break; 3780 3781 /* -- Table ops --------------------------------------------------------- */ 3782 3783 case BC_TNEW: 3784 case BC_TDUP: 3785 | // RA = dst*8, RD = (hbits|asize)*8 | tab_const*8 (~) 3786 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH) 3787 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH) 3788 | sd BASE, L->base 3789 | sd PC, SAVE_PC 3790 | sltu AT, TMP0, TMP1 3791 | beqz AT, >5 3792 |1: 3793 if (op == BC_TNEW) { 3794 | load_got lj_tab_new 3795 | srl CARG2, RD, 3 3796 | andi CARG2, CARG2, 0x7ff 3797 | li TMP0, 0x801 3798 | addiu AT, CARG2, -0x7ff 3799 | srl CARG3, RD, 14 3800 | movz CARG2, TMP0, AT 3801 | // (lua_State *L, int32_t asize, uint32_t hbits) 3802 | call_intern lj_tab_new 3803 |. move CARG1, L 3804 | // Returns Table *. 3805 } else { 3806 | load_got lj_tab_dup 3807 | dsubu TMP1, KBASE, RD 3808 | move CARG1, L 3809 | call_intern lj_tab_dup // (lua_State *L, Table *kt) 3810 |. ld CARG2, -8(TMP1) // KBASE-8-str_const*8 3811 | // Returns Table *. 3812 } 3813 | li TMP0, LJ_TTAB 3814 | ld BASE, L->base 3815 | ins_next1 3816 | daddu RA, BASE, RA 3817 | settp CRET1, TMP0 3818 | sd CRET1, 0(RA) 3819 | ins_next2 3820 |5: 3821 | load_got lj_gc_step_fixtop 3822 | move MULTRES, RD 3823 | call_intern lj_gc_step_fixtop // (lua_State *L) 3824 |. move CARG1, L 3825 | b <1 3826 |. move RD, MULTRES 3827 break; 3828 3829 case BC_GGET: 3830 | // RA = dst*8, RD = str_const*8 (~) 3831 case BC_GSET: 3832 | // RA = src*8, RD = str_const*8 (~) 3833 | ld LFUNC:TMP2, FRAME_FUNC(BASE) 3834 | dsubu TMP1, KBASE, RD 3835 | ld STR:RC, -8(TMP1) // KBASE-8-str_const*8 3836 | cleartp LFUNC:TMP2 3837 | ld TAB:RB, LFUNC:TMP2->env 3838 if (op == BC_GGET) { 3839 | b ->BC_TGETS_Z 3840 } else { 3841 | b ->BC_TSETS_Z 3842 } 3843 |. daddu RA, BASE, RA 3844 break; 3845 3846 case BC_TGETV: 3847 | // RA = dst*8, RB = table*8, RC = key*8 3848 | decode_RB8a RB, INS 3849 | decode_RB8b RB 3850 | decode_RDtoRC8 RC, RD 3851 | daddu CARG2, BASE, RB 3852 | daddu CARG3, BASE, RC 3853 | ld TAB:RB, 0(CARG2) 3854 | ld TMP2, 0(CARG3) 3855 | daddu RA, BASE, RA 3856 | checktab TAB:RB, ->vmeta_tgetv 3857 | gettp TMP3, TMP2 3858 | bne TMP3, TISNUM, >5 // Integer key? 3859 |. lw TMP0, TAB:RB->asize 3860 | sextw TMP2, TMP2 3861 | ld TMP1, TAB:RB->array 3862 | sltu AT, TMP2, TMP0 3863 | sll TMP2, TMP2, 3 3864 | beqz AT, ->vmeta_tgetv // Integer key and in array part? 3865 |. daddu TMP2, TMP1, TMP2 3866 | ld AT, 0(TMP2) 3867 | beq AT, TISNIL, >2 3868 |. ld CRET1, 0(TMP2) 3869 |1: 3870 | ins_next1 3871 | sd CRET1, 0(RA) 3872 | ins_next2 3873 | 3874 |2: // Check for __index if table value is nil. 3875 | ld TAB:TMP2, TAB:RB->metatable 3876 | beqz TAB:TMP2, <1 // No metatable: done. 3877 |. nop 3878 | lbu TMP0, TAB:TMP2->nomm 3879 | andi TMP0, TMP0, 1<<MM_index 3880 | bnez TMP0, <1 // 'no __index' flag set: done. 3881 |. nop 3882 | b ->vmeta_tgetv 3883 |. nop 3884 | 3885 |5: 3886 | li AT, LJ_TSTR 3887 | bne TMP3, AT, ->vmeta_tgetv 3888 |. cleartp RC, TMP2 3889 | b ->BC_TGETS_Z // String key? 3890 |. nop 3891 break; 3892 case BC_TGETS: 3893 | // RA = dst*8, RB = table*8, RC = str_const*8 (~) 3894 | decode_RB8a RB, INS 3895 | decode_RB8b RB 3896 | decode_RC8a RC, INS 3897 | daddu CARG2, BASE, RB 3898 | decode_RC8b RC 3899 | ld TAB:RB, 0(CARG2) 3900 | dsubu CARG3, KBASE, RC 3901 | daddu RA, BASE, RA 3902 | ld STR:RC, -8(CARG3) // KBASE-8-str_const*8 3903 | checktab TAB:RB, ->vmeta_tgets1 3904 |->BC_TGETS_Z: 3905 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = dst*8 3906 | lw TMP0, TAB:RB->hmask 3907 | lw TMP1, STR:RC->hash 3908 | ld NODE:TMP2, TAB:RB->node 3909 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask 3910 | sll TMP0, TMP1, 5 3911 | sll TMP1, TMP1, 3 3912 | subu TMP1, TMP0, TMP1 3913 | li TMP3, LJ_TSTR 3914 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8) 3915 | settp STR:RC, TMP3 // Tagged key to look for. 3916 |1: 3917 | ld CARG1, NODE:TMP2->key 3918 | ld CRET1, NODE:TMP2->val 3919 | ld NODE:TMP1, NODE:TMP2->next 3920 | bne CARG1, RC, >4 3921 |. ld TAB:TMP3, TAB:RB->metatable 3922 | beq CRET1, TISNIL, >5 // Key found, but nil value? 3923 |. nop 3924 |3: 3925 | ins_next1 3926 | sd CRET1, 0(RA) 3927 | ins_next2 3928 | 3929 |4: // Follow hash chain. 3930 | bnez NODE:TMP1, <1 3931 |. move NODE:TMP2, NODE:TMP1 3932 | // End of hash chain: key not found, nil result. 3933 | 3934 |5: // Check for __index if table value is nil. 3935 | beqz TAB:TMP3, <3 // No metatable: done. 3936 |. move CRET1, TISNIL 3937 | lbu TMP0, TAB:TMP3->nomm 3938 | andi TMP0, TMP0, 1<<MM_index 3939 | bnez TMP0, <3 // 'no __index' flag set: done. 3940 |. nop 3941 | b ->vmeta_tgets 3942 |. nop 3943 break; 3944 case BC_TGETB: 3945 | // RA = dst*8, RB = table*8, RC = index*8 3946 | decode_RB8a RB, INS 3947 | decode_RB8b RB 3948 | daddu CARG2, BASE, RB 3949 | decode_RDtoRC8 RC, RD 3950 | ld TAB:RB, 0(CARG2) 3951 | daddu RA, BASE, RA 3952 | srl TMP0, RC, 3 3953 | checktab TAB:RB, ->vmeta_tgetb 3954 | lw TMP1, TAB:RB->asize 3955 | ld TMP2, TAB:RB->array 3956 | sltu AT, TMP0, TMP1 3957 | beqz AT, ->vmeta_tgetb 3958 |. daddu RC, TMP2, RC 3959 | ld AT, 0(RC) 3960 | beq AT, TISNIL, >5 3961 |. ld CRET1, 0(RC) 3962 |1: 3963 | ins_next1 3964 | sd CRET1, 0(RA) 3965 | ins_next2 3966 | 3967 |5: // Check for __index if table value is nil. 3968 | ld TAB:TMP2, TAB:RB->metatable 3969 | beqz TAB:TMP2, <1 // No metatable: done. 3970 |. nop 3971 | lbu TMP1, TAB:TMP2->nomm 3972 | andi TMP1, TMP1, 1<<MM_index 3973 | bnez TMP1, <1 // 'no __index' flag set: done. 3974 |. nop 3975 | b ->vmeta_tgetb // Caveat: preserve TMP0 and CARG2! 3976 |. nop 3977 break; 3978 case BC_TGETR: 3979 | // RA = dst*8, RB = table*8, RC = key*8 3980 | decode_RB8a RB, INS 3981 | decode_RB8b RB 3982 | decode_RDtoRC8 RC, RD 3983 | daddu RB, BASE, RB 3984 | daddu RC, BASE, RC 3985 | ld TAB:CARG1, 0(RB) 3986 | lw CARG2, LO(RC) 3987 | daddu RA, BASE, RA 3988 | cleartp TAB:CARG1 3989 | lw TMP0, TAB:CARG1->asize 3990 | ld TMP1, TAB:CARG1->array 3991 | sltu AT, CARG2, TMP0 3992 | sll TMP2, CARG2, 3 3993 | beqz AT, ->vmeta_tgetr // In array part? 3994 |. daddu CRET1, TMP1, TMP2 3995 | ld CARG2, 0(CRET1) 3996 |->BC_TGETR_Z: 3997 | ins_next1 3998 | sd CARG2, 0(RA) 3999 | ins_next2 4000 break; 4001 4002 case BC_TSETV: 4003 | // RA = src*8, RB = table*8, RC = key*8 4004 | decode_RB8a RB, INS 4005 | decode_RB8b RB 4006 | decode_RDtoRC8 RC, RD 4007 | daddu CARG2, BASE, RB 4008 | daddu CARG3, BASE, RC 4009 | ld RB, 0(CARG2) 4010 | ld TMP2, 0(CARG3) 4011 | daddu RA, BASE, RA 4012 | checktab RB, ->vmeta_tsetv 4013 | checkint TMP2, >5 4014 |. sextw RC, TMP2 4015 | lw TMP0, TAB:RB->asize 4016 | ld TMP1, TAB:RB->array 4017 | sltu AT, RC, TMP0 4018 | sll TMP2, RC, 3 4019 | beqz AT, ->vmeta_tsetv // Integer key and in array part? 4020 |. daddu TMP1, TMP1, TMP2 4021 | ld TMP0, 0(TMP1) 4022 | lbu TMP3, TAB:RB->marked 4023 | beq TMP0, TISNIL, >3 4024 |. ld CRET1, 0(RA) 4025 |1: 4026 | andi AT, TMP3, LJ_GC_BLACK // isblack(table) 4027 | bnez AT, >7 4028 |. sd CRET1, 0(TMP1) 4029 |2: 4030 | ins_next 4031 | 4032 |3: // Check for __newindex if previous value is nil. 4033 | ld TAB:TMP2, TAB:RB->metatable 4034 | beqz TAB:TMP2, <1 // No metatable: done. 4035 |. nop 4036 | lbu TMP2, TAB:TMP2->nomm 4037 | andi TMP2, TMP2, 1<<MM_newindex 4038 | bnez TMP2, <1 // 'no __newindex' flag set: done. 4039 |. nop 4040 | b ->vmeta_tsetv 4041 |. nop 4042 | 4043 |5: 4044 | gettp AT, TMP2 4045 | daddiu AT, AT, -LJ_TSTR 4046 | bnez AT, ->vmeta_tsetv 4047 |. nop 4048 | b ->BC_TSETS_Z // String key? 4049 |. cleartp STR:RC, TMP2 4050 | 4051 |7: // Possible table write barrier for the value. Skip valiswhite check. 4052 | barrierback TAB:RB, TMP3, TMP0, <2 4053 break; 4054 case BC_TSETS: 4055 | // RA = src*8, RB = table*8, RC = str_const*8 (~) 4056 | decode_RB8a RB, INS 4057 | decode_RB8b RB 4058 | daddu CARG2, BASE, RB 4059 | decode_RC8a RC, INS 4060 | ld TAB:RB, 0(CARG2) 4061 | decode_RC8b RC 4062 | dsubu CARG3, KBASE, RC 4063 | ld RC, -8(CARG3) // KBASE-8-str_const*8 4064 | daddu RA, BASE, RA 4065 | cleartp STR:RC 4066 | checktab TAB:RB, ->vmeta_tsets1 4067 |->BC_TSETS_Z: 4068 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = BASE+src*8 4069 | lw TMP0, TAB:RB->hmask 4070 | lw TMP1, STR:RC->hash 4071 | ld NODE:TMP2, TAB:RB->node 4072 | sb r0, TAB:RB->nomm // Clear metamethod cache. 4073 | and TMP1, TMP1, TMP0 // idx = str->hash & tab->hmask 4074 | sll TMP0, TMP1, 5 4075 | sll TMP1, TMP1, 3 4076 | subu TMP1, TMP0, TMP1 4077 | li TMP3, LJ_TSTR 4078 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8) 4079 | settp STR:RC, TMP3 // Tagged key to look for. 4080 |.if FPU 4081 | ldc1 f20, 0(RA) 4082 |.else 4083 | ld CRET1, 0(RA) 4084 |.endif 4085 |1: 4086 | ld TMP0, NODE:TMP2->key 4087 | ld CARG2, NODE:TMP2->val 4088 | ld NODE:TMP1, NODE:TMP2->next 4089 | bne TMP0, RC, >5 4090 |. lbu TMP3, TAB:RB->marked 4091 | beq CARG2, TISNIL, >4 // Key found, but nil value? 4092 |. ld TAB:TMP0, TAB:RB->metatable 4093 |2: 4094 | andi AT, TMP3, LJ_GC_BLACK // isblack(table) 4095 | bnez AT, >7 4096 |.if FPU 4097 |. sdc1 f20, NODE:TMP2->val 4098 |.else 4099 |. sd CRET1, NODE:TMP2->val 4100 |.endif 4101 |3: 4102 | ins_next 4103 | 4104 |4: // Check for __newindex if previous value is nil. 4105 | beqz TAB:TMP0, <2 // No metatable: done. 4106 |. nop 4107 | lbu TMP0, TAB:TMP0->nomm 4108 | andi TMP0, TMP0, 1<<MM_newindex 4109 | bnez TMP0, <2 // 'no __newindex' flag set: done. 4110 |. nop 4111 | b ->vmeta_tsets 4112 |. nop 4113 | 4114 |5: // Follow hash chain. 4115 | bnez NODE:TMP1, <1 4116 |. move NODE:TMP2, NODE:TMP1 4117 | // End of hash chain: key not found, add a new one 4118 | 4119 | // But check for __newindex first. 4120 | ld TAB:TMP2, TAB:RB->metatable 4121 | beqz TAB:TMP2, >6 // No metatable: continue. 4122 |. daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv) 4123 | lbu TMP0, TAB:TMP2->nomm 4124 | andi TMP0, TMP0, 1<<MM_newindex 4125 | beqz TMP0, ->vmeta_tsets // 'no __newindex' flag NOT set: check. 4126 |6: 4127 | load_got lj_tab_newkey 4128 | sd RC, 0(CARG3) 4129 | sd BASE, L->base 4130 | move CARG2, TAB:RB 4131 | sd PC, SAVE_PC 4132 | call_intern lj_tab_newkey // (lua_State *L, GCtab *t, TValue *k 4133 |. move CARG1, L 4134 | // Returns TValue *. 4135 | ld BASE, L->base 4136 |.if FPU 4137 | b <3 // No 2nd write barrier needed. 4138 |. sdc1 f20, 0(CRET1) 4139 |.else 4140 | ld CARG1, 0(RA) 4141 | b <3 // No 2nd write barrier needed. 4142 |. sd CARG1, 0(CRET1) 4143 |.endif 4144 | 4145 |7: // Possible table write barrier for the value. Skip valiswhite check. 4146 | barrierback TAB:RB, TMP3, TMP0, <3 4147 break; 4148 case BC_TSETB: 4149 | // RA = src*8, RB = table*8, RC = index*8 4150 | decode_RB8a RB, INS 4151 | decode_RB8b RB 4152 | daddu CARG2, BASE, RB 4153 | decode_RDtoRC8 RC, RD 4154 | ld TAB:RB, 0(CARG2) 4155 | daddu RA, BASE, RA 4156 | srl TMP0, RC, 3 4157 | checktab RB, ->vmeta_tsetb 4158 | lw TMP1, TAB:RB->asize 4159 | ld TMP2, TAB:RB->array 4160 | sltu AT, TMP0, TMP1 4161 | beqz AT, ->vmeta_tsetb 4162 |. daddu RC, TMP2, RC 4163 | ld TMP1, 0(RC) 4164 | lbu TMP3, TAB:RB->marked 4165 | beq TMP1, TISNIL, >5 4166 |1: 4167 |. ld CRET1, 0(RA) 4168 | andi AT, TMP3, LJ_GC_BLACK // isblack(table) 4169 | bnez AT, >7 4170 |. sd CRET1, 0(RC) 4171 |2: 4172 | ins_next 4173 | 4174 |5: // Check for __newindex if previous value is nil. 4175 | ld TAB:TMP2, TAB:RB->metatable 4176 | beqz TAB:TMP2, <1 // No metatable: done. 4177 |. nop 4178 | lbu TMP1, TAB:TMP2->nomm 4179 | andi TMP1, TMP1, 1<<MM_newindex 4180 | bnez TMP1, <1 // 'no __newindex' flag set: done. 4181 |. nop 4182 | b ->vmeta_tsetb // Caveat: preserve TMP0 and CARG2! 4183 |. nop 4184 | 4185 |7: // Possible table write barrier for the value. Skip valiswhite check. 4186 | barrierback TAB:RB, TMP3, TMP0, <2 4187 break; 4188 case BC_TSETR: 4189 | // RA = dst*8, RB = table*8, RC = key*8 4190 | decode_RB8a RB, INS 4191 | decode_RB8b RB 4192 | decode_RDtoRC8 RC, RD 4193 | daddu CARG1, BASE, RB 4194 | daddu CARG3, BASE, RC 4195 | ld TAB:CARG2, 0(CARG1) 4196 | lw CARG3, LO(CARG3) 4197 | cleartp TAB:CARG2 4198 | lbu TMP3, TAB:CARG2->marked 4199 | lw TMP0, TAB:CARG2->asize 4200 | ld TMP1, TAB:CARG2->array 4201 | andi AT, TMP3, LJ_GC_BLACK // isblack(table) 4202 | bnez AT, >7 4203 |. daddu RA, BASE, RA 4204 |2: 4205 | sltu AT, CARG3, TMP0 4206 | sll TMP2, CARG3, 3 4207 | beqz AT, ->vmeta_tsetr // In array part? 4208 |. daddu CRET1, TMP1, TMP2 4209 |->BC_TSETR_Z: 4210 | ld CARG1, 0(RA) 4211 | ins_next1 4212 | sd CARG1, 0(CRET1) 4213 | ins_next2 4214 | 4215 |7: // Possible table write barrier for the value. Skip valiswhite check. 4216 | barrierback TAB:CARG2, TMP3, TMP0, <2 4217 break; 4218 4219 case BC_TSETM: 4220 | // RA = base*8 (table at base-1), RD = num_const*8 (start index) 4221 | daddu RA, BASE, RA 4222 |1: 4223 | daddu TMP3, KBASE, RD 4224 | ld TAB:CARG2, -8(RA) // Guaranteed to be a table. 4225 | addiu TMP0, MULTRES, -8 4226 | lw TMP3, LO(TMP3) // Integer constant is in lo-word. 4227 | beqz TMP0, >4 // Nothing to copy? 4228 |. srl CARG3, TMP0, 3 4229 | cleartp CARG2 4230 | addu CARG3, CARG3, TMP3 4231 | lw TMP2, TAB:CARG2->asize 4232 | sll TMP1, TMP3, 3 4233 | lbu TMP3, TAB:CARG2->marked 4234 | ld CARG1, TAB:CARG2->array 4235 | sltu AT, TMP2, CARG3 4236 | bnez AT, >5 4237 |. daddu TMP2, RA, TMP0 4238 | daddu TMP1, TMP1, CARG1 4239 | andi TMP0, TMP3, LJ_GC_BLACK // isblack(table) 4240 |3: // Copy result slots to table. 4241 | ld CRET1, 0(RA) 4242 | daddiu RA, RA, 8 4243 | sltu AT, RA, TMP2 4244 | sd CRET1, 0(TMP1) 4245 | bnez AT, <3 4246 |. daddiu TMP1, TMP1, 8 4247 | bnez TMP0, >7 4248 |. nop 4249 |4: 4250 | ins_next 4251 | 4252 |5: // Need to resize array part. 4253 | load_got lj_tab_reasize 4254 | sd BASE, L->base 4255 | sd PC, SAVE_PC 4256 | move BASE, RD 4257 | call_intern lj_tab_reasize // (lua_State *L, GCtab *t, int nasize) 4258 |. move CARG1, L 4259 | // Must not reallocate the stack. 4260 | move RD, BASE 4261 | b <1 4262 |. ld BASE, L->base // Reload BASE for lack of a saved register. 4263 | 4264 |7: // Possible table write barrier for any value. Skip valiswhite check. 4265 | barrierback TAB:CARG2, TMP3, TMP0, <4 4266 break; 4267 4268 /* -- Calls and vararg handling ----------------------------------------- */ 4269 4270 case BC_CALLM: 4271 | // RA = base*8, (RB = (nresults+1)*8,) RC = extra_nargs*8 4272 | decode_RDtoRC8 NARGS8:RC, RD 4273 | b ->BC_CALL_Z 4274 |. addu NARGS8:RC, NARGS8:RC, MULTRES 4275 break; 4276 case BC_CALL: 4277 | // RA = base*8, (RB = (nresults+1)*8,) RC = (nargs+1)*8 4278 | decode_RDtoRC8 NARGS8:RC, RD 4279 |->BC_CALL_Z: 4280 | move TMP2, BASE 4281 | daddu BASE, BASE, RA 4282 | ld LFUNC:RB, 0(BASE) 4283 | daddiu BASE, BASE, 16 4284 | addiu NARGS8:RC, NARGS8:RC, -8 4285 | checkfunc RB, ->vmeta_call 4286 | ins_call 4287 break; 4288 4289 case BC_CALLMT: 4290 | // RA = base*8, (RB = 0,) RC = extra_nargs*8 4291 | addu NARGS8:RD, NARGS8:RD, MULTRES // BC_CALLT gets RC from RD. 4292 | // Fall through. Assumes BC_CALLT follows. 4293 break; 4294 case BC_CALLT: 4295 | // RA = base*8, (RB = 0,) RC = (nargs+1)*8 4296 | daddu RA, BASE, RA 4297 | ld RB, 0(RA) 4298 | move NARGS8:RC, RD 4299 | ld TMP1, FRAME_PC(BASE) 4300 | daddiu RA, RA, 16 4301 | addiu NARGS8:RC, NARGS8:RC, -8 4302 | checktp CARG3, RB, -LJ_TFUNC, ->vmeta_callt 4303 |->BC_CALLT_Z: 4304 | andi TMP0, TMP1, FRAME_TYPE // Caveat: preserve TMP0 until the 'or'. 4305 | lbu TMP3, LFUNC:CARG3->ffid 4306 | bnez TMP0, >7 4307 |. xori TMP2, TMP1, FRAME_VARG 4308 |1: 4309 | sd RB, FRAME_FUNC(BASE) // Copy function down, but keep PC. 4310 | sltiu AT, TMP3, 2 // (> FF_C) Calling a fast function? 4311 | move TMP2, BASE 4312 | move RB, CARG3 4313 | beqz NARGS8:RC, >3 4314 |. move TMP3, NARGS8:RC 4315 |2: 4316 | ld CRET1, 0(RA) 4317 | daddiu RA, RA, 8 4318 | addiu TMP3, TMP3, -8 4319 | sd CRET1, 0(TMP2) 4320 | bnez TMP3, <2 4321 |. daddiu TMP2, TMP2, 8 4322 |3: 4323 | or TMP0, TMP0, AT 4324 | beqz TMP0, >5 4325 |. nop 4326 |4: 4327 | ins_callt 4328 | 4329 |5: // Tailcall to a fast function with a Lua frame below. 4330 | lw INS, -4(TMP1) 4331 | decode_RA8a RA, INS 4332 | decode_RA8b RA 4333 | dsubu TMP1, BASE, RA 4334 | ld TMP1, -32(TMP1) 4335 | cleartp LFUNC:TMP1 4336 | ld TMP1, LFUNC:TMP1->pc 4337 | b <4 4338 |. ld KBASE, PC2PROTO(k)(TMP1) // Need to prepare KBASE. 4339 | 4340 |7: // Tailcall from a vararg function. 4341 | andi AT, TMP2, FRAME_TYPEP 4342 | bnez AT, <1 // Vararg frame below? 4343 |. dsubu TMP2, BASE, TMP2 // Relocate BASE down. 4344 | move BASE, TMP2 4345 | ld TMP1, FRAME_PC(TMP2) 4346 | b <1 4347 |. andi TMP0, TMP1, FRAME_TYPE 4348 break; 4349 4350 case BC_ITERC: 4351 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 ((2+1)*8)) 4352 | move TMP2, BASE // Save old BASE fir vmeta_call. 4353 | daddu BASE, BASE, RA 4354 | ld RB, -24(BASE) 4355 | ld CARG1, -16(BASE) 4356 | ld CARG2, -8(BASE) 4357 | li NARGS8:RC, 16 // Iterators get 2 arguments. 4358 | sd RB, 0(BASE) // Copy callable. 4359 | sd CARG1, 16(BASE) // Copy state. 4360 | sd CARG2, 24(BASE) // Copy control var. 4361 | daddiu BASE, BASE, 16 4362 | checkfunc RB, ->vmeta_call 4363 | ins_call 4364 break; 4365 4366 case BC_ITERN: 4367 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 (2+1)*8) 4368 |.if JIT 4369 | // NYI: add hotloop, record BC_ITERN. 4370 |.endif 4371 | daddu RA, BASE, RA 4372 | ld TAB:RB, -16(RA) 4373 | lw RC, -8+LO(RA) // Get index from control var. 4374 | cleartp TAB:RB 4375 | daddiu PC, PC, 4 4376 | lw TMP0, TAB:RB->asize 4377 | ld TMP1, TAB:RB->array 4378 | dsll CARG3, TISNUM, 47 4379 |1: // Traverse array part. 4380 | sltu AT, RC, TMP0 4381 | beqz AT, >5 // Index points after array part? 4382 |. sll TMP3, RC, 3 4383 | daddu TMP3, TMP1, TMP3 4384 | ld CARG1, 0(TMP3) 4385 | lhu RD, -4+OFS_RD(PC) 4386 | or TMP2, RC, CARG3 4387 | beq CARG1, TISNIL, <1 // Skip holes in array part. 4388 |. addiu RC, RC, 1 4389 | sd TMP2, 0(RA) 4390 | sd CARG1, 8(RA) 4391 | or TMP0, RC, CARG3 4392 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 4393 | decode_RD4b RD 4394 | daddu RD, RD, TMP3 4395 | sw TMP0, -8+LO(RA) // Update control var. 4396 | daddu PC, PC, RD 4397 |3: 4398 | ins_next 4399 | 4400 |5: // Traverse hash part. 4401 | lw TMP1, TAB:RB->hmask 4402 | subu RC, RC, TMP0 4403 | ld TMP2, TAB:RB->node 4404 |6: 4405 | sltu AT, TMP1, RC // End of iteration? Branch to ITERL+1. 4406 | bnez AT, <3 4407 |. sll TMP3, RC, 5 4408 | sll RB, RC, 3 4409 | subu TMP3, TMP3, RB 4410 | daddu NODE:TMP3, TMP3, TMP2 4411 | ld CARG1, 0(NODE:TMP3) 4412 | lhu RD, -4+OFS_RD(PC) 4413 | beq CARG1, TISNIL, <6 // Skip holes in hash part. 4414 |. addiu RC, RC, 1 4415 | ld CARG2, NODE:TMP3->key 4416 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535) 4417 | sd CARG1, 8(RA) 4418 | addu RC, RC, TMP0 4419 | decode_RD4b RD 4420 | addu RD, RD, TMP3 4421 | sd CARG2, 0(RA) 4422 | daddu PC, PC, RD 4423 | b <3 4424 |. sw RC, -8+LO(RA) // Update control var. 4425 break; 4426 4427 case BC_ISNEXT: 4428 | // RA = base*8, RD = target (points to ITERN) 4429 | daddu RA, BASE, RA 4430 | srl TMP0, RD, 1 4431 | ld CFUNC:CARG1, -24(RA) 4432 | daddu TMP0, PC, TMP0 4433 | ld CARG2, -16(RA) 4434 | ld CARG3, -8(RA) 4435 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535) 4436 | checkfunc CFUNC:CARG1, >5 4437 | gettp CARG2, CARG2 4438 | daddiu CARG2, CARG2, -LJ_TTAB 4439 | lbu TMP1, CFUNC:CARG1->ffid 4440 | daddiu CARG3, CARG3, -LJ_TNIL 4441 | or AT, CARG2, CARG3 4442 | daddiu TMP1, TMP1, -FF_next_N 4443 | or AT, AT, TMP1 4444 | bnez AT, >5 4445 |. lui TMP1, 0xfffe 4446 | daddu PC, TMP0, TMP2 4447 | ori TMP1, TMP1, 0x7fff 4448 | dsll TMP1, TMP1, 32 4449 | sd TMP1, -8(RA) 4450 |1: 4451 | ins_next 4452 |5: // Despecialize bytecode if any of the checks fail. 4453 | li TMP3, BC_JMP 4454 | li TMP1, BC_ITERC 4455 | sb TMP3, -4+OFS_OP(PC) 4456 | daddu PC, TMP0, TMP2 4457 | b <1 4458 |. sb TMP1, OFS_OP(PC) 4459 break; 4460 4461 case BC_VARG: 4462 | // RA = base*8, RB = (nresults+1)*8, RC = numparams*8 4463 | ld TMP0, FRAME_PC(BASE) 4464 | decode_RDtoRC8 RC, RD 4465 | decode_RB8a RB, INS 4466 | daddu RC, BASE, RC 4467 | decode_RB8b RB 4468 | daddu RA, BASE, RA 4469 | daddiu RC, RC, FRAME_VARG 4470 | daddu TMP2, RA, RB 4471 | daddiu TMP3, BASE, -16 // TMP3 = vtop 4472 | dsubu RC, RC, TMP0 // RC = vbase 4473 | // Note: RC may now be even _above_ BASE if nargs was < numparams. 4474 | beqz RB, >5 // Copy all varargs? 4475 |. dsubu TMP1, TMP3, RC 4476 | daddiu TMP2, TMP2, -16 4477 |1: // Copy vararg slots to destination slots. 4478 | ld CARG1, 0(RC) 4479 | sltu AT, RC, TMP3 4480 | daddiu RC, RC, 8 4481 | movz CARG1, TISNIL, AT 4482 | sd CARG1, 0(RA) 4483 | sltu AT, RA, TMP2 4484 | bnez AT, <1 4485 |. daddiu RA, RA, 8 4486 |3: 4487 | ins_next 4488 | 4489 |5: // Copy all varargs. 4490 | ld TMP0, L->maxstack 4491 | blez TMP1, <3 // No vararg slots? 4492 |. li MULTRES, 8 // MULTRES = (0+1)*8 4493 | daddu TMP2, RA, TMP1 4494 | sltu AT, TMP0, TMP2 4495 | bnez AT, >7 4496 |. daddiu MULTRES, TMP1, 8 4497 |6: 4498 | ld CRET1, 0(RC) 4499 | daddiu RC, RC, 8 4500 | sd CRET1, 0(RA) 4501 | sltu AT, RC, TMP3 4502 | bnez AT, <6 // More vararg slots? 4503 |. daddiu RA, RA, 8 4504 | b <3 4505 |. nop 4506 | 4507 |7: // Grow stack for varargs. 4508 | load_got lj_state_growstack 4509 | sd RA, L->top 4510 | dsubu RA, RA, BASE 4511 | sd BASE, L->base 4512 | dsubu BASE, RC, BASE // Need delta, because BASE may change. 4513 | sd PC, SAVE_PC 4514 | srl CARG2, TMP1, 3 4515 | call_intern lj_state_growstack // (lua_State *L, int n) 4516 |. move CARG1, L 4517 | move RC, BASE 4518 | ld BASE, L->base 4519 | daddu RA, BASE, RA 4520 | daddu RC, BASE, RC 4521 | b <6 4522 |. daddiu TMP3, BASE, -16 4523 break; 4524 4525 /* -- Returns ----------------------------------------------------------- */ 4526 4527 case BC_RETM: 4528 | // RA = results*8, RD = extra_nresults*8 4529 | addu RD, RD, MULTRES // MULTRES >= 8, so RD >= 8. 4530 | // Fall through. Assumes BC_RET follows. 4531 break; 4532 4533 case BC_RET: 4534 | // RA = results*8, RD = (nresults+1)*8 4535 | ld PC, FRAME_PC(BASE) 4536 | daddu RA, BASE, RA 4537 | move MULTRES, RD 4538 |1: 4539 | andi TMP0, PC, FRAME_TYPE 4540 | bnez TMP0, ->BC_RETV_Z 4541 |. xori TMP1, PC, FRAME_VARG 4542 | 4543 |->BC_RET_Z: 4544 | // BASE = base, RA = resultptr, RD = (nresults+1)*8, PC = return 4545 | lw INS, -4(PC) 4546 | daddiu TMP2, BASE, -16 4547 | daddiu RC, RD, -8 4548 | decode_RA8a TMP0, INS 4549 | decode_RB8a RB, INS 4550 | decode_RA8b TMP0 4551 | decode_RB8b RB 4552 | daddu TMP3, TMP2, RB 4553 | beqz RC, >3 4554 |. dsubu BASE, TMP2, TMP0 4555 |2: 4556 | ld CRET1, 0(RA) 4557 | daddiu RA, RA, 8 4558 | daddiu RC, RC, -8 4559 | sd CRET1, 0(TMP2) 4560 | bnez RC, <2 4561 |. daddiu TMP2, TMP2, 8 4562 |3: 4563 | daddiu TMP3, TMP3, -8 4564 |5: 4565 | sltu AT, TMP2, TMP3 4566 | bnez AT, >6 4567 |. ld LFUNC:TMP1, FRAME_FUNC(BASE) 4568 | ins_next1 4569 | cleartp LFUNC:TMP1 4570 | ld TMP1, LFUNC:TMP1->pc 4571 | ld KBASE, PC2PROTO(k)(TMP1) 4572 | ins_next2 4573 | 4574 |6: // Fill up results with nil. 4575 | sd TISNIL, 0(TMP2) 4576 | b <5 4577 |. daddiu TMP2, TMP2, 8 4578 | 4579 |->BC_RETV_Z: // Non-standard return case. 4580 | andi TMP2, TMP1, FRAME_TYPEP 4581 | bnez TMP2, ->vm_return 4582 |. nop 4583 | // Return from vararg function: relocate BASE down. 4584 | dsubu BASE, BASE, TMP1 4585 | b <1 4586 |. ld PC, FRAME_PC(BASE) 4587 break; 4588 4589 case BC_RET0: case BC_RET1: 4590 | // RA = results*8, RD = (nresults+1)*8 4591 | ld PC, FRAME_PC(BASE) 4592 | daddu RA, BASE, RA 4593 | move MULTRES, RD 4594 | andi TMP0, PC, FRAME_TYPE 4595 | bnez TMP0, ->BC_RETV_Z 4596 |. xori TMP1, PC, FRAME_VARG 4597 | lw INS, -4(PC) 4598 | daddiu TMP2, BASE, -16 4599 if (op == BC_RET1) { 4600 | ld CRET1, 0(RA) 4601 } 4602 | decode_RB8a RB, INS 4603 | decode_RA8a RA, INS 4604 | decode_RB8b RB 4605 | decode_RA8b RA 4606 | dsubu BASE, TMP2, RA 4607 if (op == BC_RET1) { 4608 | sd CRET1, 0(TMP2) 4609 } 4610 |5: 4611 | sltu AT, RD, RB 4612 | bnez AT, >6 4613 |. ld TMP1, FRAME_FUNC(BASE) 4614 | ins_next1 4615 | cleartp LFUNC:TMP1 4616 | ld TMP1, LFUNC:TMP1->pc 4617 | ld KBASE, PC2PROTO(k)(TMP1) 4618 | ins_next2 4619 | 4620 |6: // Fill up results with nil. 4621 | daddiu TMP2, TMP2, 8 4622 | daddiu RD, RD, 8 4623 | b <5 4624 if (op == BC_RET1) { 4625 |. sd TISNIL, 0(TMP2) 4626 } else { 4627 |. sd TISNIL, -8(TMP2) 4628 } 4629 break; 4630 4631 /* -- Loops and branches ------------------------------------------------ */ 4632 4633 case BC_FORL: 4634 |.if JIT 4635 | hotloop 4636 |.endif 4637 | // Fall through. Assumes BC_IFORL follows. 4638 break; 4639 4640 case BC_JFORI: 4641 case BC_JFORL: 4642#if !LJ_HASJIT 4643 break; 4644#endif 4645 case BC_FORI: 4646 case BC_IFORL: 4647 | // RA = base*8, RD = target (after end of loop or start of loop) 4648 vk = (op == BC_IFORL || op == BC_JFORL); 4649 | daddu RA, BASE, RA 4650 | ld CARG1, FORL_IDX*8(RA) // IDX CARG1 - CARG3 type 4651 | gettp CARG3, CARG1 4652 if (op != BC_JFORL) { 4653 | srl RD, RD, 1 4654 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535) 4655 | daddu TMP2, RD, TMP2 4656 } 4657 if (!vk) { 4658 | ld CARG2, FORL_STOP*8(RA) // STOP CARG2 - CARG4 type 4659 | ld CRET1, FORL_STEP*8(RA) // STEP CRET1 - CRET2 type 4660 | gettp CARG4, CARG2 4661 | bne CARG3, TISNUM, >5 4662 |. gettp CRET2, CRET1 4663 | bne CARG4, TISNUM, ->vmeta_for 4664 |. sextw CARG3, CARG1 4665 | bne CRET2, TISNUM, ->vmeta_for 4666 |. sextw CARG2, CARG2 4667 | dext AT, CRET1, 31, 0 4668 | slt CRET1, CARG2, CARG3 4669 | slt TMP1, CARG3, CARG2 4670 | movn CRET1, TMP1, AT 4671 } else { 4672 | bne CARG3, TISNUM, >5 4673 |. ld CARG2, FORL_STEP*8(RA) // STEP CARG2 - CARG4 type 4674 | ld CRET1, FORL_STOP*8(RA) // STOP CRET1 - CRET2 type 4675 | sextw TMP3, CARG1 4676 | sextw CARG2, CARG2 4677 | sextw CRET1, CRET1 4678 | addu CARG1, TMP3, CARG2 4679 | xor TMP0, CARG1, TMP3 4680 | xor TMP1, CARG1, CARG2 4681 | and TMP0, TMP0, TMP1 4682 | slt TMP1, CARG1, CRET1 4683 | slt CRET1, CRET1, CARG1 4684 | slt AT, CARG2, r0 4685 | slt TMP0, TMP0, r0 // ((y^a) & (y^b)) < 0: overflow. 4686 | movn CRET1, TMP1, AT 4687 | or CRET1, CRET1, TMP0 4688 | zextw CARG1, CARG1 4689 | settp CARG1, TISNUM 4690 } 4691 |1: 4692 if (op == BC_FORI) { 4693 | movz TMP2, r0, CRET1 4694 | daddu PC, PC, TMP2 4695 } else if (op == BC_JFORI) { 4696 | daddu PC, PC, TMP2 4697 | lhu RD, -4+OFS_RD(PC) 4698 } else if (op == BC_IFORL) { 4699 | movn TMP2, r0, CRET1 4700 | daddu PC, PC, TMP2 4701 } 4702 if (vk) { 4703 | sd CARG1, FORL_IDX*8(RA) 4704 } 4705 | ins_next1 4706 | sd CARG1, FORL_EXT*8(RA) 4707 |2: 4708 if (op == BC_JFORI) { 4709 | beqz CRET1, =>BC_JLOOP 4710 |. decode_RD8b RD 4711 } else if (op == BC_JFORL) { 4712 | beqz CRET1, =>BC_JLOOP 4713 } 4714 | ins_next2 4715 | 4716 |5: // FP loop. 4717 |.if FPU 4718 if (!vk) { 4719 | ldc1 f0, FORL_IDX*8(RA) 4720 | ldc1 f2, FORL_STOP*8(RA) 4721 | sltiu TMP0, CARG3, LJ_TISNUM 4722 | sltiu TMP1, CARG4, LJ_TISNUM 4723 | sltiu AT, CRET2, LJ_TISNUM 4724 | ld TMP3, FORL_STEP*8(RA) 4725 | and TMP0, TMP0, TMP1 4726 | and AT, AT, TMP0 4727 | beqz AT, ->vmeta_for 4728 |. slt TMP3, TMP3, r0 4729 | c.ole.d 0, f0, f2 4730 | c.ole.d 1, f2, f0 4731 | li CRET1, 1 4732 | movt CRET1, r0, 0 4733 | movt AT, r0, 1 4734 | b <1 4735 |. movn CRET1, AT, TMP3 4736 } else { 4737 | ldc1 f0, FORL_IDX*8(RA) 4738 | ldc1 f4, FORL_STEP*8(RA) 4739 | ldc1 f2, FORL_STOP*8(RA) 4740 | ld TMP3, FORL_STEP*8(RA) 4741 | add.d f0, f0, f4 4742 | c.ole.d 0, f0, f2 4743 | c.ole.d 1, f2, f0 4744 | slt TMP3, TMP3, r0 4745 | li CRET1, 1 4746 | li AT, 1 4747 | movt CRET1, r0, 0 4748 | movt AT, r0, 1 4749 | movn CRET1, AT, TMP3 4750 if (op == BC_IFORL) { 4751 | movn TMP2, r0, CRET1 4752 | daddu PC, PC, TMP2 4753 } 4754 | sdc1 f0, FORL_IDX*8(RA) 4755 | ins_next1 4756 | b <2 4757 |. sdc1 f0, FORL_EXT*8(RA) 4758 } 4759 |.else 4760 if (!vk) { 4761 | sltiu TMP0, CARG3, LJ_TISNUM 4762 | sltiu TMP1, CARG4, LJ_TISNUM 4763 | sltiu AT, CRET2, LJ_TISNUM 4764 | and TMP0, TMP0, TMP1 4765 | and AT, AT, TMP0 4766 | beqz AT, ->vmeta_for 4767 |. nop 4768 | bal ->vm_sfcmpolex 4769 |. lw TMP3, FORL_STEP*8+HI(RA) 4770 | b <1 4771 |. nop 4772 } else { 4773 | load_got __adddf3 4774 | call_extern 4775 |. sw TMP2, TMPD 4776 | ld CARG2, FORL_STOP*8(RA) 4777 | move CARG1, CRET1 4778 if ( op == BC_JFORL ) { 4779 | lhu RD, -4+OFS_RD(PC) 4780 | decode_RD8b RD 4781 } 4782 | bal ->vm_sfcmpolex 4783 |. lw TMP3, FORL_STEP*8+HI(RA) 4784 | b <1 4785 |. lw TMP2, TMPD 4786 } 4787 |.endif 4788 break; 4789 4790 case BC_ITERL: 4791 |.if JIT 4792 | hotloop 4793 |.endif 4794 | // Fall through. Assumes BC_IITERL follows. 4795 break; 4796 4797 case BC_JITERL: 4798#if !LJ_HASJIT 4799 break; 4800#endif 4801 case BC_IITERL: 4802 | // RA = base*8, RD = target 4803 | daddu RA, BASE, RA 4804 | ld TMP1, 0(RA) 4805 | beq TMP1, TISNIL, >1 // Stop if iterator returned nil. 4806 |. nop 4807 if (op == BC_JITERL) { 4808 | b =>BC_JLOOP 4809 |. sd TMP1, -8(RA) 4810 } else { 4811 | branch_RD // Otherwise save control var + branch. 4812 | sd TMP1, -8(RA) 4813 } 4814 |1: 4815 | ins_next 4816 break; 4817 4818 case BC_LOOP: 4819 | // RA = base*8, RD = target (loop extent) 4820 | // Note: RA/RD is only used by trace recorder to determine scope/extent 4821 | // This opcode does NOT jump, it's only purpose is to detect a hot loop. 4822 |.if JIT 4823 | hotloop 4824 |.endif 4825 | // Fall through. Assumes BC_ILOOP follows. 4826 break; 4827 4828 case BC_ILOOP: 4829 | // RA = base*8, RD = target (loop extent) 4830 | ins_next 4831 break; 4832 4833 case BC_JLOOP: 4834 |.if JIT 4835 | // RA = base*8 (ignored), RD = traceno*8 4836 | ld TMP1, DISPATCH_J(trace)(DISPATCH) 4837 | li AT, 0 4838 | daddu TMP1, TMP1, RD 4839 | // Traces on MIPS don't store the trace number, so use 0. 4840 | sd AT, DISPATCH_GL(vmstate)(DISPATCH) 4841 | ld TRACE:TMP2, 0(TMP1) 4842 | sd BASE, DISPATCH_GL(jit_base)(DISPATCH) 4843 | ld TMP2, TRACE:TMP2->mcode 4844 | sd L, DISPATCH_GL(tmpbuf.L)(DISPATCH) 4845 | jr TMP2 4846 |. daddiu JGL, DISPATCH, GG_DISP2G+32768 4847 |.endif 4848 break; 4849 4850 case BC_JMP: 4851 | // RA = base*8 (only used by trace recorder), RD = target 4852 | branch_RD 4853 | ins_next 4854 break; 4855 4856 /* -- Function headers -------------------------------------------------- */ 4857 4858 case BC_FUNCF: 4859 |.if JIT 4860 | hotcall 4861 |.endif 4862 case BC_FUNCV: /* NYI: compiled vararg functions. */ 4863 | // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow. 4864 break; 4865 4866 case BC_JFUNCF: 4867#if !LJ_HASJIT 4868 break; 4869#endif 4870 case BC_IFUNCF: 4871 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8 4872 | ld TMP2, L->maxstack 4873 | lbu TMP1, -4+PC2PROTO(numparams)(PC) 4874 | ld KBASE, -4+PC2PROTO(k)(PC) 4875 | sltu AT, TMP2, RA 4876 | bnez AT, ->vm_growstack_l 4877 |. sll TMP1, TMP1, 3 4878 if (op != BC_JFUNCF) { 4879 | ins_next1 4880 } 4881 |2: 4882 | sltu AT, NARGS8:RC, TMP1 // Check for missing parameters. 4883 | bnez AT, >3 4884 |. daddu AT, BASE, NARGS8:RC 4885 if (op == BC_JFUNCF) { 4886 | decode_RD8a RD, INS 4887 | b =>BC_JLOOP 4888 |. decode_RD8b RD 4889 } else { 4890 | ins_next2 4891 } 4892 | 4893 |3: // Clear missing parameters. 4894 | sd TISNIL, 0(AT) 4895 | b <2 4896 |. addiu NARGS8:RC, NARGS8:RC, 8 4897 break; 4898 4899 case BC_JFUNCV: 4900#if !LJ_HASJIT 4901 break; 4902#endif 4903 | NYI // NYI: compiled vararg functions 4904 break; /* NYI: compiled vararg functions. */ 4905 4906 case BC_IFUNCV: 4907 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8 4908 | li TMP0, LJ_TFUNC 4909 | daddu TMP1, BASE, RC 4910 | ld TMP2, L->maxstack 4911 | settp LFUNC:RB, TMP0 4912 | daddu TMP0, RA, RC 4913 | sd LFUNC:RB, 0(TMP1) // Store (tagged) copy of LFUNC. 4914 | daddiu TMP3, RC, 16+FRAME_VARG 4915 | sltu AT, TMP0, TMP2 4916 | ld KBASE, -4+PC2PROTO(k)(PC) 4917 | beqz AT, ->vm_growstack_l 4918 |. sd TMP3, 8(TMP1) // Store delta + FRAME_VARG. 4919 | lbu TMP2, -4+PC2PROTO(numparams)(PC) 4920 | move RA, BASE 4921 | move RC, TMP1 4922 | ins_next1 4923 | beqz TMP2, >3 4924 |. daddiu BASE, TMP1, 16 4925 |1: 4926 | ld TMP0, 0(RA) 4927 | sltu AT, RA, RC // Less args than parameters? 4928 | move CARG1, TMP0 4929 | movz TMP0, TISNIL, AT // Clear missing parameters. 4930 | movn CARG1, TISNIL, AT // Clear old fixarg slot (help the GC). 4931 | addiu TMP2, TMP2, -1 4932 | sd TMP0, 16(TMP1) 4933 | daddiu TMP1, TMP1, 8 4934 | sd CARG1, 0(RA) 4935 | bnez TMP2, <1 4936 |. daddiu RA, RA, 8 4937 |3: 4938 | ins_next2 4939 break; 4940 4941 case BC_FUNCC: 4942 case BC_FUNCCW: 4943 | // BASE = new base, RA = BASE+framesize*8, RB = CFUNC, RC = nargs*8 4944 if (op == BC_FUNCC) { 4945 | ld CFUNCADDR, CFUNC:RB->f 4946 } else { 4947 | ld CFUNCADDR, DISPATCH_GL(wrapf)(DISPATCH) 4948 } 4949 | daddu TMP1, RA, NARGS8:RC 4950 | ld TMP2, L->maxstack 4951 | daddu RC, BASE, NARGS8:RC 4952 | sd BASE, L->base 4953 | sltu AT, TMP2, TMP1 4954 | sd RC, L->top 4955 | li_vmstate C 4956 if (op == BC_FUNCCW) { 4957 | ld CARG2, CFUNC:RB->f 4958 } 4959 | bnez AT, ->vm_growstack_c // Need to grow stack. 4960 |. move CARG1, L 4961 | jalr CFUNCADDR // (lua_State *L [, lua_CFunction f]) 4962 |. st_vmstate 4963 | // Returns nresults. 4964 | ld BASE, L->base 4965 | sll RD, CRET1, 3 4966 | ld TMP1, L->top 4967 | li_vmstate INTERP 4968 | ld PC, FRAME_PC(BASE) // Fetch PC of caller. 4969 | dsubu RA, TMP1, RD // RA = L->top - nresults*8 4970 | sd L, DISPATCH_GL(cur_L)(DISPATCH) 4971 | b ->vm_returnc 4972 |. st_vmstate 4973 break; 4974 4975 /* ---------------------------------------------------------------------- */ 4976 4977 default: 4978 fprintf(stderr, "Error: undefined opcode BC_%s\n", bc_names[op]); 4979 exit(2); 4980 break; 4981 } 4982} 4983 4984static int build_backend(BuildCtx *ctx) 4985{ 4986 int op; 4987 4988 dasm_growpc(Dst, BC__MAX); 4989 4990 build_subroutines(ctx); 4991 4992 |.code_op 4993 for (op = 0; op < BC__MAX; op++) 4994 build_ins(ctx, (BCOp)op, op); 4995 4996 return BC__MAX; 4997} 4998 4999/* Emit pseudo frame-info for all assembler functions. */ 5000static void emit_asm_debug(BuildCtx *ctx) 5001{ 5002 int fcofs = (int)((uint8_t *)ctx->glob[GLOB_vm_ffi_call] - ctx->code); 5003 int i; 5004 switch (ctx->mode) { 5005 case BUILD_elfasm: 5006 fprintf(ctx->fp, "\t.section .debug_frame,\"\",@progbits\n"); 5007 fprintf(ctx->fp, 5008 ".Lframe0:\n" 5009 "\t.4byte .LECIE0-.LSCIE0\n" 5010 ".LSCIE0:\n" 5011 "\t.4byte 0xffffffff\n" 5012 "\t.byte 0x1\n" 5013 "\t.string \"\"\n" 5014 "\t.uleb128 0x1\n" 5015 "\t.sleb128 -4\n" 5016 "\t.byte 31\n" 5017 "\t.byte 0xc\n\t.uleb128 29\n\t.uleb128 0\n" 5018 "\t.align 2\n" 5019 ".LECIE0:\n\n"); 5020 fprintf(ctx->fp, 5021 ".LSFDE0:\n" 5022 "\t.4byte .LEFDE0-.LASFDE0\n" 5023 ".LASFDE0:\n" 5024 "\t.4byte .Lframe0\n" 5025 "\t.8byte .Lbegin\n" 5026 "\t.8byte %d\n" 5027 "\t.byte 0xe\n\t.uleb128 %d\n" 5028 "\t.byte 0x9f\n\t.sleb128 2*5\n" 5029 "\t.byte 0x9e\n\t.sleb128 2*6\n", 5030 fcofs, CFRAME_SIZE); 5031 for (i = 23; i >= 16; i--) 5032 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+i, 2*(30-i)); 5033#if !LJ_SOFTFP 5034 for (i = 31; i >= 24; i--) 5035 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+32+i, 2*(46-i)); 5036#endif 5037 fprintf(ctx->fp, 5038 "\t.align 2\n" 5039 ".LEFDE0:\n\n"); 5040#if LJ_HASFFI 5041 fprintf(ctx->fp, 5042 ".LSFDE1:\n" 5043 "\t.4byte .LEFDE1-.LASFDE1\n" 5044 ".LASFDE1:\n" 5045 "\t.4byte .Lframe0\n" 5046 "\t.4byte lj_vm_ffi_call\n" 5047 "\t.4byte %d\n" 5048 "\t.byte 0x9f\n\t.uleb128 2*1\n" 5049 "\t.byte 0x90\n\t.uleb128 2*2\n" 5050 "\t.byte 0xd\n\t.uleb128 0x10\n" 5051 "\t.align 2\n" 5052 ".LEFDE1:\n\n", (int)ctx->codesz - fcofs); 5053#endif 5054#if !LJ_NO_UNWIND 5055 /* NYI */ 5056#endif 5057 break; 5058 default: 5059 break; 5060 } 5061} 5062 5063