1 /* SPDX-License-Identifier: MIT
2 *
3 * Permission is hereby granted, free of charge, to any person
4 * obtaining a copy of this software and associated documentation
5 * files (the "Software"), to deal in the Software without
6 * restriction, including without limitation the rights to use, copy,
7 * modify, merge, publish, distribute, sublicense, and/or sell copies
8 * of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be
12 * included in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Copyright:
24 * 2020 Evan Nemerson <evan@nemerson.com>
25 * 2020 Sean Maher <seanptmaher@gmail.com>
26 */
27
28 #if !defined(SIMDE_ARM_NEON_PMAX_H)
29 #define SIMDE_ARM_NEON_PMAX_H
30
31 #include "types.h"
32 #include "max.h"
33 #include "uzp1.h"
34 #include "uzp2.h"
35
36 HEDLEY_DIAGNOSTIC_PUSH
37 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
38 SIMDE_BEGIN_DECLS_
39
40 SIMDE_FUNCTION_ATTRIBUTES
41 simde_float32x2_t
simde_vpmax_f32(simde_float32x2_t a,simde_float32x2_t b)42 simde_vpmax_f32(simde_float32x2_t a, simde_float32x2_t b) {
43 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
44 return vpmax_f32(a, b);
45 #else
46 return simde_vmax_f32(simde_vuzp1_f32(a, b), simde_vuzp2_f32(a, b));
47 #endif
48 }
49 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
50 #undef vpmax_f32
51 #define vpmax_f32(a, b) simde_vpmax_f32((a), (b))
52 #endif
53
54 SIMDE_FUNCTION_ATTRIBUTES
55 simde_int8x8_t
simde_vpmax_s8(simde_int8x8_t a,simde_int8x8_t b)56 simde_vpmax_s8(simde_int8x8_t a, simde_int8x8_t b) {
57 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
58 return vpmax_s8(a, b);
59 #else
60 return simde_vmax_s8(simde_vuzp1_s8(a, b), simde_vuzp2_s8(a, b));
61 #endif
62 }
63 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
64 #undef vpmax_s8
65 #define vpmax_s8(a, b) simde_vpmax_s8((a), (b))
66 #endif
67
68 SIMDE_FUNCTION_ATTRIBUTES
69 simde_int16x4_t
simde_vpmax_s16(simde_int16x4_t a,simde_int16x4_t b)70 simde_vpmax_s16(simde_int16x4_t a, simde_int16x4_t b) {
71 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
72 return vpmax_s16(a, b);
73 #else
74 return simde_vmax_s16(simde_vuzp1_s16(a, b), simde_vuzp2_s16(a, b));
75 #endif
76 }
77 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
78 #undef vpmax_s16
79 #define vpmax_s16(a, b) simde_vpmax_s16((a), (b))
80 #endif
81
82 SIMDE_FUNCTION_ATTRIBUTES
83 simde_int32x2_t
simde_vpmax_s32(simde_int32x2_t a,simde_int32x2_t b)84 simde_vpmax_s32(simde_int32x2_t a, simde_int32x2_t b) {
85 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
86 return vpmax_s32(a, b);
87 #else
88 return simde_vmax_s32(simde_vuzp1_s32(a, b), simde_vuzp2_s32(a, b));
89 #endif
90 }
91 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
92 #undef vpmax_s32
93 #define vpmax_s32(a, b) simde_vpmax_s32((a), (b))
94 #endif
95
96 SIMDE_FUNCTION_ATTRIBUTES
97 simde_uint8x8_t
simde_vpmax_u8(simde_uint8x8_t a,simde_uint8x8_t b)98 simde_vpmax_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
99 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
100 return vpmax_u8(a, b);
101 #else
102 return simde_vmax_u8(simde_vuzp1_u8(a, b), simde_vuzp2_u8(a, b));
103 #endif
104 }
105 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
106 #undef vpmax_u8
107 #define vpmax_u8(a, b) simde_vpmax_u8((a), (b))
108 #endif
109
110 SIMDE_FUNCTION_ATTRIBUTES
111 simde_uint16x4_t
simde_vpmax_u16(simde_uint16x4_t a,simde_uint16x4_t b)112 simde_vpmax_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
113 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
114 return vpmax_u16(a, b);
115 #else
116 return simde_vmax_u16(simde_vuzp1_u16(a, b), simde_vuzp2_u16(a, b));
117 #endif
118 }
119 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
120 #undef vpmax_u16
121 #define vpmax_u16(a, b) simde_vpmax_u16((a), (b))
122 #endif
123
124 SIMDE_FUNCTION_ATTRIBUTES
125 simde_uint32x2_t
simde_vpmax_u32(simde_uint32x2_t a,simde_uint32x2_t b)126 simde_vpmax_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
127 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
128 return vpmax_u32(a, b);
129 #else
130 return simde_vmax_u32(simde_vuzp1_u32(a, b), simde_vuzp2_u32(a, b));
131 #endif
132 }
133 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
134 #undef vpmax_u32
135 #define vpmax_u32(a, b) simde_vpmax_u32((a), (b))
136 #endif
137
138 SIMDE_FUNCTION_ATTRIBUTES
139 simde_float32x4_t
simde_vpmaxq_f32(simde_float32x4_t a,simde_float32x4_t b)140 simde_vpmaxq_f32(simde_float32x4_t a, simde_float32x4_t b) {
141 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
142 return vpmaxq_f32(a, b);
143 #else
144 return simde_vmaxq_f32(simde_vuzp1q_f32(a, b), simde_vuzp2q_f32(a, b));
145 #endif
146 }
147 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
148 #undef vpmaxq_f32
149 #define vpmaxq_f32(a, b) simde_vpmaxq_f32((a), (b))
150 #endif
151
152 SIMDE_FUNCTION_ATTRIBUTES
153 simde_float64x2_t
simde_vpmaxq_f64(simde_float64x2_t a,simde_float64x2_t b)154 simde_vpmaxq_f64(simde_float64x2_t a, simde_float64x2_t b) {
155 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
156 return vpmaxq_f64(a, b);
157 #else
158 return simde_vmaxq_f64(simde_vuzp1q_f64(a, b), simde_vuzp2q_f64(a, b));
159 #endif
160 }
161 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
162 #undef vpmaxq_f64
163 #define vpmaxq_f64(a, b) simde_vpmaxq_f64((a), (b))
164 #endif
165
166 SIMDE_FUNCTION_ATTRIBUTES
167 simde_int8x16_t
simde_vpmaxq_s8(simde_int8x16_t a,simde_int8x16_t b)168 simde_vpmaxq_s8(simde_int8x16_t a, simde_int8x16_t b) {
169 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
170 return vpmaxq_s8(a, b);
171 #else
172 return simde_vmaxq_s8(simde_vuzp1q_s8(a, b), simde_vuzp2q_s8(a, b));
173 #endif
174 }
175 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
176 #undef vpmaxq_s8
177 #define vpmaxq_s8(a, b) simde_vpmaxq_s8((a), (b))
178 #endif
179
180 SIMDE_FUNCTION_ATTRIBUTES
181 simde_int16x8_t
simde_vpmaxq_s16(simde_int16x8_t a,simde_int16x8_t b)182 simde_vpmaxq_s16(simde_int16x8_t a, simde_int16x8_t b) {
183 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
184 return vpmaxq_s16(a, b);
185 #else
186 return simde_vmaxq_s16(simde_vuzp1q_s16(a, b), simde_vuzp2q_s16(a, b));
187 #endif
188 }
189 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
190 #undef vpmaxq_s16
191 #define vpmaxq_s16(a, b) simde_vpmaxq_s16((a), (b))
192 #endif
193
194 SIMDE_FUNCTION_ATTRIBUTES
195 simde_int32x4_t
simde_vpmaxq_s32(simde_int32x4_t a,simde_int32x4_t b)196 simde_vpmaxq_s32(simde_int32x4_t a, simde_int32x4_t b) {
197 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
198 return vpmaxq_s32(a, b);
199 #else
200 return simde_vmaxq_s32(simde_vuzp1q_s32(a, b), simde_vuzp2q_s32(a, b));
201 #endif
202 }
203 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
204 #undef vpmaxq_s32
205 #define vpmaxq_s32(a, b) simde_vpmaxq_s32((a), (b))
206 #endif
207
208 SIMDE_FUNCTION_ATTRIBUTES
209 simde_uint8x16_t
simde_vpmaxq_u8(simde_uint8x16_t a,simde_uint8x16_t b)210 simde_vpmaxq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
211 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
212 return vpmaxq_u8(a, b);
213 #else
214 return simde_vmaxq_u8(simde_vuzp1q_u8(a, b), simde_vuzp2q_u8(a, b));
215 #endif
216 }
217 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
218 #undef vpmaxq_u8
219 #define vpmaxq_u8(a, b) simde_vpmaxq_u8((a), (b))
220 #endif
221
222 SIMDE_FUNCTION_ATTRIBUTES
223 simde_uint16x8_t
simde_vpmaxq_u16(simde_uint16x8_t a,simde_uint16x8_t b)224 simde_vpmaxq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
225 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
226 return vpmaxq_u16(a, b);
227 #else
228 return simde_vmaxq_u16(simde_vuzp1q_u16(a, b), simde_vuzp2q_u16(a, b));
229 #endif
230 }
231 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
232 #undef vpmaxq_u16
233 #define vpmaxq_u16(a, b) simde_vpmaxq_u16((a), (b))
234 #endif
235
236 SIMDE_FUNCTION_ATTRIBUTES
237 simde_uint32x4_t
simde_vpmaxq_u32(simde_uint32x4_t a,simde_uint32x4_t b)238 simde_vpmaxq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
239 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
240 return vpmaxq_u32(a, b);
241 #else
242 return simde_vmaxq_u32(simde_vuzp1q_u32(a, b), simde_vuzp2q_u32(a, b));
243 #endif
244 }
245 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
246 #undef vpmaxq_u32
247 #define vpmaxq_u32(a, b) simde_vpmaxq_u32((a), (b))
248 #endif
249
250 SIMDE_END_DECLS_
251 HEDLEY_DIAGNOSTIC_POP
252
253 #endif /* !defined(SIMDE_ARM_NEON_PMAX_H) */
254