1 /* SPDX-License-Identifier: MIT
2  *
3  * Permission is hereby granted, free of charge, to any person
4  * obtaining a copy of this software and associated documentation
5  * files (the "Software"), to deal in the Software without
6  * restriction, including without limitation the rights to use, copy,
7  * modify, merge, publish, distribute, sublicense, and/or sell copies
8  * of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be
12  * included in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Copyright:
24  *   2020      Evan Nemerson <evan@nemerson.com>
25  *   2020      Christopher Moore <moore@free.fr>
26  */
27 
28 #if !defined(SIMDE_ARM_NEON_CLEZ_H)
29 #define SIMDE_ARM_NEON_CLEZ_H
30 
31 #include "cle.h"
32 #include "dup_n.h"
33 #include "types.h"
34 
35 HEDLEY_DIAGNOSTIC_PUSH
36 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
37 SIMDE_BEGIN_DECLS_
38 
39 SIMDE_FUNCTION_ATTRIBUTES
40 simde_uint32x4_t
simde_vclezq_f32(simde_float32x4_t a)41 simde_vclezq_f32(simde_float32x4_t a) {
42   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
43     return vclezq_f32(a);
44   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
45     return simde_vcleq_f32(a, simde_vdupq_n_f32(SIMDE_FLOAT32_C(0.0)));
46   #else
47     simde_float32x4_private a_ = simde_float32x4_to_private(a);
48     simde_uint32x4_private r_;
49 
50     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
51       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= SIMDE_FLOAT32_C(0.0));
52     #else
53       SIMDE_VECTORIZE
54       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
55         r_.values[i] = (a_.values[i] <= SIMDE_FLOAT32_C(0.0)) ? UINT32_MAX : 0;
56       }
57     #endif
58 
59     return simde_uint32x4_from_private(r_);
60   #endif
61 }
62 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
63   #undef vclezq_f32
64   #define vclezq_f32(a) simde_vclezq_f32(a)
65 #endif
66 
67 SIMDE_FUNCTION_ATTRIBUTES
68 simde_uint64x2_t
simde_vclezq_f64(simde_float64x2_t a)69 simde_vclezq_f64(simde_float64x2_t a) {
70   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
71     return vclezq_f64(a);
72   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
73     return simde_vcleq_f64(a, simde_vdupq_n_f64(SIMDE_FLOAT64_C(0.0)));
74   #else
75     simde_float64x2_private a_ = simde_float64x2_to_private(a);
76     simde_uint64x2_private r_;
77 
78     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
79       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= SIMDE_FLOAT64_C(0.0));
80     #else
81       SIMDE_VECTORIZE
82       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
83         r_.values[i] = (a_.values[i] <= SIMDE_FLOAT64_C(0.0)) ? UINT64_MAX : 0;
84       }
85     #endif
86 
87     return simde_uint64x2_from_private(r_);
88   #endif
89 }
90 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
91   #undef vclezq_f64
92   #define vclezq_f64(a) simde_vclezq_f64(a)
93 #endif
94 
95 SIMDE_FUNCTION_ATTRIBUTES
96 simde_uint8x16_t
simde_vclezq_s8(simde_int8x16_t a)97 simde_vclezq_s8(simde_int8x16_t a) {
98   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
99     return vclezq_s8(a);
100   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
101     return simde_vcleq_s8(a, simde_vdupq_n_s8(0));
102   #else
103     simde_int8x16_private a_ = simde_int8x16_to_private(a);
104     simde_uint8x16_private r_;
105 
106     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
107       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
108     #else
109       SIMDE_VECTORIZE
110       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
111         r_.values[i] = (a_.values[i] <= 0) ? UINT8_MAX : 0;
112       }
113     #endif
114 
115     return simde_uint8x16_from_private(r_);
116   #endif
117 }
118 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
119   #undef vclezq_s8
120   #define vclezq_s8(a) simde_vclezq_s8(a)
121 #endif
122 
123 SIMDE_FUNCTION_ATTRIBUTES
124 simde_uint16x8_t
simde_vclezq_s16(simde_int16x8_t a)125 simde_vclezq_s16(simde_int16x8_t a) {
126   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
127     return vclezq_s16(a);
128   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
129     return simde_vcleq_s16(a, simde_vdupq_n_s16(0));
130   #else
131     simde_int16x8_private a_ = simde_int16x8_to_private(a);
132     simde_uint16x8_private r_;
133 
134     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
135       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
136     #else
137       SIMDE_VECTORIZE
138       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
139         r_.values[i] = (a_.values[i] <= 0) ? UINT16_MAX : 0;
140       }
141     #endif
142 
143     return simde_uint16x8_from_private(r_);
144   #endif
145 }
146 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
147   #undef vclezq_s16
148   #define vclezq_s16(a) simde_vclezq_s16(a)
149 #endif
150 
151 SIMDE_FUNCTION_ATTRIBUTES
152 simde_uint32x4_t
simde_vclezq_s32(simde_int32x4_t a)153 simde_vclezq_s32(simde_int32x4_t a) {
154   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
155     return vclezq_s32(a);
156   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
157     return simde_vcleq_s32(a, simde_vdupq_n_s32(0));
158   #else
159     simde_int32x4_private a_ = simde_int32x4_to_private(a);
160     simde_uint32x4_private r_;
161 
162     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
163       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
164     #else
165       SIMDE_VECTORIZE
166       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
167         r_.values[i] = (a_.values[i] <= 0) ? UINT32_MAX : 0;
168       }
169     #endif
170 
171     return simde_uint32x4_from_private(r_);
172   #endif
173 }
174 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
175   #undef vclezq_s32
176   #define vclezq_s32(a) simde_vclezq_s32(a)
177 #endif
178 
179 SIMDE_FUNCTION_ATTRIBUTES
180 simde_uint64x2_t
simde_vclezq_s64(simde_int64x2_t a)181 simde_vclezq_s64(simde_int64x2_t a) {
182   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
183     return vclezq_s64(a);
184   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
185     return simde_vcleq_s64(a, simde_vdupq_n_s64(0));
186   #else
187     simde_int64x2_private a_ = simde_int64x2_to_private(a);
188     simde_uint64x2_private r_;
189 
190     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
191       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
192     #else
193       SIMDE_VECTORIZE
194       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
195         r_.values[i] = (a_.values[i] <= 0) ? UINT64_MAX : 0;
196       }
197     #endif
198 
199     return simde_uint64x2_from_private(r_);
200   #endif
201 }
202 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
203   #undef vclezq_s64
204   #define vclezq_s64(a) simde_vclezq_s64(a)
205 #endif
206 
207 SIMDE_FUNCTION_ATTRIBUTES
208 simde_uint32x2_t
simde_vclez_f32(simde_float32x2_t a)209 simde_vclez_f32(simde_float32x2_t a) {
210   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
211     return vclez_f32(a);
212   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
213     return simde_vcle_f32(a, simde_vdup_n_f32(SIMDE_FLOAT32_C(0.0)));
214   #else
215     simde_float32x2_private a_ = simde_float32x2_to_private(a);
216     simde_uint32x2_private r_;
217 
218     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
219       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= SIMDE_FLOAT32_C(0.0));
220     #else
221       SIMDE_VECTORIZE
222       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
223         r_.values[i] = (a_.values[i] <= SIMDE_FLOAT32_C(0.0)) ? UINT32_MAX : 0;
224       }
225     #endif
226 
227     return simde_uint32x2_from_private(r_);
228   #endif
229 }
230 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
231   #undef vclez_f32
232   #define vclez_f32(a) simde_vclez_f32(a)
233 #endif
234 
235 SIMDE_FUNCTION_ATTRIBUTES
236 simde_uint64x1_t
simde_vclez_f64(simde_float64x1_t a)237 simde_vclez_f64(simde_float64x1_t a) {
238   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
239     return vclez_f64(a);
240   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
241     return simde_vcle_f64(a, simde_vdup_n_f64(SIMDE_FLOAT64_C(0.0)));
242   #else
243     simde_float64x1_private a_ = simde_float64x1_to_private(a);
244     simde_uint64x1_private r_;
245 
246     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
247       r_.values =  HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= SIMDE_FLOAT64_C(0.0));
248     #else
249       SIMDE_VECTORIZE
250       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
251         r_.values[i] = (a_.values[i] <= SIMDE_FLOAT64_C(0.0)) ? UINT64_MAX : 0;
252       }
253     #endif
254 
255     return simde_uint64x1_from_private(r_);
256   #endif
257 }
258 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
259   #undef vclez_f64
260   #define vclez_f64(a) simde_vclez_f64(a)
261 #endif
262 
263 SIMDE_FUNCTION_ATTRIBUTES
264 simde_uint8x8_t
simde_vclez_s8(simde_int8x8_t a)265 simde_vclez_s8(simde_int8x8_t a) {
266   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
267     return vclez_s8(a);
268   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
269     return simde_vcle_s8(a, simde_vdup_n_s8(0));
270   #else
271     simde_int8x8_private a_ = simde_int8x8_to_private(a);
272     simde_uint8x8_private r_;
273 
274     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
275       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
276     #else
277       SIMDE_VECTORIZE
278       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
279         r_.values[i] = (a_.values[i] <= 0) ? UINT8_MAX : 0;
280       }
281     #endif
282 
283     return simde_uint8x8_from_private(r_);
284   #endif
285 }
286 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
287   #undef vclez_s8
288   #define vclez_s8(a) simde_vclez_s8(a)
289 #endif
290 
291 SIMDE_FUNCTION_ATTRIBUTES
292 simde_uint16x4_t
simde_vclez_s16(simde_int16x4_t a)293 simde_vclez_s16(simde_int16x4_t a) {
294   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
295     return vclez_s16(a);
296   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
297     return simde_vcle_s16(a, simde_vdup_n_s16(0));
298   #else
299     simde_int16x4_private a_ = simde_int16x4_to_private(a);
300     simde_uint16x4_private r_;
301 
302     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
303       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
304     #else
305       SIMDE_VECTORIZE
306       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
307         r_.values[i] = (a_.values[i] <= 0) ? UINT16_MAX : 0;
308       }
309     #endif
310 
311     return simde_uint16x4_from_private(r_);
312   #endif
313 }
314 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
315   #undef vclez_s16
316   #define vclez_s16(a) simde_vclez_s16(a)
317 #endif
318 
319 SIMDE_FUNCTION_ATTRIBUTES
320 simde_uint32x2_t
simde_vclez_s32(simde_int32x2_t a)321 simde_vclez_s32(simde_int32x2_t a) {
322   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
323     return vclez_s32(a);
324   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
325     return simde_vcle_s32(a, simde_vdup_n_s32(0));
326   #else
327     simde_int32x2_private a_ = simde_int32x2_to_private(a);
328     simde_uint32x2_private r_;
329 
330     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
331       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
332     #else
333       SIMDE_VECTORIZE
334       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
335         r_.values[i] = (a_.values[i] <= 0) ? UINT32_MAX : 0;
336       }
337     #endif
338 
339     return simde_uint32x2_from_private(r_);
340   #endif
341 }
342 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
343   #undef vclez_s32
344   #define vclez_s32(a) simde_vclez_s32(a)
345 #endif
346 
347 SIMDE_FUNCTION_ATTRIBUTES
348 simde_uint64x1_t
simde_vclez_s64(simde_int64x1_t a)349 simde_vclez_s64(simde_int64x1_t a) {
350   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
351     return vclez_s64(a);
352   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
353     return simde_vcle_s64(a, simde_vdup_n_s64(0));
354   #else
355     simde_int64x1_private a_ = simde_int64x1_to_private(a);
356     simde_uint64x1_private r_;
357 
358     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
359       r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= 0);
360     #else
361       SIMDE_VECTORIZE
362       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
363         r_.values[i] = (a_.values[i] <= 0) ? UINT64_MAX : 0;
364       }
365     #endif
366 
367     return simde_uint64x1_from_private(r_);
368   #endif
369 }
370 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
371   #undef vclez_s64
372   #define vclez_s64(a) simde_vclez_s64(a)
373 #endif
374 
375 SIMDE_END_DECLS_
376 HEDLEY_DIAGNOSTIC_POP
377 
378 #endif /* !defined(SIMDE_ARM_NEON_CLEZ_H) */
379