1 /* SPDX-License-Identifier: MIT
2  *
3  * Permission is hereby granted, free of charge, to any person
4  * obtaining a copy of this software and associated documentation
5  * files (the "Software"), to deal in the Software without
6  * restriction, including without limitation the rights to use, copy,
7  * modify, merge, publish, distribute, sublicense, and/or sell copies
8  * of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be
12  * included in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Copyright:
24  *   2020      Evan Nemerson <evan@nemerson.com>
25  *   2020      Christopher Moore <moore@free.fr>
26  */
27 
28 #if !defined(SIMDE_X86_AVX512_INSERT_H)
29 #define SIMDE_X86_AVX512_INSERT_H
30 
31 #include "types.h"
32 #include "mov.h"
33 
34 HEDLEY_DIAGNOSTIC_PUSH
35 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
36 SIMDE_BEGIN_DECLS_
37 
38 SIMDE_FUNCTION_ATTRIBUTES
39 simde__m512
simde_mm512_insertf32x4(simde__m512 a,simde__m128 b,int imm8)40 simde_mm512_insertf32x4 (simde__m512 a, simde__m128 b, int imm8)
41     SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
42   simde__m512_private a_ = simde__m512_to_private(a);
43 
44   a_.m128[imm8 & 3] = b;
45 
46   return simde__m512_from_private(a_);
47 }
48 #if defined(SIMDE_X86_AVX512F_NATIVE)
49   #define simde_mm512_insertf32x4(a, b, imm8) _mm512_insertf32x4(a, b, imm8)
50 #endif
51 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
52   #undef _mm512_insertf32x4
53   #define _mm512_insertf32x4(a, b, imm8) simde_mm512_insertf32x4(a, b, imm8)
54 #endif
55 
56 #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0))
57   #define simde_mm512_mask_insertf32x4(src, k, a, b, imm8) _mm512_mask_insertf32x4(src, k, a, b, imm8)
58 #else
59   #define simde_mm512_mask_insertf32x4(src, k, a, b, imm8) simde_mm512_mask_mov_ps(src, k, simde_mm512_insertf32x4(a, b, imm8))
60 #endif
61 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
62   #undef _mm512_mask_insertf32x4
63   #define _mm512_mask_insertf32x4(src, k, a, b, imm8) simde_mm512_mask_insertf32x4(src, k, a, b, imm8)
64 #endif
65 
66 #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0))
67   #define simde_mm512_maskz_insertf32x4(k, a, b, imm8) _mm512_maskz_insertf32x4(k, a, b, imm8)
68 #else
69   #define simde_mm512_maskz_insertf32x4(k, a, b, imm8) simde_mm512_maskz_mov_ps(k, simde_mm512_insertf32x4(a, b, imm8))
70 #endif
71 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
72   #undef _mm512_maskz_insertf32x4
73   #define _mm512_maskz_insertf32x4(k, a, b, imm8) simde_mm512_maskz_insertf32x4(k, a, b, imm8)
74 #endif
75 
76 SIMDE_FUNCTION_ATTRIBUTES
77 simde__m512d
simde_mm512_insertf64x4(simde__m512d a,simde__m256d b,int imm8)78 simde_mm512_insertf64x4 (simde__m512d a, simde__m256d b, int imm8)
79     SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
80   simde__m512d_private a_ = simde__m512d_to_private(a);
81 
82   a_.m256d[imm8 & 1] = b;
83 
84   return simde__m512d_from_private(a_);
85 }
86 #if defined(SIMDE_X86_AVX512F_NATIVE)
87   #define simde_mm512_insertf64x4(a, b, imm8) _mm512_insertf64x4(a, b, imm8)
88 #endif
89 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
90   #undef _mm512_insertf64x4
91   #define _mm512_insertf64x4(a, b, imm8) simde_mm512_insertf64x4(a, b, imm8)
92 #endif
93 
94 #if defined(SIMDE_X86_AVX512F_NATIVE)
95   #define simde_mm512_mask_insertf64x4(src, k, a, b, imm8) _mm512_mask_insertf64x4(src, k, a, b, imm8)
96 #else
97   #define simde_mm512_mask_insertf64x4(src, k, a, b, imm8) simde_mm512_mask_mov_pd(src, k, simde_mm512_insertf64x4(a, b, imm8))
98 #endif
99 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
100   #undef _mm512_mask_insertf64x4
101   #define _mm512_mask_insertf64x4(src, k, a, b, imm8) simde_mm512_mask_insertf64x4(src, k, a, b, imm8)
102 #endif
103 
104 #if defined(SIMDE_X86_AVX512F_NATIVE)
105   #define simde_mm512_maskz_insertf64x4(k, a, b, imm8) _mm512_maskz_insertf64x4(k, a, b, imm8)
106 #else
107   #define simde_mm512_maskz_insertf64x4(k, a, b, imm8) simde_mm512_maskz_mov_pd(k, simde_mm512_insertf64x4(a, b, imm8))
108 #endif
109 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
110   #undef _mm512_maskz_insertf64x4
111   #define _mm512_maskz_insertf64x4(k, a, b, imm8) simde_mm512_maskz_insertf64x4(k, a, b, imm8)
112 #endif
113 
114 SIMDE_FUNCTION_ATTRIBUTES
115 simde__m512i
simde_mm512_inserti32x4(simde__m512i a,simde__m128i b,int imm8)116 simde_mm512_inserti32x4 (simde__m512i a, simde__m128i b, int imm8)
117     SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
118   simde__m512i_private a_ = simde__m512i_to_private(a);
119 
120   a_.m128i[imm8 & 3] = b;
121 
122   return simde__m512i_from_private(a_);
123 }
124 #if defined(SIMDE_X86_AVX512F_NATIVE)
125   #define simde_mm512_inserti32x4(a, b, imm8) _mm512_inserti32x4(a, b, imm8)
126 #endif
127 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
128   #undef _mm512_inserti32x4
129   #define _mm512_inserti32x4(a, b, imm8) simde_mm512_inserti32x4(a, b, imm8)
130 #endif
131 
132 #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0))
133   #define simde_mm512_mask_inserti32x4(src, k, a, b, imm8) _mm512_mask_inserti32x4(src, k, a, b, imm8)
134 #else
135   #define simde_mm512_mask_inserti32x4(src, k, a, b, imm8) simde_mm512_mask_mov_epi32(src, k, simde_mm512_inserti32x4(a, b, imm8))
136 #endif
137 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
138   #undef _mm512_mask_inserti32x4
139   #define _mm512_mask_inserti32x4(src, k, a, b, imm8) simde_mm512_mask_inserti32x4(src, k, a, b, imm8)
140 #endif
141 
142 #if defined(SIMDE_X86_AVX512F_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,0,0))
143   #define simde_mm512_maskz_inserti32x4(k, a, b, imm8) _mm512_maskz_inserti32x4(k, a, b, imm8)
144 #else
145   #define simde_mm512_maskz_inserti32x4(k, a, b, imm8) simde_mm512_maskz_mov_epi32(k, simde_mm512_inserti32x4(a, b, imm8))
146 #endif
147 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
148   #undef _mm512_maskz_inserti32x4
149   #define _mm512_maskz_inserti32x4(k, a, b, imm8) simde_mm512_maskz_inserti32x4(k, a, b, imm8)
150 #endif
151 
152 SIMDE_FUNCTION_ATTRIBUTES
153 simde__m512i
simde_mm512_inserti64x4(simde__m512i a,simde__m256i b,int imm8)154 simde_mm512_inserti64x4 (simde__m512i a, simde__m256i b, int imm8)
155     SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 1) {
156   simde__m512i_private a_ = simde__m512i_to_private(a);
157 
158   a_.m256i[imm8 & 1] = b;
159 
160   return simde__m512i_from_private(a_);
161 }
162 #if defined(SIMDE_X86_AVX512F_NATIVE)
163   #define simde_mm512_inserti64x4(a, b, imm8) _mm512_inserti64x4(a, b, imm8)
164 #endif
165 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
166   #undef _mm512_inserti64x4
167   #define _mm512_inserti64x4(a, b, imm8) simde_mm512_inserti64x4(a, b, imm8)
168 #endif
169 
170 #if defined(SIMDE_X86_AVX512F_NATIVE)
171   #define simde_mm512_mask_inserti64x4(src, k, a, b, imm8) _mm512_mask_inserti64x4(src, k, a, b, imm8)
172 #else
173   #define simde_mm512_mask_inserti64x4(src, k, a, b, imm8) simde_mm512_mask_mov_epi64(src, k, simde_mm512_inserti64x4(a, b, imm8))
174 #endif
175 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
176   #undef _mm512_mask_inserti64x4
177   #define _mm512_mask_inserti64x4(src, k, a, b, imm8) simde_mm512_mask_inserti64x4(src, k, a, b, imm8)
178 #endif
179 
180 #if defined(SIMDE_X86_AVX512F_NATIVE)
181   #define simde_mm512_maskz_inserti64x4(k, a, b, imm8) _mm512_maskz_inserti64x4(k, a, b, imm8)
182 #else
183   #define simde_mm512_maskz_inserti64x4(k, a, b, imm8) simde_mm512_maskz_mov_epi64(k, simde_mm512_inserti64x4(a, b, imm8))
184 #endif
185 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
186   #undef _mm512_maskz_inserti64x4
187   #define _mm512_maskz_inserti64x4(k, a, b, imm8) simde_mm512_maskz_inserti64x4(k, a, b, imm8)
188 #endif
189 
190 SIMDE_END_DECLS_
191 HEDLEY_DIAGNOSTIC_POP
192 
193 #endif /* !defined(SIMDE_X86_AVX512_INSERT_H) */
194