1 /*
2 * x86/crc32_pclmul_template.h
3 *
4 * Copyright 2016 Eric Biggers
5 *
6 * Permission is hereby granted, free of charge, to any person
7 * obtaining a copy of this software and associated documentation
8 * files (the "Software"), to deal in the Software without
9 * restriction, including without limitation the rights to use,
10 * copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following
13 * conditions:
14 *
15 * The above copyright notice and this permission notice shall be
16 * included in all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
20 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
22 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28 #include <wmmintrin.h>
29
30 /*
31 * CRC-32 folding with PCLMULQDQ.
32 *
33 * The basic idea is to repeatedly "fold" each 512 bits into the next 512 bits,
34 * producing an abbreviated message which is congruent the original message
35 * modulo the generator polynomial G(x).
36 *
37 * Folding each 512 bits is implemented as eight 64-bit folds, each of which
38 * uses one carryless multiplication instruction. It's expected that CPUs may
39 * be able to execute some of these multiplications in parallel.
40 *
41 * Explanation of "folding": let A(x) be 64 bits from the message, and let B(x)
42 * be 95 bits from a constant distance D later in the message. The relevant
43 * portion of the message can be written as:
44 *
45 * M(x) = A(x)*x^D + B(x)
46 *
47 * ... where + and * represent addition and multiplication, respectively, of
48 * polynomials over GF(2). Note that when implemented on a computer, these
49 * operations are equivalent to XOR and carryless multiplication, respectively.
50 *
51 * For the purpose of CRC calculation, only the remainder modulo the generator
52 * polynomial G(x) matters:
53 *
54 * M(x) mod G(x) = (A(x)*x^D + B(x)) mod G(x)
55 *
56 * Since the modulo operation can be applied anywhere in a sequence of additions
57 * and multiplications without affecting the result, this is equivalent to:
58 *
59 * M(x) mod G(x) = (A(x)*(x^D mod G(x)) + B(x)) mod G(x)
60 *
61 * For any D, 'x^D mod G(x)' will be a polynomial with maximum degree 31, i.e.
62 * a 32-bit quantity. So 'A(x) * (x^D mod G(x))' is equivalent to a carryless
63 * multiplication of a 64-bit quantity by a 32-bit quantity, producing a 95-bit
64 * product. Then, adding (XOR-ing) the product to B(x) produces a polynomial
65 * with the same length as B(x) but with the same remainder as 'A(x)*x^D +
66 * B(x)'. This is the basic fold operation with 64 bits.
67 *
68 * Note that the carryless multiplication instruction PCLMULQDQ actually takes
69 * two 64-bit inputs and produces a 127-bit product in the low-order bits of a
70 * 128-bit XMM register. This works fine, but care must be taken to account for
71 * "bit endianness". With the CRC version implemented here, bits are always
72 * ordered such that the lowest-order bit represents the coefficient of highest
73 * power of x and the highest-order bit represents the coefficient of the lowest
74 * power of x. This is backwards from the more intuitive order. Still,
75 * carryless multiplication works essentially the same either way. It just must
76 * be accounted for that when we XOR the 95-bit product in the low-order 95 bits
77 * of a 128-bit XMM register into 128-bits of later data held in another XMM
78 * register, we'll really be XOR-ing the product into the mathematically higher
79 * degree end of those later bits, not the lower degree end as may be expected.
80 *
81 * So given that caveat and the fact that we process 512 bits per iteration, the
82 * 'D' values we need for the two 64-bit halves of each 128 bits of data are:
83 *
84 * D = (512 + 95) - 64 for the higher-degree half of each 128 bits,
85 * i.e. the lower order bits in the XMM register
86 *
87 * D = (512 + 95) - 128 for the lower-degree half of each 128 bits,
88 * i.e. the higher order bits in the XMM register
89 *
90 * The required 'x^D mod G(x)' values were precomputed.
91 *
92 * When <= 512 bits remain in the message, we finish up by folding across
93 * smaller distances. This works similarly; the distance D is just different,
94 * so different constant multipliers must be used. Finally, once the remaining
95 * message is just 64 bits, it is is reduced to the CRC-32 using Barrett
96 * reduction (explained later).
97 *
98 * For more information see the original paper from Intel:
99 * "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
100 * December 2009
101 * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
102 */
103 static u32 ATTRIBUTES
FUNCNAME_ALIGNED(u32 remainder,const __m128i * p,size_t nr_segs)104 FUNCNAME_ALIGNED(u32 remainder, const __m128i *p, size_t nr_segs)
105 {
106 /* Constants precomputed by gen_crc32_multipliers.c. Do not edit! */
107 const __v2di multipliers_4 = (__v2di){ 0x8F352D95, 0x1D9513D7 };
108 const __v2di multipliers_2 = (__v2di){ 0xF1DA05AA, 0x81256527 };
109 const __v2di multipliers_1 = (__v2di){ 0xAE689191, 0xCCAA009E };
110 const __v2di final_multiplier = (__v2di){ 0xB8BC6765 };
111 const __m128i mask32 = (__m128i)(__v4si){ 0xFFFFFFFF };
112 const __v2di barrett_reduction_constants =
113 (__v2di){ 0x00000001F7011641, 0x00000001DB710641 };
114
115 const __m128i * const end = p + nr_segs;
116 const __m128i * const end512 = p + (nr_segs & ~3);
117 __m128i x0, x1, x2, x3;
118
119 /*
120 * Account for the current 'remainder', i.e. the CRC of the part of the
121 * message already processed. Explanation: rewrite the message
122 * polynomial M(x) in terms of the first part A(x), the second part
123 * B(x), and the length of the second part in bits |B(x)| >= 32:
124 *
125 * M(x) = A(x)*x^|B(x)| + B(x)
126 *
127 * Then the CRC of M(x) is:
128 *
129 * CRC(M(x)) = CRC(A(x)*x^|B(x)| + B(x))
130 * = CRC(A(x)*x^32*x^(|B(x)| - 32) + B(x))
131 * = CRC(CRC(A(x))*x^(|B(x)| - 32) + B(x))
132 *
133 * Note: all arithmetic is modulo G(x), the generator polynomial; that's
134 * why A(x)*x^32 can be replaced with CRC(A(x)) = A(x)*x^32 mod G(x).
135 *
136 * So the CRC of the full message is the CRC of the second part of the
137 * message where the first 32 bits of the second part of the message
138 * have been XOR'ed with the CRC of the first part of the message.
139 */
140 x0 = *p++;
141 x0 ^= (__m128i)(__v4si){ remainder };
142
143 if (p > end512) /* only 128, 256, or 384 bits of input? */
144 goto _128_bits_at_a_time;
145 x1 = *p++;
146 x2 = *p++;
147 x3 = *p++;
148
149 /* Fold 512 bits at a time */
150 for (; p != end512; p += 4) {
151 __m128i y0, y1, y2, y3;
152
153 y0 = p[0];
154 y1 = p[1];
155 y2 = p[2];
156 y3 = p[3];
157
158 /*
159 * Note: the immediate constant for PCLMULQDQ specifies which
160 * 64-bit halves of the 128-bit vectors to multiply:
161 *
162 * 0x00 means low halves (higher degree polynomial terms for us)
163 * 0x11 means high halves (lower degree polynomial terms for us)
164 */
165 y0 ^= _mm_clmulepi64_si128(x0, multipliers_4, 0x00);
166 y1 ^= _mm_clmulepi64_si128(x1, multipliers_4, 0x00);
167 y2 ^= _mm_clmulepi64_si128(x2, multipliers_4, 0x00);
168 y3 ^= _mm_clmulepi64_si128(x3, multipliers_4, 0x00);
169 y0 ^= _mm_clmulepi64_si128(x0, multipliers_4, 0x11);
170 y1 ^= _mm_clmulepi64_si128(x1, multipliers_4, 0x11);
171 y2 ^= _mm_clmulepi64_si128(x2, multipliers_4, 0x11);
172 y3 ^= _mm_clmulepi64_si128(x3, multipliers_4, 0x11);
173
174 x0 = y0;
175 x1 = y1;
176 x2 = y2;
177 x3 = y3;
178 }
179
180 /* Fold 512 bits => 128 bits */
181 x2 ^= _mm_clmulepi64_si128(x0, multipliers_2, 0x00);
182 x3 ^= _mm_clmulepi64_si128(x1, multipliers_2, 0x00);
183 x2 ^= _mm_clmulepi64_si128(x0, multipliers_2, 0x11);
184 x3 ^= _mm_clmulepi64_si128(x1, multipliers_2, 0x11);
185 x3 ^= _mm_clmulepi64_si128(x2, multipliers_1, 0x00);
186 x3 ^= _mm_clmulepi64_si128(x2, multipliers_1, 0x11);
187 x0 = x3;
188
189 _128_bits_at_a_time:
190 while (p != end) {
191 /* Fold 128 bits into next 128 bits */
192 x1 = *p++;
193 x1 ^= _mm_clmulepi64_si128(x0, multipliers_1, 0x00);
194 x1 ^= _mm_clmulepi64_si128(x0, multipliers_1, 0x11);
195 x0 = x1;
196 }
197
198 /* Now there are just 128 bits left, stored in 'x0'. */
199
200 /*
201 * Fold 128 => 96 bits. This also implicitly appends 32 zero bits,
202 * which is equivalent to multiplying by x^32. This is needed because
203 * the CRC is defined as M(x)*x^32 mod G(x), not just M(x) mod G(x).
204 */
205 x0 = _mm_srli_si128(x0, 8) ^
206 _mm_clmulepi64_si128(x0, multipliers_1, 0x10);
207
208 /* Fold 96 => 64 bits */
209 x0 = _mm_srli_si128(x0, 4) ^
210 _mm_clmulepi64_si128(x0 & mask32, final_multiplier, 0x00);
211
212 /*
213 * Finally, reduce 64 => 32 bits using Barrett reduction.
214 *
215 * Let M(x) = A(x)*x^32 + B(x) be the remaining message. The goal is to
216 * compute R(x) = M(x) mod G(x). Since degree(B(x)) < degree(G(x)):
217 *
218 * R(x) = (A(x)*x^32 + B(x)) mod G(x)
219 * = (A(x)*x^32) mod G(x) + B(x)
220 *
221 * Then, by the Division Algorithm there exists a unique q(x) such that:
222 *
223 * A(x)*x^32 mod G(x) = A(x)*x^32 - q(x)*G(x)
224 *
225 * Since the left-hand side is of maximum degree 31, the right-hand side
226 * must be too. This implies that we can apply 'mod x^32' to the
227 * right-hand side without changing its value:
228 *
229 * (A(x)*x^32 - q(x)*G(x)) mod x^32 = q(x)*G(x) mod x^32
230 *
231 * Note that '+' is equivalent to '-' in polynomials over GF(2).
232 *
233 * We also know that:
234 *
235 * / A(x)*x^32 \
236 * q(x) = floor ( --------- )
237 * \ G(x) /
238 *
239 * To compute this efficiently, we can multiply the top and bottom by
240 * x^32 and move the division by G(x) to the top:
241 *
242 * / A(x) * floor(x^64 / G(x)) \
243 * q(x) = floor ( ------------------------- )
244 * \ x^32 /
245 *
246 * Note that floor(x^64 / G(x)) is a constant.
247 *
248 * So finally we have:
249 *
250 * / A(x) * floor(x^64 / G(x)) \
251 * R(x) = B(x) + G(x)*floor ( ------------------------- )
252 * \ x^32 /
253 */
254 x1 = x0;
255 x0 = _mm_clmulepi64_si128(x0 & mask32, barrett_reduction_constants, 0x00);
256 x0 = _mm_clmulepi64_si128(x0 & mask32, barrett_reduction_constants, 0x10);
257 return _mm_cvtsi128_si32(_mm_srli_si128(x0 ^ x1, 4));
258 }
259
260 #define IMPL_ALIGNMENT 16
261 #define IMPL_SEGMENT_SIZE 16
262 #include "../crc32_vec_template.h"
263