1 ADDER - 4 BIT ALL-74HC00-GATE BINARY ADDER 2 * behavioral gate description 3 4*** SUBCIRCUIT DEFINITIONS 5.include 74HCng_short_2.lib 6.param vcc=3 tripdt=6n 7 8.SUBCKT ONEBIT 1 2 3 4 5 6 9* NODES: INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC 10X1 1 2 7 6 0 74HC00 11X2 1 7 8 6 0 74HC00 12X3 2 7 9 6 0 74HC00 13X4 8 9 10 6 0 74HC00 14X5 3 10 11 6 0 74HC00 15X6 3 11 12 6 0 74HC00 16X7 10 11 13 6 0 74HC00 17X8 12 13 4 6 0 74HC00 18X9 11 7 5 6 0 74HC00 19.ENDS ONEBIT 20 21.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9 22* NODES: INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1, 23* CARRY-IN, CARRY-OUT, VCC 24X1 1 2 7 5 10 9 ONEBIT 25X2 3 4 10 6 8 9 ONEBIT 26.ENDS TWOBIT 27 28.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 29* NODES: INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2), 30* OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC 31X1 1 2 3 4 9 10 13 16 15 TWOBIT 32X2 5 6 7 8 11 12 16 14 15 TWOBIT 33.ENDS FOURBIT 34 35*** POWER 36VCC 99 0 DC 3.3V 37 38*** ALL INPUTS 39VIN1A 1 0 DC 0 PULSE(0 3 0 5NS 5NS 20NS 50NS) 40VIN1B 2 0 DC 0 PULSE(0 3 0 5NS 5NS 30NS 100NS) 41VIN2A 3 0 DC 0 PULSE(0 3 0 5NS 5NS 50NS 200NS) 42VIN2B 4 0 DC 0 PULSE(0 3 0 5NS 5NS 90NS 400NS) 43VIN3A 5 0 DC 0 PULSE(0 3 0 5NS 5NS 170NS 800NS) 44VIN3B 6 0 DC 0 PULSE(0 3 0 5NS 5NS 330NS 1600NS) 45VIN4A 7 0 DC 0 PULSE(0 3 0 5NS 5NS 650NS 3200NS) 46VIN4B 8 0 DC 0 PULSE(0 3 0 5NS 5NS 1290NS 6400NS) 47 48*** DEFINE NOMINAL CIRCUIT 49X1 1 2 3 4 5 6 7 8 9 10 11 12 0 13 99 FOURBIT 50 51.option noinit acct 52.TRAN 500p 6400NS 53* save inputs 54.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) 55 56.control 57pre_set strict_errorhandling 58unset ngdebug 59*save outputs and specials 60save x1.x1.x1.7 V(9) V(10) V(11) V(12) V(13) 61run 62rusage 63* plot the inputs, use offset to plot on top of each other 64plot v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 65* plot the outputs, use offset to plot on top of each other 66plot v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16 67.endc 68 69.END 70