1 /**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
2
3 /**********
4 * Copyright 2001 Regents of the University of California. All rights reserved.
5 * File: b3pzld.c of BSIM3v3.2.4
6 * Author: 1995 Min-Chie Jeng and Mansun Chan.
7 * Author: 1997-1999 Weidong Liu.
8 * Author: 2001 Xuemei Xi
9 * Modified by Paolo Nenzi 2002
10 **********/
11
12 #include "ngspice/ngspice.h"
13 #include "ngspice/cktdefs.h"
14 #include "ngspice/complex.h"
15 #include "ngspice/sperror.h"
16 #include "bsim3v32def.h"
17 #include "ngspice/suffix.h"
18
19 int
BSIM3v32pzLoad(GENmodel * inModel,CKTcircuit * ckt,SPcomplex * s)20 BSIM3v32pzLoad (GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
21 {
22 BSIM3v32model *model = (BSIM3v32model*)inModel;
23 BSIM3v32instance *here;
24 double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
25 double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
26 double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
27 double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
28 double GSoverlapCap, GDoverlapCap, GBoverlapCap;
29 double dxpart, sxpart, xgtg, xgtd, xgts, xgtb;
30 double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0;
31 double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
32 double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
33 double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
34 double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
35 double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
36 double ScalingFactor = 1.0e-9;
37 double m;
38
39 for (; model != NULL; model = BSIM3v32nextModel(model))
40 { for (here = BSIM3v32instances(model); here!= NULL;
41 here = BSIM3v32nextInstance(here))
42 {
43 if (here->BSIM3v32mode >= 0)
44 { Gm = here->BSIM3v32gm;
45 Gmbs = here->BSIM3v32gmbs;
46 FwdSum = Gm + Gmbs;
47 RevSum = 0.0;
48
49 gbbdp = -here->BSIM3v32gbds;
50 gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
51
52 gbdpg = here->BSIM3v32gbgs;
53 gbdpdp = here->BSIM3v32gbds;
54 gbdpb = here->BSIM3v32gbbs;
55 gbdpsp = -(gbdpg + gbdpdp + gbdpb);
56
57 gbspg = 0.0;
58 gbspdp = 0.0;
59 gbspb = 0.0;
60 gbspsp = 0.0;
61
62 if (here->BSIM3v32nqsMod == 0)
63 { cggb = here->BSIM3v32cggb;
64 cgsb = here->BSIM3v32cgsb;
65 cgdb = here->BSIM3v32cgdb;
66
67 cbgb = here->BSIM3v32cbgb;
68 cbsb = here->BSIM3v32cbsb;
69 cbdb = here->BSIM3v32cbdb;
70
71 cdgb = here->BSIM3v32cdgb;
72 cdsb = here->BSIM3v32cdsb;
73 cddb = here->BSIM3v32cddb;
74
75 xgtg = xgtd = xgts = xgtb = 0.0;
76 sxpart = 0.6;
77 dxpart = 0.4;
78 ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
79 = ddxpart_dVs = 0.0;
80 dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
81 = dsxpart_dVs = 0.0;
82 }
83 else
84 { cggb = cgdb = cgsb = 0.0;
85 cbgb = cbdb = cbsb = 0.0;
86 cdgb = cddb = cdsb = 0.0;
87
88 xgtg = here->BSIM3v32gtg;
89 xgtd = here->BSIM3v32gtd;
90 xgts = here->BSIM3v32gts;
91 xgtb = here->BSIM3v32gtb;
92
93 xcqgb = here->BSIM3v32cqgb;
94 xcqdb = here->BSIM3v32cqdb;
95 xcqsb = here->BSIM3v32cqsb;
96 xcqbb = here->BSIM3v32cqbb;
97
98 CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
99 * here->pParam->BSIM3v32leffCV;
100 qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
101 if (fabs(qcheq) <= 1.0e-5 * CoxWL)
102 { if (model->BSIM3v32xpart < 0.5)
103 { dxpart = 0.4;
104 }
105 else if (model->BSIM3v32xpart > 0.5)
106 { dxpart = 0.0;
107 }
108 else
109 { dxpart = 0.5;
110 }
111 ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
112 = ddxpart_dVs = 0.0;
113 }
114 else
115 { dxpart = here->BSIM3v32qdrn / qcheq;
116 Cdd = here->BSIM3v32cddb;
117 Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
118 + here->BSIM3v32cbdb);
119 ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
120 Cdg = here->BSIM3v32cdgb;
121 Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
122 + here->BSIM3v32cbgb);
123 ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
124
125 Cds = here->BSIM3v32cdsb;
126 Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
127 + here->BSIM3v32cbsb);
128 ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
129
130 ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
131 + ddxpart_dVs);
132 }
133 sxpart = 1.0 - dxpart;
134 dsxpart_dVd = -ddxpart_dVd;
135 dsxpart_dVg = -ddxpart_dVg;
136 dsxpart_dVs = -ddxpart_dVs;
137 dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
138 }
139 }
140 else
141 { Gm = -here->BSIM3v32gm;
142 Gmbs = -here->BSIM3v32gmbs;
143 FwdSum = 0.0;
144 RevSum = -(Gm + Gmbs);
145
146 gbbsp = -here->BSIM3v32gbds;
147 gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
148
149 gbdpg = 0.0;
150 gbdpsp = 0.0;
151 gbdpb = 0.0;
152 gbdpdp = 0.0;
153
154 gbspg = here->BSIM3v32gbgs;
155 gbspsp = here->BSIM3v32gbds;
156 gbspb = here->BSIM3v32gbbs;
157 gbspdp = -(gbspg + gbspsp + gbspb);
158
159 if (here->BSIM3v32nqsMod == 0)
160 { cggb = here->BSIM3v32cggb;
161 cgsb = here->BSIM3v32cgdb;
162 cgdb = here->BSIM3v32cgsb;
163
164 cbgb = here->BSIM3v32cbgb;
165 cbsb = here->BSIM3v32cbdb;
166 cbdb = here->BSIM3v32cbsb;
167
168 cdgb = -(here->BSIM3v32cdgb + cggb + cbgb);
169 cdsb = -(here->BSIM3v32cddb + cgsb + cbsb);
170 cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
171
172 xgtg = xgtd = xgts = xgtb = 0.0;
173 sxpart = 0.4;
174 dxpart = 0.6;
175 ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
176 = ddxpart_dVs = 0.0;
177 dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
178 = dsxpart_dVs = 0.0;
179 }
180 else
181 { cggb = cgdb = cgsb = 0.0;
182 cbgb = cbdb = cbsb = 0.0;
183 cdgb = cddb = cdsb = 0.0;
184
185 xgtg = here->BSIM3v32gtg;
186 xgtd = here->BSIM3v32gts;
187 xgts = here->BSIM3v32gtd;
188 xgtb = here->BSIM3v32gtb;
189
190 xcqgb = here->BSIM3v32cqgb;
191 xcqdb = here->BSIM3v32cqsb;
192 xcqsb = here->BSIM3v32cqdb;
193 xcqbb = here->BSIM3v32cqbb;
194
195 CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
196 * here->pParam->BSIM3v32leffCV;
197 qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
198 if (fabs(qcheq) <= 1.0e-5 * CoxWL)
199 { if (model->BSIM3v32xpart < 0.5)
200 { sxpart = 0.4;
201 }
202 else if (model->BSIM3v32xpart > 0.5)
203 { sxpart = 0.0;
204 }
205 else
206 { sxpart = 0.5;
207 }
208 dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
209 = dsxpart_dVs = 0.0;
210 }
211 else
212 { sxpart = here->BSIM3v32qdrn / qcheq;
213 Css = here->BSIM3v32cddb;
214 Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
215 + here->BSIM3v32cbdb);
216 dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
217 Csg = here->BSIM3v32cdgb;
218 Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
219 + here->BSIM3v32cbgb);
220 dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
221
222 Csd = here->BSIM3v32cdsb;
223 Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
224 + here->BSIM3v32cbsb);
225 dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
226
227 dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
228 + dsxpart_dVs);
229 }
230 dxpart = 1.0 - sxpart;
231 ddxpart_dVd = -dsxpart_dVd;
232 ddxpart_dVg = -dsxpart_dVg;
233 ddxpart_dVs = -dsxpart_dVs;
234 ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
235 }
236 }
237
238
239 T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
240 gdpr = here->BSIM3v32drainConductance;
241 gspr = here->BSIM3v32sourceConductance;
242 gds = here->BSIM3v32gds;
243 gbd = here->BSIM3v32gbd;
244 gbs = here->BSIM3v32gbs;
245 capbd = here->BSIM3v32capbd;
246 capbs = here->BSIM3v32capbs;
247
248 GSoverlapCap = here->BSIM3v32cgso;
249 GDoverlapCap = here->BSIM3v32cgdo;
250 GBoverlapCap = here->pParam->BSIM3v32cgbo;
251
252 xcdgb = (cdgb - GDoverlapCap);
253 xcddb = (cddb + capbd + GDoverlapCap);
254 xcdsb = cdsb;
255 xcdbb = -(xcdgb + xcddb + xcdsb);
256 xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap);
257 xcsdb = -(cgdb + cbdb + cddb);
258 xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb));
259 xcsbb = -(xcsgb + xcsdb + xcssb);
260 xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap);
261 xcgdb = (cgdb - GDoverlapCap);
262 xcgsb = (cgsb - GSoverlapCap);
263 xcgbb = -(xcggb + xcgdb + xcgsb);
264 xcbgb = (cbgb - GBoverlapCap);
265 xcbdb = (cbdb - capbd);
266 xcbsb = (cbsb - capbs);
267 xcbbb = -(xcbgb + xcbdb + xcbsb);
268
269 m = here->BSIM3v32m;
270
271 *(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
272 *(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
273 *(here->BSIM3v32BbPtr ) += m * (xcbbb * s->real);
274 *(here->BSIM3v32BbPtr +1) += m * (xcbbb * s->imag);
275 *(here->BSIM3v32DPdpPtr ) += m * (xcddb * s->real);
276 *(here->BSIM3v32DPdpPtr +1) += m * (xcddb * s->imag);
277 *(here->BSIM3v32SPspPtr ) += m * (xcssb * s->real);
278 *(here->BSIM3v32SPspPtr +1) += m * (xcssb * s->imag);
279
280 *(here->BSIM3v32GbPtr ) += m * (xcgbb * s->real);
281 *(here->BSIM3v32GbPtr +1) += m * (xcgbb * s->imag);
282 *(here->BSIM3v32GdpPtr ) += m * (xcgdb * s->real);
283 *(here->BSIM3v32GdpPtr +1) += m * (xcgdb * s->imag);
284 *(here->BSIM3v32GspPtr ) += m * (xcgsb * s->real);
285 *(here->BSIM3v32GspPtr +1) += m * (xcgsb * s->imag);
286
287 *(here->BSIM3v32BgPtr ) += m * (xcbgb * s->real);
288 *(here->BSIM3v32BgPtr +1) += m * (xcbgb * s->imag);
289 *(here->BSIM3v32BdpPtr ) += m * (xcbdb * s->real);
290 *(here->BSIM3v32BdpPtr +1) += m * (xcbdb * s->imag);
291 *(here->BSIM3v32BspPtr ) += m * (xcbsb * s->real);
292 *(here->BSIM3v32BspPtr +1) += m * (xcbsb * s->imag);
293
294 *(here->BSIM3v32DPgPtr ) += m * (xcdgb * s->real);
295 *(here->BSIM3v32DPgPtr +1) += m * (xcdgb * s->imag);
296 *(here->BSIM3v32DPbPtr ) += m * (xcdbb * s->real);
297 *(here->BSIM3v32DPbPtr +1) += m * (xcdbb * s->imag);
298 *(here->BSIM3v32DPspPtr ) += m * (xcdsb * s->real);
299 *(here->BSIM3v32DPspPtr +1) += m * (xcdsb * s->imag);
300
301 *(here->BSIM3v32SPgPtr ) += m * (xcsgb * s->real);
302 *(here->BSIM3v32SPgPtr +1) += m * (xcsgb * s->imag);
303 *(here->BSIM3v32SPbPtr ) += m * (xcsbb * s->real);
304 *(here->BSIM3v32SPbPtr +1) += m * (xcsbb * s->imag);
305 *(here->BSIM3v32SPdpPtr ) += m * (xcsdb * s->real);
306 *(here->BSIM3v32SPdpPtr +1) += m * (xcsdb * s->imag);
307
308 *(here->BSIM3v32DdPtr) += m * gdpr;
309 *(here->BSIM3v32DdpPtr) -= m * gdpr;
310 *(here->BSIM3v32DPdPtr) -= m * gdpr;
311
312 *(here->BSIM3v32SsPtr) += m * gspr;
313 *(here->BSIM3v32SspPtr) -= m * gspr;
314 *(here->BSIM3v32SPsPtr) -= m * gspr;
315
316 *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
317 *(here->BSIM3v32BbPtr) += m * (gbd + gbs - here->BSIM3v32gbbs);
318 *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
319 *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
320
321 *(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
322 + T1 * ddxpart_dVg + gbdpg;
323 *(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
324 + dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
325 *(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
326 - T1 * ddxpart_dVs - gbdpsp;
327 *(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
328 - T1 * ddxpart_dVb - gbdpb;
329
330 *(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
331 - T1 * dsxpart_dVg - gbspg;
332 *(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
333 + sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
334 *(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
335 - T1 * dsxpart_dVb - gbspb;
336 *(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
337 - T1 * dsxpart_dVd - gbspdp;
338
339 *(here->BSIM3v32GgPtr) -= xgtg;
340 *(here->BSIM3v32GbPtr) -= xgtb;
341 *(here->BSIM3v32GdpPtr) -= xgtd;
342 *(here->BSIM3v32GspPtr) -= xgts;
343
344 if (here->BSIM3v32nqsMod)
345 { *(here->BSIM3v32QqPtr ) += m * (s->real * ScalingFactor);
346 *(here->BSIM3v32QqPtr +1) += m * (s->imag * ScalingFactor);
347 *(here->BSIM3v32QgPtr ) -= m * (xcqgb * s->real);
348 *(here->BSIM3v32QgPtr +1) -= m * (xcqgb * s->imag);
349 *(here->BSIM3v32QdpPtr ) -= m * (xcqdb * s->real);
350 *(here->BSIM3v32QdpPtr +1) -= m * (xcqdb * s->imag);
351 *(here->BSIM3v32QbPtr ) -= m * (xcqbb * s->real);
352 *(here->BSIM3v32QbPtr +1) -= m * (xcqbb * s->imag);
353 *(here->BSIM3v32QspPtr ) -= m * (xcqsb * s->real);
354 *(here->BSIM3v32QspPtr +1) -= m * (xcqsb * s->imag);
355
356 *(here->BSIM3v32GqPtr) -= m * (here->BSIM3v32gtau);
357 *(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau);
358 *(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau);
359
360 *(here->BSIM3v32QqPtr) += m * (here->BSIM3v32gtau);
361 *(here->BSIM3v32QgPtr) += m * xgtg;
362 *(here->BSIM3v32QdpPtr) += m * xgtd;
363 *(here->BSIM3v32QbPtr) += m * xgtb;
364 *(here->BSIM3v32QspPtr) += m * xgts;
365 }
366 }
367 }
368 return(OK);
369 }
370
371