1 /* 2 Parker-Skellern MESFET model, UCB Spice Glue Header 3 4 Copyright (C) 1994, 1995, 1996 Macquarie University 5 All Rights Reserved 6 Author: Anthony Parker 7 Creation Date: 2 Feb 1994 8 Modified: 24 Mar 1994: Parameters MVST and ETA added. 9 18 Apr 1994: Added new parameters and comments 10 12 Sep 1995: Changed _XXX to PS_XXX to aid portability 11 */ 12 13 14 #ifdef PSMODEL_C /* PSMODEL_C defined when included from "psmodel.c" */ 15 #include "ngspice/ngspice.h" 16 #include "jfet2defs.h" 17 #include "ngspice/const.h" 18 #endif 19 20 /* Glue definitions for cref modl and inst */ 21 typedef CKTcircuit cref; /* circuit specific variables */ 22 typedef JFET2model modl; /* model parameters for this type of device */ 23 typedef JFET2instance inst; /* parameters specific to this device instance */ 24 25 extern void PSinstanceinit(modl *,inst *); 26 extern double PSids(cref *,modl *,inst *,double,double, 27 double *,double *,double *,double *,double *,double *); 28 extern void PScharge(cref *,modl *,inst *,double,double,double *,double *); 29 extern void PSacload(cref *,modl *,inst *,double,double,double,double, 30 double *,double *,double *,double *); 31 32 #ifdef PSMODEL_C /* PSMODEL_C defined when included from "psmodel.c" */ 33 /* The following glue definitions need to be changed to suit the specific 34 simulator. */ 35 /* simulator mode flags 36 TRAN_ANAL should be true during transient analysis iteration. 37 (ie. false for other analysis functions and tran operating point.) 38 TRAN_INIT should be true only during the first calculation of the initial 39 transient analysis time point. It should be false for remaining 40 iterations at that time point and the rest of the transient analysis. 41 */ 42 #define TRAN_ANAL (ckt->CKTmode & MODETRAN) 43 #define TRAN_INIT (ckt->CKTmode & MODEINITTRAN) 44 45 /* state variables */ 46 /* initialized when TRAN_ANAL is false */ 47 #define VGSTRAP_BEFORE (*(ckt->CKTstate1 + here->JFET2vgstrap)) 48 #define VGSTRAP_NOW (*(ckt->CKTstate0 + here->JFET2vgstrap)) 49 #define VGDTRAP_BEFORE (*(ckt->CKTstate1 + here->JFET2vtrap)) 50 #define VGDTRAP_NOW (*(ckt->CKTstate0 + here->JFET2vtrap)) 51 #define POWR_BEFORE (*(ckt->CKTstate1 + here->JFET2pave)) 52 #define POWR_NOW (*(ckt->CKTstate0 + here->JFET2pave)) 53 54 /* initialized when TRAN_INIT is true or TRAN_ANAL is false */ 55 #define QGS_BEFORE (*(ckt->CKTstate1 + here->JFET2qgs)) 56 #define QGS_NOW (*(ckt->CKTstate0 + here->JFET2qgs)) 57 #define QGD_BEFORE (*(ckt->CKTstate1 + here->JFET2qgd)) 58 #define QGD_NOW (*(ckt->CKTstate0 + here->JFET2qgd)) 59 60 /* past terminal potentials used if TRAN_INIT is false and TRAN_ANAL is true */ 61 #define VGS1 (*(ckt->CKTstate1 + here->JFET2vgs)) 62 #define VGD1 (*(ckt->CKTstate1 + here->JFET2vgd)) 63 64 /* simulator specific parameters */ 65 #define GMIN ckt->CKTgmin /* SPICE gmin (1E12 ohms) */ 66 #define NVT here->JFET2temp*CONSTKoverQ*model->JFET2n /* nkT/q */ 67 #define STEP ckt->CKTdelta /* time step of this transient solution */ 68 #define FOURTH 0.25 /* eldo requires 2.5e-10 for units conversion */ 69 70 /* model parameters */ 71 /* dc model */ 72 #define BETA model->JFET2beta /* transconductance scaling */ 73 #define DELT model->JFET2delta /* thermal current reduction */ 74 #define IBD model->JFET2ibd /* breakdown current */ 75 #define IS here->JFET2tSatCur /* gate reverse saturation current */ 76 #define LAM model->JFET2lambda /* channel length modulation */ 77 #define LFGAM model->JFET2lfgam /* dc drain feedback */ 78 #define LFG1 model->JFET2lfg1 /* dc drain feedback vgs modulation */ 79 #define LFG2 model->JFET2lfg2 /* dc drain feedback vgd modulation */ 80 #define MVST model->JFET2mvst /* subthreshold vds modulation */ 81 #define MXI model->JFET2mxi /* saturation index vgs modulation */ 82 #define P model->JFET2p /* power law in controlled resistance */ 83 #define Q model->JFET2q /* power law in controlled current */ 84 #define VBD model->JFET2vbd /* breakdown exponential coef */ 85 #define VBI here->JFET2tGatePot /* junction built-in potential */ 86 #define VSUB model->JFET2vst /* subthreshold exponential coef */ 87 #define VTO model->JFET2vto /* pinch-off potential */ 88 #define XI model->JFET2xi /* saturation index */ 89 #define Z model->JFET2z /* saturation knee curvature */ 90 91 /* ac model */ 92 #define ACGAM model->JFET2acgam /* capacitance vds modulation */ 93 #define CGS here->JFET2tCGS /* zero bias cgs */ 94 #define CGD here->JFET2tCGD /* zero bias cgd */ 95 #define HFETA model->JFET2hfeta /* ac source feedback */ 96 #define HFE1 model->JFET2hfe1 /* ac source feedback vgd modulation */ 97 #define HFE2 model->JFET2hfe2 /* ac source feedback vgs modulation */ 98 #define HFGAM model->JFET2hfgam /* ac drain feedback */ 99 #define HFG1 model->JFET2hfg1 /* ac drain feedback vgs modulation */ 100 #define HFG2 model->JFET2hfg2 /* ac drain feedback vgd modulation */ 101 #define TAUD model->JFET2taud /* thermal time constant */ 102 #define TAUG model->JFET2taug /* dc ac feedback time constant */ 103 #define XC model->JFET2xc /* cgs reduction at pinch-off */ 104 105 /* device instance */ 106 #define AREA here->JFET2area /* area factor of fet */ 107 108 /* internally derived model parameters */ 109 #define ALPHA here->JFET2alpha /* cgs cgd reversal interval */ 110 #define D3 here->JFET2d3 /* dual power-law parameter */ 111 #define VMAX here->JFET2corDepCap /* forward capacitance potential */ 112 #define XI_WOO here->JFET2xiwoo /* saturation potential */ 113 #define ZA model->JFET2za /* saturation knee parameter */ 114 #endif 115