1# reg1 using nangate45 library
2VERSION 5.8 ;
3DIVIDERCHAR "/" ;
4BUSBITCHARS "[]" ;
5DESIGN top ;
6UNITS DISTANCE MICRONS 1000 ;
7DIEAREA ( 0 0 ) ( 1000 1000 ) ;
8COMPONENTS 5 ;
9    - r1 DFF_X1 ;
10    - r2 DFF_X1 ;
11    - r3 DFF_X1 ;
12    - u1 BUF_X1 ;
13    - u2 AND2_X1 ;
14END COMPONENTS
15PINS 8 ;
16    - in1 + NET in1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
17    - in2 + NET in2 + DIRECTION INPUT + USE SIGNAL + FIXED ( 333 1000 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
18    - clk1 + NET clk1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 1000 334 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
19    - clk2 + NET clk2 + DIRECTION INPUT + USE SIGNAL + FIXED ( 1000 999 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
20    - clk3 + NET clk3 + DIRECTION INPUT + USE SIGNAL + FIXED ( 332 1000 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
21    - out + NET out + DIRECTION OUTPUT + USE SIGNAL + FIXED ( 1000 335 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
22    - nc1 + NET nc1 + DIRECTION INPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
23    - nc2 + NET nc2 + DIRECTION OUTPUT + USE SIGNAL + FIXED ( 0 0 ) N + LAYER metal1 ( 0 0 ) ( 0 0 ) ;
24END PINS
25SPECIALNETS 2 ;
26    - VSS ( * VSS ) + USE GROUND ;
27    - VDD ( * VDD ) + USE POWER ;
28END SPECIALNETS
29NETS 10 ;
30    - in1 ( r1 D ) ( PIN in1 ) + USE SIGNAL ;
31    - in2 ( r2 D ) ( PIN in2 ) + USE SIGNAL ;
32    - clk1 ( r1 CK ) ( PIN clk1 ) + USE SIGNAL ;
33    - clk2 ( r2 CK ) ( PIN clk2 ) + USE SIGNAL ;
34    - clk3 ( r3 CK ) ( PIN clk3 ) + USE SIGNAL ;
35    - out ( r3 Q ) ( PIN out ) + USE SIGNAL ;
36    - r1q ( r1 Q ) ( u2 A1 ) + USE SIGNAL ;
37    - r2q ( r2 Q ) ( u1 A ) + USE SIGNAL ;
38    - u1z ( u1 Z ) ( u2 A2 ) + USE SIGNAL ;
39    - u2z ( u2 ZN ) ( r3 D ) + USE SIGNAL ;
40    - nc1 ( PIN nc1 ) + USE SIGNAL ;
41    - nc2 ( PIN nc2 ) + USE SIGNAL ;
42END NETS
43END DESIGN
44