|
Name |
|
Date |
Size |
#Lines |
LOC |
| .. | | 07-May-2022 | - |
| docs/ | H | 03-May-2022 | - | 4,373 | 3,279 |
| usrp1/ | H | 03-May-2022 | - | 28,093 | 21,074 |
| usrp2/ | H | 13-Sep-2020 | - | 1,595,884 | 1,568,253 |
| usrp3/ | H | 03-May-2022 | - | 1,168,320 | 953,546 |
| .gitignore | H A D | 03-May-2022 | 80 | 13 | 12 |
| CODING.md | H A D | 03-May-2022 | 7.5 KiB | 237 | 208 |
| CONTRIBUTING.md | H A D | 03-May-2022 | 380 | 9 | 6 |
| README.md | H A D | 03-May-2022 | 2.1 KiB | 58 | 40 |
README.md
1Ettus Research USRP FPGA HDL Source
2===================================
3
4Welcome to the USRP FPGA HDL source code tree! This repository contains
5free & open-source FPGA HDL for the Universal Software Radio Peripheral
6(USRP™) SDR platform, created and sold by Ettus Research. A large
7percentage of the source code is written in Verilog.
8
9## Product Generations
10
11This repository contains the FPGA source for the following generations of
12USRP devices.
13
14### Generation 1
15
16- Directory: __usrp1__
17- Devices: USRP Classic Only
18- Tools: Quartus from Altera
19- [Build Instructions](http://files.ettus.com/manual/md_usrp1_build_instructions.html)
20
21### Generation 2
22
23- Directory: __usrp2__
24- Devices: USRP N2X0, USRP B100, USRP E1X0, USRP2
25- Tools: ISE from Xilinx, GNU make
26- [Build Instructions](http://files.ettus.com/manual/md_usrp2_build_instructions.html)
27- [Customization Instructions](http://files.ettus.com/manual/md_usrp2_customize_signal_chain.html)
28
29### Generation 3
30
31- Directory: __usrp3__
32- Devices: USRP B2X0, USRP X Series, USRP E3X0, USRP N3xx
33- Tools: Vivado from Xilinx, ISE from Xilinx, GNU make
34- [Build Instructions](http://files.ettus.com/manual/md_usrp3_build_instructions.html)
35- [Simulation](http://files.ettus.com/manual/md_usrp3_simulation.html)
36
37
38## Pre-built FPGA Images
39
40Pre-built FPGA and Firmware images are not hosted here. Please visit the
41[FPGA and Firmware manual page](http://files.ettus.com/manual/page_images.html)
42for instructions on downloading and using pre-built images. In most cases, running the following
43command will do the right thing.
44
45 $ uhd_images_downloader
46
47## Building This Manual
48
49This FPGA manual is available on the web at http://files.ettus.com/manual/md_fpga.html for the most
50recent stable version of UHD. If you wish to read documentation for a custom/unstable branch you will
51need to build it and open it locally using a web browser. To do so please install
52[Doxygen](http://www.stack.nl/~dimitri/doxygen/download.html#srcbin) on your system and run the following commands:
53
54 $ cd docs
55 $ make
56 $ sensible-browser html/index.html
57
58