1//
2// Copyright 2012 Ettus Research LLC
3//
4// This program is free software: you can redistribute it and/or modify
5// it under the terms of the GNU General Public License as published by
6// the Free Software Foundation, either version 3 of the License, or
7// (at your option) any later version.
8//
9// This program is distributed in the hope that it will be useful,
10// but WITHOUT ANY WARRANTY; without even the implied warranty of
11// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12// GNU General Public License for more details.
13//
14// You should have received a copy of the GNU General Public License
15// along with this program.  If not, see <http://www.gnu.org/licenses/>.
16//
17
18//COPY ME, CUSTOMIZE ME...
19
20//The following module effects the IO of the DUC chain.
21//By default, this entire module is a simple pass-through.
22
23//To implement DSP logic before the DUC:
24//Implement custom DSP between baseband and duc input.
25
26//To implement DSP logic after the DUC:
27//Implement custom DSP between duc output and frontend.
28
29//To bypass the DUC with custom logic:
30//Implement custom DSP between baseband and frontend.
31
32module custom_dsp_tx
33#(
34    //frontend bus width
35    parameter WIDTH = 24
36)
37(
38    //control signals
39    input clock, //dsp clock
40    input reset, //active high synchronous reset
41    input clear, //active high on packet control init
42    input enable, //active high when streaming enabled
43
44    //user settings bus, controlled through user setting regs API
45    input set_stb, input [7:0] set_addr, input [31:0] set_data,
46
47    //full rate outputs directly to the TX frontend
48    output [WIDTH-1:0] frontend_i,
49    output [WIDTH-1:0] frontend_q,
50
51    //full rate outputs directly from the DUC chain
52    input [WIDTH-1:0] duc_out_i,
53    input [WIDTH-1:0] duc_out_q,
54
55    //strobed samples {I16,Q16} to the TX DUC chain
56    output [31:0] duc_in_sample,
57    input duc_in_strobe, //this is a backpressure signal
58    output duc_in_enable, //enables DUC module
59
60    //strobbed baseband samples {I16,Q16} to this module
61    input [31:0] bb_sample,
62    output bb_strobe //this is a backpressure signal
63);
64
65    assign frontend_i = duc_out_i;
66    assign frontend_q = duc_out_q;
67    assign duc_in_sample = bb_sample;
68    assign bb_strobe = duc_in_strobe;
69    assign duc_in_enable = enable;
70
71endmodule //custom_dsp_tx
72