1// 2// Copyright 2013 Ettus Research LLC 3// Copyright 2018 Ettus Research, a National Instruments Company 4// 5// SPDX-License-Identifier: LGPL-3.0-or-later 6// 7// Demonstration of two input, two output block 8 9module addsub 10 #(parameter WIDTH = 16) 11 (input clk, input reset, 12 input [WIDTH*2-1:0] i0_tdata, input i0_tlast, input i0_tvalid, output i0_tready, 13 input [WIDTH*2-1:0] i1_tdata, input i1_tlast, input i1_tvalid, output i1_tready, 14 output [WIDTH*2-1:0] sum_tdata, output sum_tlast, output sum_tvalid, input sum_tready, 15 output [WIDTH*2-1:0] diff_tdata, output diff_tlast, output diff_tvalid, input diff_tready); 16 17 wire [WIDTH*4-1:0] dummy; 18 wire [WIDTH*4-1:0] int_tdata; 19 wire int_tlast, int_tvalid, int_tready; 20 21 assign int_tvalid = i0_tvalid & i1_tvalid; 22 assign i0_tready = int_tvalid & int_tready; 23 assign i1_tready = int_tvalid & int_tready; 24 25 wire [WIDTH-1:0] sum_a = i0_tdata[WIDTH*2-1:WIDTH] + i1_tdata[WIDTH*2-1:WIDTH]; 26 wire [WIDTH-1:0] diff_a = i0_tdata[WIDTH*2-1:WIDTH] - i1_tdata[WIDTH*2-1:WIDTH]; 27 28 wire [WIDTH-1:0] sum_b = i0_tdata[WIDTH-1:0] + i1_tdata[WIDTH-1:0]; 29 wire [WIDTH-1:0] diff_b = i0_tdata[WIDTH-1:0] - i1_tdata[WIDTH-1:0]; 30 31 assign int_tdata = { sum_a,sum_b,diff_a,diff_b }; 32 assign int_tlast = i0_tlast; // Follow first input. 33 34 split_stream_fifo #(.WIDTH(4*WIDTH), .ACTIVE_MASK(4'b0011)) splitter 35 (.clk(clk), .reset(reset), .clear(1'b0), 36 .i_tdata(int_tdata), .i_tlast(int_tlast), .i_tvalid(int_tvalid), .i_tready(int_tready), 37 .o0_tdata({sum_tdata,dummy[WIDTH*2-1:0]}), .o0_tlast(sum_tlast), .o0_tvalid(sum_tvalid), .o0_tready(sum_tready), 38 .o1_tdata({dummy[WIDTH*4-1:WIDTH*2],diff_tdata}), .o1_tlast(diff_tlast), .o1_tvalid(diff_tvalid), .o1_tready(diff_tready), 39 .o2_tready(1'b1), .o3_tready(1'b1)); 40 41endmodule // addsub 42