1 /* Definitions of target machine for GNU compiler. NEC V850 series
2    Copyright (C) 1996-2018 Free Software Foundation, Inc.
3    Contributed by Jeff Law (law@cygnus.com).
4 
5    This file is part of GCC.
6 
7    GCC is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3, or (at your option)
10    any later version.
11 
12    GCC is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    Under Section 7 of GPL version 3, you are granted additional
18    permissions described in the GCC Runtime Library Exception, version
19    3.1, as published by the Free Software Foundation.
20 
21    You should have received a copy of the GNU General Public License and
22    a copy of the GCC Runtime Library Exception along with this program;
23    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
24    <http://www.gnu.org/licenses/>.  */
25 
26 #ifndef GCC_V850_H
27 #define GCC_V850_H
28 
29 extern GTY(()) rtx v850_compare_op0;
30 extern GTY(()) rtx v850_compare_op1;
31 
32 #undef LIB_SPEC
33 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}"
34 
35 #undef ENDFILE_SPEC
36 #undef LINK_SPEC
37 #undef STARTFILE_SPEC
38 #undef ASM_SPEC
39 
40 #define TARGET_CPU_generic 	1
41 #define TARGET_CPU_v850e   	2
42 #define TARGET_CPU_v850e1	3
43 #define TARGET_CPU_v850e2	4
44 #define TARGET_CPU_v850e2v3	5
45 #define TARGET_CPU_v850e3v5	6
46 
47 #ifndef TARGET_CPU_DEFAULT
48 #define TARGET_CPU_DEFAULT	TARGET_CPU_generic
49 #endif
50 
51 #define MASK_DEFAULT            MASK_V850
52 #define SUBTARGET_ASM_SPEC 	"%{!mv*:-mv850}"
53 #define SUBTARGET_CPP_SPEC 	"%{!mv*:-D__v850__}"
54 
55 /* Choose which processor will be the default.
56    We must pass a -mv850xx option to the assembler if no explicit -mv* option
57    is given, because the assembler's processor default may not be correct.  */
58 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
59 #undef  MASK_DEFAULT
60 #define MASK_DEFAULT            MASK_V850E
61 #undef  SUBTARGET_ASM_SPEC
62 #define SUBTARGET_ASM_SPEC 	"%{!mv*:-mv850e}"
63 #undef  SUBTARGET_CPP_SPEC
64 #define SUBTARGET_CPP_SPEC 	"%{!mv*:-D__v850e__}"
65 #endif
66 
67 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
68 #undef  MASK_DEFAULT
69 #define MASK_DEFAULT            MASK_V850E     /* No practical difference.  */
70 #undef  SUBTARGET_ASM_SPEC
71 #define SUBTARGET_ASM_SPEC	"%{!mv*:-mv850e1}"
72 #undef  SUBTARGET_CPP_SPEC
73 #define SUBTARGET_CPP_SPEC	"%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
74 #endif
75 
76 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2
77 #undef  MASK_DEFAULT
78 #define MASK_DEFAULT            MASK_V850E2
79 #undef  SUBTARGET_ASM_SPEC
80 #define SUBTARGET_ASM_SPEC 	"%{!mv*:-mv850e2}"
81 #undef  SUBTARGET_CPP_SPEC
82 #define SUBTARGET_CPP_SPEC 	"%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}"
83 #endif
84 
85 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3
86 #undef  MASK_DEFAULT
87 #define MASK_DEFAULT            MASK_V850E2V3
88 #undef  SUBTARGET_ASM_SPEC
89 #define SUBTARGET_ASM_SPEC	"%{!mv*:-mv850e2v3}"
90 #undef  SUBTARGET_CPP_SPEC
91 #define SUBTARGET_CPP_SPEC	"%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}"
92 #endif
93 
94 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e3v5
95 #undef  MASK_DEFAULT
96 #define MASK_DEFAULT            MASK_V850E3V5
97 #undef  SUBTARGET_ASM_SPEC
98 #define SUBTARGET_ASM_SPEC	"%{!mv*:-mv850e3v5}"
99 #undef  SUBTARGET_CPP_SPEC
100 #define SUBTARGET_CPP_SPEC	"%{!mv*:-D__v850e3v5__} %{mv850e3v5:-D__v850e3v5__}"
101 #undef  TARGET_VERSION
102 #define TARGET_VERSION		fprintf (stderr, " (Renesas V850E3V5)");
103 #endif
104 
105 #define TARGET_V850E3V5_UP ((TARGET_V850E3V5))
106 #define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP)
107 #define TARGET_V850E2_UP   ((TARGET_V850E2)   || TARGET_V850E2V3_UP)
108 #define TARGET_V850E_UP    ((TARGET_V850E)    || TARGET_V850E2_UP)
109 #define TARGET_ALL         ((TARGET_V850)     || TARGET_V850E_UP)
110 
111 #define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \
112 %{mrelax:-mrelax} \
113 %{m8byte-align:-m8byte-align} \
114 %{msoft-float:-msoft-float} \
115 %{mhard-float:-mhard-float} \
116 %{mgcc-abi:-mgcc-abi}"
117 
118 #define LINK_SPEC "%{mgcc-abi:-m v850}"
119 
120 #define CPP_SPEC "\
121   %{mv850e3v5:-D__v850e3v5__} \
122   %{mv850e2v3:-D__v850e2v3__} \
123   %{mv850e2:-D__v850e2__} \
124   %{mv850es:-D__v850e1__} \
125   %{mv850e1:-D__v850e1__} \
126   %{mv850e:-D__v850e__} \
127   %{mv850:-D__v850__} \
128   %(subtarget_cpp_spec) \
129   %{mep:-D__EP__}"
130 
131 #define EXTRA_SPECS \
132  { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
133  { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
134 
135 
136 /* Macro to decide when FPU instructions can be used.  */
137 #define TARGET_USE_FPU  (TARGET_V850E2V3_UP && ! TARGET_SOFT_FLOAT)
138 
139 #define TARGET_CPU_CPP_BUILTINS()		\
140   do						\
141     {						\
142       builtin_define( "__v851__" );		\
143       builtin_define( "__v850" );		\
144       builtin_define( "__v850__" );		\
145       builtin_assert( "machine=v850" );		\
146       builtin_assert( "cpu=v850" );		\
147       if (TARGET_EP)				\
148 	builtin_define ("__EP__");		\
149       if (TARGET_GCC_ABI)			\
150 	builtin_define ("__V850_GCC_ABI__");	\
151       else					\
152 	builtin_define ("__V850_RH850_ABI__");	\
153       if (! TARGET_DISABLE_CALLT)		\
154 	builtin_define ("__V850_CALLT__");	\
155       if (TARGET_8BYTE_ALIGN)			\
156 	builtin_define ("__V850_8BYTE_ALIGN__");\
157       builtin_define (TARGET_USE_FPU ?		\
158 		      "__FPU_OK__" : "__NO_FPU__");\
159     }						\
160   while(0)
161 
162 #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5)
163 
164 /* Target machine storage layout */
165 
166 /* Define this if most significant bit is lowest numbered
167    in instructions that operate on numbered bit-fields.
168    This is not true on the NEC V850.  */
169 #define BITS_BIG_ENDIAN 0
170 
171 /* Define this if most significant byte of a word is the lowest numbered.  */
172 /* This is not true on the NEC V850.  */
173 #define BYTES_BIG_ENDIAN 0
174 
175 /* Define this if most significant word of a multiword number is lowest
176    numbered.
177    This is not true on the NEC V850.  */
178 #define WORDS_BIG_ENDIAN 0
179 
180 /* Width of a word, in units (bytes).  */
181 #define UNITS_PER_WORD		4
182 
183 /* Define this macro if it is advisable to hold scalars in registers
184    in a wider mode than that declared by the program.  In such cases,
185    the value is constrained to be within the bounds of the declared
186    type, but kept valid in the wider mode.  The signedness of the
187    extension may differ from that of the type.
188 
189    Some simple experiments have shown that leaving UNSIGNEDP alone
190    generates the best overall code.  */
191 
192 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
193   if (GET_MODE_CLASS (MODE) == MODE_INT \
194       && GET_MODE_SIZE (MODE) < 4)      \
195     { (MODE) = SImode; }
196 
197 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
198 #define PARM_BOUNDARY		32
199 
200 /* The stack goes in 32-bit lumps.  */
201 #define STACK_BOUNDARY 		BIGGEST_ALIGNMENT
202 
203 /* Allocation boundary (in *bits*) for the code of a function.
204    16 is the minimum boundary; 32 would give better performance.  */
205 #define FUNCTION_BOUNDARY 	(((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32)
206 
207 /* No data type wants to be aligned rounder than this.  */
208 #define BIGGEST_ALIGNMENT	(TARGET_8BYTE_ALIGN ? 64 : 32)
209 
210 /* Alignment of field after `int : 0' in a structure.  */
211 #define EMPTY_FIELD_BOUNDARY 32
212 
213 /* No structure field wants to be aligned rounder than this.  */
214 #define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT
215 
216 /* Define this if move instructions will actually fail to work
217    when given unaligned data.  */
218 #define STRICT_ALIGNMENT  (!TARGET_NO_STRICT_ALIGN)
219 
220 /* Define this as 1 if `char' should by default be signed; else as 0.
221 
222    On the NEC V850, loads do sign extension, so make this default.  */
223 #define DEFAULT_SIGNED_CHAR 1
224 
225 #undef  SIZE_TYPE
226 #define SIZE_TYPE "unsigned int"
227 
228 #undef  PTRDIFF_TYPE
229 #define PTRDIFF_TYPE "int"
230 
231 #undef  WCHAR_TYPE
232 #define WCHAR_TYPE "long int"
233 
234 #undef  WCHAR_TYPE_SIZE
235 #define WCHAR_TYPE_SIZE BITS_PER_WORD
236 
237 /* Standard register usage.  */
238 
239 /* Number of actual hardware registers.
240    The hardware registers are assigned numbers for the compiler
241    from 0 to just below FIRST_PSEUDO_REGISTER.
242 
243    All registers that the compiler knows about must be given numbers,
244    even those that are not normally considered general registers.  */
245 
246 #define FIRST_PSEUDO_REGISTER 36
247 
248 /* 1 for registers that have pervasive standard uses
249    and are not available for the register allocator.  */
250 
251 #define FIXED_REGISTERS \
252   { 1, 1, 1, 1, 1, 1, 0, 0, \
253     0, 0, 0, 0, 0, 0, 0, 0, \
254     0, 0, 0, 0, 0, 0, 0, 0, \
255     0, 0, 0, 0, 0, 0, 1, 0, \
256     1, 1,	\
257     1, 1}
258 
259 /* 1 for registers not available across function calls.
260    These must include the FIXED_REGISTERS and also any
261    registers that can be used without being saved.
262    The latter must include the registers where values are returned
263    and the register where structure-value addresses are passed.
264    Aside from that, you can include as many other registers as you
265    like.  */
266 
267 #define CALL_USED_REGISTERS \
268   { 1, 1, 1, 1, 1, 1, 1, 1, \
269     1, 1, 1, 1, 1, 1, 1, 1, \
270     1, 1, 1, 1, 0, 0, 0, 0, \
271     0, 0, 0, 0, 0, 0, 1, 1, \
272     1, 1,	\
273     1, 1}
274 
275 /* List the order in which to allocate registers.  Each register must be
276    listed once, even those in FIXED_REGISTERS.
277 
278    On the 850, we make the return registers first, then all of the volatile
279    registers, then the saved registers in reverse order to better save the
280    registers with an out of line function, and finally the fixed
281    registers.  */
282 
283 #define REG_ALLOC_ORDER							\
284 {									\
285   10, 11,				/* return registers */		\
286   12, 13, 14, 15, 16, 17, 18, 19,	/* scratch registers */		\
287    6,  7,  8,  9, 31,			/* argument registers */	\
288   29, 28, 27, 26, 25, 24, 23, 22,	/* saved registers */		\
289   21, 20,  2,								\
290    0,  1,  3,  4,  5, 30, 32, 33,      /* fixed registers */           \
291   34, 35								\
292 }
293 
294 
295 /* Define the classes of registers for register constraints in the
296    machine description.  Also define ranges of constants.
297 
298    One of the classes must always be named ALL_REGS and include all hard regs.
299    If there is more than one class, another class must be named NO_REGS
300    and contain no registers.
301 
302    The name GENERAL_REGS must be the name of a class (or an alias for
303    another name such as ALL_REGS).  This is the class of registers
304    that is allowed by "g" or "r" in a register constraint.
305    Also, registers outside this class are allocated only when
306    instructions express preferences for them.
307 
308    The classes must be numbered in nondecreasing order; that is,
309    a larger-numbered class must never be contained completely
310    in a smaller-numbered class.
311 
312    For any two classes, it is very desirable that there be another
313    class that represents their union.  */
314 
315 enum reg_class
316 {
317   NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
318 };
319 
320 #define N_REG_CLASSES (int) LIM_REG_CLASSES
321 
322 /* Give names of register classes as strings for dump file.  */
323 
324 #define REG_CLASS_NAMES \
325 { "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
326 
327 /* Define which registers fit in which classes.
328    This is an initializer for a vector of HARD_REG_SET
329    of length N_REG_CLASSES.  */
330 
331 #define REG_CLASS_CONTENTS                     \
332 {                                              \
333   { 0x00000000,0x0 }, /* NO_REGS      */       \
334   { 0x55555554,0x0 }, /* EVEN_REGS */          \
335   { 0xfffffffe,0x0 }, /* GENERAL_REGS */       \
336   { 0xffffffff,0x0 }, /* ALL_REGS      */      \
337 }
338 
339 /* The same information, inverted:
340    Return the class number of the smallest class containing
341    reg number REGNO.  This could be a conditional expression
342    or could index an array.  */
343 
344 #define REGNO_REG_CLASS(REGNO)  ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS)
345 
346 /* The class value for index registers, and the one for base regs.  */
347 
348 #define INDEX_REG_CLASS NO_REGS
349 #define BASE_REG_CLASS  GENERAL_REGS
350 
351 /* Macros to check register numbers against specific register classes.  */
352 
353 /* These assume that REGNO is a hard or pseudo reg number.
354    They give nonzero only if REGNO is a hard reg of the suitable class
355    or a pseudo reg currently allocated to a suitable hard reg.
356    Since they use reg_renumber, they are safe only once reg_renumber
357    has been allocated, which happens in reginfo.c during register
358    allocation.  */
359 
360 #define REGNO_OK_FOR_BASE_P(regno)             \
361   (((regno) < FIRST_PSEUDO_REGISTER            \
362     && (regno) != CC_REGNUM                    \
363     && (regno) != FCC_REGNUM)                  \
364    || reg_renumber[regno] >= 0)
365 
366 #define REGNO_OK_FOR_INDEX_P(regno) 0
367 
368 /* Convenience wrappers around insn_const_int_ok_for_constraint.  */
369 
370 #define CONST_OK_FOR_I(VALUE) \
371   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I)
372 #define CONST_OK_FOR_J(VALUE) \
373   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J)
374 #define CONST_OK_FOR_K(VALUE) \
375   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K)
376 #define CONST_OK_FOR_L(VALUE) \
377   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L)
378 #define CONST_OK_FOR_M(VALUE) \
379   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M)
380 #define CONST_OK_FOR_N(VALUE) \
381   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N)
382 #define CONST_OK_FOR_O(VALUE) \
383   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
384 #define CONST_OK_FOR_W(VALUE) \
385   insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W)
386 
387 /* Stack layout; function entry, exit and calling.  */
388 
389 /* Define this if pushing a word on the stack
390    makes the stack pointer a smaller address.  */
391 
392 #define STACK_GROWS_DOWNWARD 1
393 
394 /* Define this to nonzero if the nominal address of the stack frame
395    is at the high-address end of the local variables;
396    that is, each additional local variable allocated
397    goes at a more negative offset in the frame.  */
398 
399 #define FRAME_GROWS_DOWNWARD 1
400 
401 /* Offset of first parameter from the argument pointer register value.  */
402 /* Is equal to the size of the saved fp + pc, even if an fp isn't
403    saved since the value is used before we know.  */
404 
405 #define FIRST_PARM_OFFSET(FNDECL) 0
406 
407 /* Specify the registers used for certain standard purposes.
408    The values of these macros are register numbers.  */
409 
410 /* Register to use for pushing function arguments.  */
411 #define STACK_POINTER_REGNUM SP_REGNUM
412 
413 /* Base register for access to local variables of the function.  */
414 #define FRAME_POINTER_REGNUM 34
415 
416 /* Register containing return address from latest function call.  */
417 #define LINK_POINTER_REGNUM LP_REGNUM
418 
419 /* On some machines the offset between the frame pointer and starting
420    offset of the automatic variables is not known until after register
421    allocation has been done (for example, because the saved registers
422    are between these two locations).  On those machines, define
423    `FRAME_POINTER_REGNUM' the number of a special, fixed register to
424    be used internally until the offset is known, and define
425    `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number
426    used for the frame pointer.
427 
428    You should define this macro only in the very rare circumstances
429    when it is not possible to calculate the offset between the frame
430    pointer and the automatic variables until after register
431    allocation has been completed.  When this macro is defined, you
432    must also indicate in your definition of `ELIMINABLE_REGS' how to
433    eliminate `FRAME_POINTER_REGNUM' into either
434    `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
435 
436    Do not define this macro if it would be the same as
437    `FRAME_POINTER_REGNUM'.  */
438 #undef  HARD_FRAME_POINTER_REGNUM
439 #define HARD_FRAME_POINTER_REGNUM 29
440 
441 /* Base register for access to arguments of the function.  */
442 #define ARG_POINTER_REGNUM 35
443 
444 /* Register in which static-chain is passed to a function.  */
445 #define STATIC_CHAIN_REGNUM 20
446 
447 /* If defined, this macro specifies a table of register pairs used to
448    eliminate unneeded registers that point into the stack frame.  If
449    it is not defined, the only elimination attempted by the compiler
450    is to replace references to the frame pointer with references to
451    the stack pointer.
452 
453    The definition of this macro is a list of structure
454    initializations, each of which specifies an original and
455    replacement register.
456 
457    On some machines, the position of the argument pointer is not
458    known until the compilation is completed.  In such a case, a
459    separate hard register must be used for the argument pointer.
460    This register can be eliminated by replacing it with either the
461    frame pointer or the argument pointer, depending on whether or not
462    the frame pointer has been eliminated.
463 
464    In this case, you might specify:
465         #define ELIMINABLE_REGS  \
466         {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
467          {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
468          {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
469 
470    Note that the elimination of the argument pointer with the stack
471    pointer is specified first since that is the preferred elimination.  */
472 
473 #define ELIMINABLE_REGS							\
474 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },			\
475  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },			\
476  { ARG_POINTER_REGNUM,	 STACK_POINTER_REGNUM },			\
477  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM }}			\
478 
479 /* This macro returns the initial difference between the specified pair
480    of registers.  */
481 
482 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)			\
483 {									\
484   if ((FROM) == FRAME_POINTER_REGNUM)					\
485     (OFFSET) = get_frame_size () + crtl->outgoing_args_size;	\
486   else if ((FROM) == ARG_POINTER_REGNUM)				\
487    (OFFSET) = compute_frame_size (get_frame_size (), (long *)0);	\
488   else									\
489     gcc_unreachable ();							\
490 }
491 
492 /* Keep the stack pointer constant throughout the function.  */
493 #define ACCUMULATE_OUTGOING_ARGS 1
494 
495 #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
496 
497 /* Define a data type for recording info about an argument list
498    during the scan of that argument list.  This data type should
499    hold all necessary information about the function itself
500    and about the args processed so far, enough to enable macros
501    such as FUNCTION_ARG to determine where the next arg should go.  */
502 
503 #define CUMULATIVE_ARGS struct cum_arg
504 struct cum_arg { int nbytes; };
505 
506 /* Initialize a variable CUM of type CUMULATIVE_ARGS
507    for a call to a function whose data type is FNTYPE.
508    For a library call, FNTYPE is 0.  */
509 
510 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
511   do { (CUM).nbytes = 0; } while (0)
512 
513 /* When a parameter is passed in a register, stack space is still
514    allocated for it.  */
515 #define REG_PARM_STACK_SPACE(DECL) 0
516 
517 /* 1 if N is a possible register number for function argument passing.  */
518 
519 #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)
520 
521 #define DEFAULT_PCC_STRUCT_RETURN 0
522 
523 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
524    the stack pointer does not matter.  The value is tested only in
525    functions that have frame pointers.
526    No definition is equivalent to always zero.  */
527 
528 #define EXIT_IGNORE_STACK 1
529 
530 /* Define this macro as a C expression that is nonzero for registers
531    used by the epilogue or the `return' pattern.  */
532 
533 #define EPILOGUE_USES(REGNO) \
534   (reload_completed && (REGNO) == LINK_POINTER_REGNUM)
535 
536 /* Output assembler code to FILE to increment profiler label # LABELNO
537    for profiling a function entry.  */
538 
539 #define FUNCTION_PROFILER(FILE, LABELNO) ;
540 
541 /* Length in units of the trampoline for entering a nested function.  */
542 
543 #define TRAMPOLINE_SIZE 24
544 
545 /* Addressing modes, and classification of registers for them.  */
546 
547 
548 /* 1 if X is an rtx for a constant that is a valid address.  */
549 
550 /* ??? This seems too exclusive.  May get better code by accepting more
551    possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs.  */
552 
553 #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K)
554 
555 /* Maximum number of registers that can appear in a valid memory address.  */
556 
557 #define MAX_REGS_PER_ADDRESS 1
558 
559 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
560    return the mode to be used for the comparison.
561 
562    For floating-point equality comparisons, CCFPEQmode should be used.
563    VOIDmode should be used in all other cases.
564 
565    For integer comparisons against zero, reduce to CCNOmode or CCZmode if
566    possible, to allow for more combinations.  */
567 
568 #define SELECT_CC_MODE(OP, X, Y)       v850_select_cc_mode (OP, X, Y)
569 
570 /* Tell final.c how to eliminate redundant test instructions.  */
571 
572 /* Here we define machine-dependent flags and fields in cc_status
573    (see `conditions.h').  No extra ones are needed for the VAX.  */
574 
575 /* Store in cc_status the expressions
576    that the condition codes will describe
577    after execution of an instruction whose pattern is EXP.
578    Do not alter them if the instruction would not alter the cc's.  */
579 
580 #define CC_OVERFLOW_UNUSABLE 0x200
581 #define CC_NO_CARRY CC_NO_OVERFLOW
582 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
583 
584 /* Nonzero if access to memory by bytes or half words is no faster
585    than accessing full words.  */
586 #define SLOW_BYTE_ACCESS 1
587 
588 /* According expr.c, a value of around 6 should minimize code size, and
589    for the V850 series, that's our primary concern.  */
590 #define MOVE_RATIO(speed) 6
591 
592 /* Indirect calls are expensive, never turn a direct call
593    into an indirect call.  */
594 #define NO_FUNCTION_CSE 1
595 
596 /* The four different data regions on the v850.  */
597 typedef enum
598 {
599   DATA_AREA_NORMAL,
600   DATA_AREA_SDA,
601   DATA_AREA_TDA,
602   DATA_AREA_ZDA
603 } v850_data_area;
604 
605 #define TEXT_SECTION_ASM_OP  "\t.section .text"
606 #define DATA_SECTION_ASM_OP  "\t.section .data"
607 #define BSS_SECTION_ASM_OP   "\t.section .bss"
608 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
609 #define SBSS_SECTION_ASM_OP  "\t.section .sbss,\"aw\""
610 
611 #define SCOMMON_ASM_OP 	       "\t.scomm\t"
612 #define ZCOMMON_ASM_OP 	       "\t.zcomm\t"
613 #define TCOMMON_ASM_OP 	       "\t.tcomm\t"
614 
615 #define ASM_COMMENT_START "#"
616 
617 /* Output to assembler file text saying following lines
618    may contain character constants, extra white space, comments, etc.  */
619 
620 #define ASM_APP_ON "#APP\n"
621 
622 /* Output to assembler file text saying following lines
623    no longer contain unusual constructs.  */
624 
625 #define ASM_APP_OFF "#NO_APP\n"
626 
627 #undef  USER_LABEL_PREFIX
628 #define USER_LABEL_PREFIX "_"
629 
630 /* This says how to output the assembler to define a global
631    uninitialized but not common symbol.  */
632 
633 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
634   asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
635 
636 #undef  ASM_OUTPUT_ALIGNED_BSS
637 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
638   v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
639 
640 /* This says how to output the assembler to define a global
641    uninitialized, common symbol.  */
642 #undef  ASM_OUTPUT_ALIGNED_COMMON
643 #undef  ASM_OUTPUT_COMMON
644 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
645      v850_output_common (FILE, DECL, NAME, SIZE, ALIGN)
646 
647 /* This says how to output the assembler to define a local
648    uninitialized symbol.  */
649 #undef  ASM_OUTPUT_ALIGNED_LOCAL
650 #undef  ASM_OUTPUT_LOCAL
651 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
652      v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
653 
654 /* Globalizing directive for a label.  */
655 #define GLOBAL_ASM_OP "\t.global "
656 
657 #define ASM_PN_FORMAT "%s___%lu"
658 
659 /* This is how we tell the assembler that two symbols have the same value.  */
660 
661 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
662   do { assemble_name(FILE, NAME1); 	 \
663        fputs(" = ", FILE);		 \
664        assemble_name(FILE, NAME2);	 \
665        fputc('\n', FILE); } while (0)
666 
667 
668 /* How to refer to registers in assembler output.
669    This sequence is indexed by compiler's hard-register-number (see above).  */
670 
671 #define REGISTER_NAMES                                         \
672 {  "r0",  "r1",  "r2",  "sp",  "gp",  "r5",  "r6" , "r7",      \
673    "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15",      \
674   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",      \
675   "r24", "r25", "r26", "r27", "r28", "r29",  "ep", "r31",      \
676   "psw", "fcc",      \
677   ".fp", ".ap"}
678 
679 /* Register numbers */
680 
681 #define ADDITIONAL_REGISTER_NAMES              \
682 { { "zero",    ZERO_REGNUM },                  \
683   { "hp",      2 },                            \
684   { "r3",      3 },                            \
685   { "r4",      4 },                            \
686   { "tp",      5 },                            \
687   { "fp",      29 },                           \
688   { "r30",     30 },                           \
689   { "lp",      LP_REGNUM} }
690 
691 /* This is how to output an element of a case-vector that is absolute.  */
692 
693 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
694   fprintf (FILE, "\t%s .L%d\n",					\
695 	   (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE)
696 
697 /* This is how to output an element of a case-vector that is relative.  */
698 
699 /* Disable the shift, which is for the currently disabled "switch"
700    opcode.  Se casesi in v850.md.  */
701 
702 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) 		\
703   fprintf (FILE, "\t%s %s.L%d-.L%d%s\n",				\
704 	   (TARGET_BIG_SWITCH ? ".long" : ".short"),			\
705 	   (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? "(" : ""),             \
706 	   VALUE, REL,							\
707 	   (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? ")>>1" : ""))
708 
709 #define ASM_OUTPUT_ALIGN(FILE, LOG)	\
710   if ((LOG) != 0)			\
711     fprintf (FILE, "\t.align %d\n", (LOG))
712 
713 /* We don't have to worry about dbx compatibility for the v850.  */
714 #define DEFAULT_GDB_EXTENSIONS 1
715 
716 /* Use dwarf2 debugging info by default.  */
717 #undef  PREFERRED_DEBUGGING_TYPE
718 #define PREFERRED_DEBUGGING_TYPE   DWARF2_DEBUG
719 
720 #define DWARF2_FRAME_INFO          1
721 #define DWARF2_UNWIND_INFO         0
722 #define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, LINK_POINTER_REGNUM)
723 #define DWARF_FRAME_RETURN_COLUMN  DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM)
724 
725 #ifndef ASM_GENERATE_INTERNAL_LABEL
726 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
727   sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM))
728 #endif
729 
730 /* Specify the machine mode that this machine uses
731    for the index in the tablejump instruction.  */
732 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
733 
734 /* Define as C expression which evaluates to nonzero if the tablejump
735    instruction expects the table to contain offsets from the address of the
736    table.
737    Do not define this if the table should contain absolute addresses.  */
738 #define CASE_VECTOR_PC_RELATIVE 1
739 
740 /* The switch instruction requires that the jump table immediately follow
741    it.  */
742 #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION)
743 
744 #undef ASM_OUTPUT_BEFORE_CASE_LABEL
745 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
746   ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1))
747 
748 #define WORD_REGISTER_OPERATIONS 1
749 
750 /* Byte and short loads sign extend the value to a word.  */
751 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
752 
753 /* Max number of bytes we can move from memory to memory
754    in one reasonably fast instruction.  */
755 #define MOVE_MAX	4
756 
757 /* Define if shifts truncate the shift count
758    which implies one can omit a sign-extension or zero-extension
759    of a shift count.  */
760 #define SHIFT_COUNT_TRUNCATED 1
761 
762 /* Specify the machine mode that pointers have.
763    After generation of rtl, the compiler makes no further distinction
764    between pointers and any other objects of this machine mode.  */
765 #define Pmode SImode
766 
767 /* A function address in a call instruction
768    is a byte address (for indexing purposes)
769    so give the MEM rtx a byte's mode.  */
770 #define FUNCTION_MODE QImode
771 
772 /* Tell compiler we want to support GHS pragmas */
773 #define REGISTER_TARGET_PRAGMAS() do {				\
774   c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt);	\
775   c_register_pragma ("ghs", "section",   ghs_pragma_section);	\
776   c_register_pragma ("ghs", "starttda",  ghs_pragma_starttda);	\
777   c_register_pragma ("ghs", "startsda",  ghs_pragma_startsda);	\
778   c_register_pragma ("ghs", "startzda",  ghs_pragma_startzda);	\
779   c_register_pragma ("ghs", "endtda",    ghs_pragma_endtda);	\
780   c_register_pragma ("ghs", "endsda",    ghs_pragma_endsda);	\
781   c_register_pragma ("ghs", "endzda",    ghs_pragma_endzda);	\
782 } while (0)
783 
784 /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that
785    can appear in the "ghs section" pragma.  These names are used to index
786    into the GHS_default_section_names[] and GHS_current_section_names[]
787    that are defined in v850.c, and so the ordering of each must remain
788    consistent.
789 
790    These arrays give the default and current names for each kind of
791    section defined by the GHS pragmas.  The current names can be changed
792    by the "ghs section" pragma.  If the current names are null, use
793    the default names.  Note that the two arrays have different types.
794 
795    For the *normal* section kinds (like .data, .text, etc.) we do not
796    want to explicitly force the name of these sections, but would rather
797    let the linker (or at least the back end) choose the name of the
798    section, UNLESS the user has forced a specific name for these section
799    kinds.  To accomplish this set the name in ghs_default_section_names
800    to null.  */
801 
802 enum GHS_section_kind
803 {
804   GHS_SECTION_KIND_DEFAULT,
805 
806   GHS_SECTION_KIND_TEXT,
807   GHS_SECTION_KIND_DATA,
808   GHS_SECTION_KIND_RODATA,
809   GHS_SECTION_KIND_BSS,
810   GHS_SECTION_KIND_SDATA,
811   GHS_SECTION_KIND_ROSDATA,
812   GHS_SECTION_KIND_TDATA,
813   GHS_SECTION_KIND_ZDATA,
814   GHS_SECTION_KIND_ROZDATA,
815 
816   COUNT_OF_GHS_SECTION_KINDS  /* must be last */
817 };
818 
819 /* The following code is for handling pragmas supported by the
820    v850 compiler produced by Green Hills Software.  This is at
821    the specific request of a customer.  */
822 
823 typedef struct data_area_stack_element
824 {
825   struct data_area_stack_element * prev;
826   v850_data_area                   data_area; /* Current default data area.  */
827 } data_area_stack_element;
828 
829 /* Track the current data area set by the
830    data area pragma (which can be nested).  */
831 extern data_area_stack_element * data_area_stack;
832 
833 /* Names of the various data areas used on the v850.  */
834 extern const char * GHS_default_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
835 extern const char * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_KINDS];
836 
837 /* The assembler op to start the file.  */
838 
839 #define FILE_ASM_OP "\t.file\n"
840 
841 /* Implement ZDA, TDA, and SDA */
842 
843 #define EP_REGNUM 30	/* ep register number */
844 
845 #define SYMBOL_FLAG_ZDA		(SYMBOL_FLAG_MACH_DEP << 0)
846 #define SYMBOL_FLAG_TDA		(SYMBOL_FLAG_MACH_DEP << 1)
847 #define SYMBOL_FLAG_SDA		(SYMBOL_FLAG_MACH_DEP << 2)
848 #define SYMBOL_REF_ZDA_P(X)	((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0)
849 #define SYMBOL_REF_TDA_P(X)	((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0)
850 #define SYMBOL_REF_SDA_P(X)	((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0)
851 
852 #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections
853 
854 /* Define this so that the cc1plus will not think that system header files
855    need an implicit 'extern "C" { ... }' assumed.  This breaks testing C++
856    in a build directory where the libstdc++ header files are found via a
857    -isystem <path-to-build-dir>.  */
858 #define NO_IMPLICIT_EXTERN_C
859 
860 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
861   ((LENGTH) = v850_adjust_insn_length ((INSN), (LENGTH)))
862 
863 #endif /* ! GCC_V850_H */
864