1 /* 2 * Copyright 2010-2016 Intel Corporation. 3 * 4 * This library is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU Lesser General Public License as published 6 * by the Free Software Foundation, version 2.1. 7 * 8 * This library is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * Lesser General Public License for more details. 12 * 13 * Disclaimer: The codes contained in these modules may be specific 14 * to the Intel Software Development Platform codenamed Knights Ferry, 15 * and the Intel product codenamed Knights Corner, and are not backward 16 * compatible with other Intel products. Additionally, Intel will NOT 17 * support the codes or instruction set in future products. 18 * 19 * Intel offers no warranty of any kind regarding the code. This code is 20 * licensed on an "AS IS" basis and Intel is not obligated to provide 21 * any support, assistance, installation, training, or other services 22 * of any kind. Intel is also not obligated to provide any updates, 23 * enhancements or extensions. Intel specifically disclaims any warranty 24 * of merchantability, non-infringement, fitness for any particular 25 * purpose, and any other warranty. 26 * 27 * Further, Intel disclaims all liability of any kind, including but 28 * not limited to liability for infringement of any proprietary rights, 29 * relating to the use of the code, even if Intel is notified of the 30 * possibility of such liability. Except as expressly stated in an Intel 31 * license agreement provided with this code and agreed upon with Intel, 32 * no license, express or implied, by estoppel or otherwise, to any 33 * intellectual property rights is granted herein. 34 */ 35 36 #ifndef _COISYSINFO_COMMON_H 37 #define _COISYSINFO_COMMON_H 38 39 /** @ingroup COISysInfo 40 * @addtogroup COISysInfoCommon 41 @{ 42 * @file common/COISysInfo_common.h 43 * This interface allows developers to query the platform for system level 44 * information. */ 45 46 #ifndef DOXYGEN_SHOULD_SKIP_THIS 47 #include "../common/COITypes_common.h" 48 #include <assert.h> 49 #include <string.h> 50 51 #ifdef __cplusplus 52 extern "C" { 53 #endif 54 #endif // DOXYGEN_SHOULD_SKIP_THIS 55 56 #define INITIAL_APIC_ID_BITS 0xFF000000 // EBX[31:24] unique APIC ID 57 58 /////////////////////////////////////////////////////////////////////////////// 59 /// \fn uint32_t COISysGetAPICID(void) 60 /// @return The Advanced Programmable Interrupt Controller (APIC) ID of 61 /// the hardware thread on which the caller is running. 62 /// 63 /// @warning APIC IDs are unique to each hardware thread within a processor, 64 /// but may not be sequential. 65 COIACCESSAPI 66 uint32_t COISysGetAPICID(void); 67 68 /////////////////////////////////////////////////////////////////////////////// 69 /// 70 /// @return The number of cores exposed by the processor on which the caller is 71 /// running. Returns 0 if there is an error loading the processor info. 72 COIACCESSAPI 73 uint32_t COISysGetCoreCount(void); 74 75 /////////////////////////////////////////////////////////////////////////////// 76 /// 77 /// @return The number of hardware threads exposed by the processor on which 78 /// the caller is running. Returns 0 if there is an error loading processor 79 /// info. 80 COIACCESSAPI 81 uint32_t COISysGetHardwareThreadCount(void); 82 83 /////////////////////////////////////////////////////////////////////////////// 84 /// 85 /// @return The index of the hardware thread on which the caller is running. 86 /// 87 /// The indexes of neighboring hardware threads will differ by a value of one 88 /// and are within the range zero through COISysGetHardwareThreadCount()-1. 89 /// Returns ((uint32_t)-1) if there was an error loading processor info. 90 COIACCESSAPI 91 uint32_t COISysGetHardwareThreadIndex(void); 92 93 /////////////////////////////////////////////////////////////////////////////// 94 /// 95 /// @return The index of the core on which the caller is running. 96 /// 97 /// The indexes of neighboring cores will differ by a value of one and are 98 /// within the range zero through COISysGetCoreCount()-1. Returns ((uint32_t)-1) 99 /// if there was an error loading processor info. 100 COIACCESSAPI 101 uint32_t COISysGetCoreIndex(void); 102 103 /////////////////////////////////////////////////////////////////////////////// 104 /// 105 /// @return The number of level 2 caches within the processor on which the 106 /// caller is running. Returns ((uint32_t)-1) if there was an error loading 107 /// processor info. 108 COIACCESSAPI 109 uint32_t COISysGetL2CacheCount(void); 110 111 /////////////////////////////////////////////////////////////////////////////// 112 /// 113 /// @return The index of the level 2 cache on which the caller is running. 114 /// Returns ((uint32_t)-1) if there was an error loading processor info. 115 /// 116 /// The indexes of neighboring cores will differ by a value of one and are 117 /// within the range zero through COISysGetL2CacheCount()-1. 118 COIACCESSAPI 119 uint32_t COISysGetL2CacheIndex(void); 120 121 #ifdef __cplusplus 122 } /* extern "C" */ 123 #endif 124 /*! @} */ 125 126 #endif /* _COISYSINFO_COMMON_H */ 127