1; Options for the FR-V port of the compiler.
2
3; Copyright (C) 2005-2014 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15; for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/frv/frv-opts.h
23
24; Value of -mcpu=.
25Variable
26frv_cpu_t frv_cpu_type = CPU_TYPE
27
28macc-4
29Target Report RejectNegative Mask(ACC_4)
30Use 4 media accumulators
31
32macc-8
33Target Report RejectNegative InverseMask(ACC_4, ACC_8)
34Use 8 media accumulators
35
36malign-labels
37Target Report Mask(ALIGN_LABELS)
38Enable label alignment optimizations
39
40malloc-cc
41Target Report RejectNegative Mask(ALLOC_CC)
42Dynamically allocate cc registers
43
44; We used to default the branch cost to 2, but it was changed it to 1 to avoid
45; generating SCC instructions and or/and-ing them together, and then doing the
46; branch on the result, which collectively generate much worse code.
47mbranch-cost=
48Target RejectNegative Joined UInteger Var(frv_branch_cost_int) Init(1)
49Set the cost of branches
50
51mcond-exec
52Target Report Mask(COND_EXEC)
53Enable conditional execution other than moves/scc
54
55mcond-exec-insns=
56Target RejectNegative Joined UInteger Var(frv_condexec_insns) Init(8)
57Change the maximum length of conditionally-executed sequences
58
59mcond-exec-temps=
60Target RejectNegative Joined UInteger Var(frv_condexec_temps) Init(4)
61Change the number of temporary registers that are available to conditionally-executed sequences
62
63mcond-move
64Target Report Mask(COND_MOVE)
65Enable conditional moves
66
67mcpu=
68Target RejectNegative Joined Enum(frv_cpu) Var(frv_cpu_type)
69Set the target CPU type
70
71Enum
72Name(frv_cpu) Type(frv_cpu_t)
73Known FR-V CPUs (for use with the -mcpu= option):
74
75EnumValue
76Enum(frv_cpu) String(simple) Value(FRV_CPU_SIMPLE)
77
78EnumValue
79Enum(frv_cpu) String(tomcat) Value(FRV_CPU_TOMCAT)
80
81EnumValue
82Enum(frv_cpu) String(fr550) Value(FRV_CPU_FR550)
83
84EnumValue
85Enum(frv_cpu) String(fr500) Value(FRV_CPU_FR500)
86
87EnumValue
88Enum(frv_cpu) String(fr450) Value(FRV_CPU_FR450)
89
90EnumValue
91Enum(frv_cpu) String(fr405) Value(FRV_CPU_FR405)
92
93EnumValue
94Enum(frv_cpu) String(fr400) Value(FRV_CPU_FR400)
95
96EnumValue
97Enum(frv_cpu) String(fr300) Value(FRV_CPU_FR300)
98
99EnumValue
100Enum(frv_cpu) String(frv) Value(FRV_CPU_GENERIC)
101
102mdebug
103Target Undocumented Var(TARGET_DEBUG)
104
105mdebug-arg
106Target Undocumented Var(TARGET_DEBUG_ARG)
107
108mdebug-addr
109Target Undocumented Var(TARGET_DEBUG_ADDR)
110
111mdebug-cond-exec
112Target Undocumented Var(TARGET_DEBUG_COND_EXEC)
113
114mdebug-loc
115Target Undocumented Var(TARGET_DEBUG_LOC)
116
117mdebug-stack
118Target Undocumented Var(TARGET_DEBUG_STACK)
119
120mdouble
121Target Report Mask(DOUBLE)
122Use fp double instructions
123
124mdword
125Target Report Mask(DWORD)
126Change the ABI to allow double word insns
127
128mfdpic
129Target Report Mask(FDPIC)
130Enable Function Descriptor PIC mode
131
132mfixed-cc
133Target Report RejectNegative InverseMask(ALLOC_CC, FIXED_CC)
134Just use icc0/fcc0
135
136mfpr-32
137Target Report RejectNegative Mask(FPR_32)
138Only use 32 FPRs
139
140mfpr-64
141Target Report RejectNegative InverseMask(FPR_32, FPR_64)
142Use 64 FPRs
143
144mgpr-32
145Target Report RejectNegative Mask(GPR_32)
146Only use 32 GPRs
147
148mgpr-64
149Target Report RejectNegative InverseMask(GPR_32, GPR_64)
150Use 64 GPRs
151
152mgprel-ro
153Target Report Mask(GPREL_RO)
154Enable use of GPREL for read-only data in FDPIC
155
156mhard-float
157Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
158Use hardware floating point
159
160minline-plt
161Target Report Mask(INLINE_PLT)
162Enable inlining of PLT in function calls
163
164mlibrary-pic
165Target Report Mask(LIBPIC)
166Enable PIC support for building libraries
167
168mlinked-fp
169Target Report Mask(LINKED_FP)
170Follow the EABI linkage requirements
171
172mlong-calls
173Target Report Mask(LONG_CALLS)
174Disallow direct calls to global functions
175
176mmedia
177Target Report Mask(MEDIA)
178Use media instructions
179
180mmuladd
181Target Report Mask(MULADD)
182Use multiply add/subtract instructions
183
184mmulti-cond-exec
185Target Report Mask(MULTI_CE)
186Enable optimizing &&/|| in conditional execution
187
188mnested-cond-exec
189Target Report Mask(NESTED_CE)
190Enable nested conditional execution optimizations
191
192; Not used by the compiler proper.
193mno-eflags
194Target RejectNegative
195Do not mark ABI switches in e_flags
196
197moptimize-membar
198Target Report Mask(OPTIMIZE_MEMBAR)
199Remove redundant membars
200
201mpack
202Target Report Mask(PACK)
203Pack VLIW instructions
204
205mscc
206Target Report Mask(SCC)
207Enable setting GPRs to the result of comparisons
208
209msched-lookahead=
210Target RejectNegative Joined UInteger Var(frv_sched_lookahead) Init(4)
211Change the amount of scheduler lookahead
212
213msoft-float
214Target Report RejectNegative Mask(SOFT_FLOAT)
215Use software floating point
216
217mTLS
218Target Report RejectNegative Mask(BIG_TLS)
219Assume a large TLS segment
220
221mtls
222Target Report RejectNegative InverseMask(BIG_TLS)
223Do not assume a large TLS segment
224
225; Not used by the compiler proper.
226mtomcat-stats
227Target
228Cause gas to print tomcat statistics
229
230; Not used by the compiler proper.
231multilib-library-pic
232Target RejectNegative
233Link with the library-pic libraries
234
235mvliw-branch
236Target Report Mask(VLIW_BRANCH)
237Allow branches to be packed with other instructions
238