1		ifndef	__reg4414inc
2__reg4414inc	equ	1
3                save
4                listing off   ; kein Listing ueber diesen File
5
6;****************************************************************************
7;*                                                                          *
8;*   AS 1.42 - File REG4414.INC                                             *
9;*                                                                          *
10;*   Contains Bit & Register Definitions for AT90S4414                      *
11;*                                                                          *
12;****************************************************************************
13
14;----------------------------------------------------------------------------
15; Memory Limits
16
17E2END		equ	255
18RAMSTART	equ	0x60,data
19RAMEND		equ	0x15f,data
20FLASHEND	label	0xfff
21
22;----------------------------------------------------------------------------
23; Chip Configuration
24
25MCUCR		port	0x35		; MCU General Control Register
26SM		avrbit	MCUCR,4		; Choose Idle/Power Down Mode
27SE		avrbit	MCUCR,5		; Enable Sleep Mode
28SRW		avrbit	MCUCR,6		; Wait State Selection External SRAM
29SRE		avrbit	MCUCR,7		; Enable External SRAM
30
31;----------------------------------------------------------------------------
32; EEPROM
33
34		include	"ee90.inc"
35
36EEMWE		avrbit	EECR, 2		; EEPROM Master Write Enable
37
38;----------------------------------------------------------------------------
39; GPIO
40
41PINA		port	0x19		; Port A @ 0x19 (IO) ff.
42PINB		port	0x16		; Port B @ 0x16 (IO) ff.
43PINC		port	0x13		; Port C @ 0x13 (IO) ff.
44PIND		port	0x10		; Port D @ 0x10 (IO) ff.
45
46;----------------------------------------------------------------------------
47; Interrupt Vectors
48
49		enumconf 1,code
50		enum	 INT0_vect=1		; External Interrupt Request 0
51		nextenum INT1_vect		; External Interrupt Request 1
52		nextenum TIMER1_CAPT_vect	; Timer/Counter 1 Capture Event
53		nextenum TIMER1_COMPA_vect	; Timer/Counter 1 Compare Match A
54		nextenum TIMER1_COMPB_vect	; Timer/Counter 1 Compare Match B
55		nextenum TIMER1_OVF_vect	; Timer/Counter 1 Overflow
56		nextenum TIMER0_OVF_vect	; Timer/Counter 0 Overflow
57		nextenum SPI_STC_vect		; SPI Serial Transfer Complete
58		nextenum UART_RX_vect		; UART Rx Complete
59		nextenum UART_UDRE_vect		; UART Data Register Empty
60		nextenum UART_TX_vect		; UART Tx Complete
61		nextenum ANA_COMP_vect		; Analog Comparator
62
63;----------------------------------------------------------------------------
64; External Interrupts
65
66ISC00		avrbit	MCUCR,0		; External Interrupt 0 Sense Control
67ISC01		avrbit	MCUCR,1
68ISC10		avrbit	MCUCR,2		; External Interrupt 1 Sense Control
69ISC11		avrbit	MCUCR,3
70
71GIMSK		port	0x3b		; General Interrupt Mask Register
72INT0		avrbit	GIMSK,6		; Enable External Interrupt 0
73INT1		avrbit	GIMSK,7		; Enable External Interrupt 1
74
75GIFR		port	0x3a		; External Interrupt-Flags
76INTF0		avrbit	GIFR,6		; External Interrupt 0 Occured
77INTF1		avrbit	GIFR,7		; External Interrupt 1 Occured
78
79;----------------------------------------------------------------------------
80; Timers
81
82TCCR0		port	0x33		; Timer/Counter 0 Control Register
83CS00		avrbit	TCCR0,0		; Timer/Counter 0 Clock Select
84CS01		avrbit	TCCR0,1
85CS02		avrbit	TCCR0,2
86TCNT0		port	0x32		; Timer/Counter 0 Value
87
88TCCR1A		port	0x2f		; Timer/Counter 1 Control Register A
89PWM10		avrbit	TCCR1A,0	; Mode of Pulse Width Modulator
90PWM11		avrbit	TCCR1A,1
91COM1B0		avrbit	TCCR1A,4	; Timer/Counter 1 Compare Mode B
92COM1B1		avrbit	TCCR1A,5
93COM1A0		avrbit	TCCR1A,6	; Timer/Counter 1 Compare Mode A
94COM1A1		avrbit	TCCR1A,7
95TCCR1B		port	0x2e		; Timer/Counter 1 Control Register B
96CS10		avrbit	TCCR1B,0	; Timer/Counter 1 Clock Select
97CS11		avrbit	TCCR1B,1
98CS12		avrbit	TCCR1B,2
99CTC1		avrbit	TCCR1B,3	; Clear after Equality?
100ICES1		avrbit	TCCR1B,6	; Capture Slope Selection
101ICNC1		avrbit	TCCR1B,7	; Capture Noise Filter
102TCNT1L		port	0x2c		; Timer/Counter 1 Value LSB
103TCNT1H		port	0x2d		; Timer/Counter 1 Value MSB
104OCR1AL		port	0x2a		; Timer/Counter 1 Output Compare Value A LSB
105OCR1AH		port	0x2b		; Timer/Counter 1 Output Compare Value A MSB
106OCR1BL		port	0x28		; Timer/Counter 1 Output Compare Value B LSB
107OCR1BH		port	0x29		; Timer/Counter 1 Output Compare Value B MSB
108ICR1L		port	0x24		; Timer/Counter 1 Input Capture Value LSB
109ICR1H		port	0x25		; Timer/Counter 1 Input Capture Value MSB
110
111TIMSK		port	0x39		; Timer Interrupt Mask Register
112TOIE0		avrbit	TIMSK,1		; Timer/Counter 0 Overflow Interrupt Enable
113TICIE1		avrbit	TIMSK,3		; Timer/Counter 1 Input Capture Interrupt Enable
114OCIE1B		avrbit	TIMSK,5		; Timer/Counter 1 Output Compare Interrupt Enable B
115OCIE1A		avrbit	TIMSK,6		; Timer/Counter 1 Output Compare Interrupt Enable A
116TOIE1		avrbit	TIMSK,7		; Timer/Counter 1 Overflow Interrupt Enable
117
118TIFR		port	0x38		; Timer Interrupt Flag Register
119
120;----------------------------------------------------------------------------
121; Watchdog Timer
122
123		include	"wdm21.inc"
124WDTOE		avrbit	WDTCR,4		; Turn-Off Enable
125
126;----------------------------------------------------------------------------
127; UART
128
129		include	"uart90.inc"
130
131;----------------------------------------------------------------------------
132; SPI
133
134		include	"spi90.inc"
135
136;----------------------------------------------------------------------------
137; Analog Comparator
138
139		include "ac90.inc"
140
141		restore
142
143		endif			; __reg4414inc
144