1 /* AArch64 Non-NEON ACLE intrinsics include file.
2
3 Copyright (C) 2014-2020 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 Under Section 7 of GPL version 3, you are granted additional
19 permissions described in the GCC Runtime Library Exception, version
20 3.1, as published by the Free Software Foundation.
21
22 You should have received a copy of the GNU General Public License and
23 a copy of the GCC Runtime Library Exception along with this program;
24 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
25 <http://www.gnu.org/licenses/>. */
26
27 #ifndef _GCC_ARM_ACLE_H
28 #define _GCC_ARM_ACLE_H
29
30 #include <stdint.h>
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 #pragma GCC push_options
37 #pragma GCC target ("arch=armv8.3-a")
38 __extension__ static __inline int32_t __attribute__ ((__always_inline__))
__jcvt(double __a)39 __jcvt (double __a)
40 {
41 return __builtin_aarch64_jcvtzs (__a);
42 }
43
44 #pragma GCC pop_options
45
46 #pragma GCC push_options
47 #pragma GCC target ("arch=armv8.5-a")
48 __extension__ static __inline float __attribute__ ((__always_inline__))
__rint32zf(float __a)49 __rint32zf (float __a)
50 {
51 return __builtin_aarch64_frint32zsf (__a);
52 }
53
54 __extension__ static __inline double __attribute__ ((__always_inline__))
__rint32z(double __a)55 __rint32z (double __a)
56 {
57 return __builtin_aarch64_frint32zdf (__a);
58 }
59
60 __extension__ static __inline float __attribute__ ((__always_inline__))
__rint64zf(float __a)61 __rint64zf (float __a)
62 {
63 return __builtin_aarch64_frint64zsf (__a);
64 }
65
66 __extension__ static __inline double __attribute__ ((__always_inline__))
__rint64z(double __a)67 __rint64z (double __a)
68 {
69 return __builtin_aarch64_frint64zdf (__a);
70 }
71
72 __extension__ static __inline float __attribute__ ((__always_inline__))
__rint32xf(float __a)73 __rint32xf (float __a)
74 {
75 return __builtin_aarch64_frint32xsf (__a);
76 }
77
78 __extension__ static __inline double __attribute__ ((__always_inline__))
__rint32x(double __a)79 __rint32x (double __a)
80 {
81 return __builtin_aarch64_frint32xdf (__a);
82 }
83
84 __extension__ static __inline float __attribute__ ((__always_inline__))
__rint64xf(float __a)85 __rint64xf (float __a)
86 {
87 return __builtin_aarch64_frint64xsf (__a);
88 }
89
90 __extension__ static __inline double __attribute__ ((__always_inline__))
__rint64x(double __a)91 __rint64x (double __a)
92 {
93 return __builtin_aarch64_frint64xdf (__a);
94 }
95
96
97 #pragma GCC pop_options
98
99 #pragma GCC push_options
100
101 #pragma GCC target ("+nothing+crc")
102
103 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32b(uint32_t __a,uint8_t __b)104 __crc32b (uint32_t __a, uint8_t __b)
105 {
106 return __builtin_aarch64_crc32b (__a, __b);
107 }
108
109 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32cb(uint32_t __a,uint8_t __b)110 __crc32cb (uint32_t __a, uint8_t __b)
111 {
112 return __builtin_aarch64_crc32cb (__a, __b);
113 }
114
115 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32ch(uint32_t __a,uint16_t __b)116 __crc32ch (uint32_t __a, uint16_t __b)
117 {
118 return __builtin_aarch64_crc32ch (__a, __b);
119 }
120
121 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32cw(uint32_t __a,uint32_t __b)122 __crc32cw (uint32_t __a, uint32_t __b)
123 {
124 return __builtin_aarch64_crc32cw (__a, __b);
125 }
126
127 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32cd(uint32_t __a,uint64_t __b)128 __crc32cd (uint32_t __a, uint64_t __b)
129 {
130 return __builtin_aarch64_crc32cx (__a, __b);
131 }
132
133 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32h(uint32_t __a,uint16_t __b)134 __crc32h (uint32_t __a, uint16_t __b)
135 {
136 return __builtin_aarch64_crc32h (__a, __b);
137 }
138
139 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32w(uint32_t __a,uint32_t __b)140 __crc32w (uint32_t __a, uint32_t __b)
141 {
142 return __builtin_aarch64_crc32w (__a, __b);
143 }
144
145 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
__crc32d(uint32_t __a,uint64_t __b)146 __crc32d (uint32_t __a, uint64_t __b)
147 {
148 return __builtin_aarch64_crc32x (__a, __b);
149 }
150
151 #pragma GCC pop_options
152
153 #ifdef __ARM_FEATURE_TME
154 #pragma GCC push_options
155 #pragma GCC target ("+nothing+tme")
156
157 #define _TMFAILURE_REASON 0x00007fffu
158 #define _TMFAILURE_RTRY 0x00008000u
159 #define _TMFAILURE_CNCL 0x00010000u
160 #define _TMFAILURE_MEM 0x00020000u
161 #define _TMFAILURE_IMP 0x00040000u
162 #define _TMFAILURE_ERR 0x00080000u
163 #define _TMFAILURE_SIZE 0x00100000u
164 #define _TMFAILURE_NEST 0x00200000u
165 #define _TMFAILURE_DBG 0x00400000u
166 #define _TMFAILURE_INT 0x00800000u
167 #define _TMFAILURE_TRIVIAL 0x01000000u
168
169 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
__tstart(void)170 __tstart (void)
171 {
172 return __builtin_aarch64_tstart ();
173 }
174
175 __extension__ static __inline void __attribute__ ((__always_inline__))
__tcommit(void)176 __tcommit (void)
177 {
178 __builtin_aarch64_tcommit ();
179 }
180
181 __extension__ static __inline void __attribute__ ((__always_inline__))
__tcancel(const uint64_t __reason)182 __tcancel (const uint64_t __reason)
183 {
184 __builtin_aarch64_tcancel (__reason);
185 }
186
187 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
__ttest(void)188 __ttest (void)
189 {
190 return __builtin_aarch64_ttest ();
191 }
192
193 #pragma GCC pop_options
194 #endif
195
196 #pragma GCC push_options
197 #pragma GCC target ("+nothing+rng")
198 __extension__ static __inline int __attribute__ ((__always_inline__))
__rndr(uint64_t * __res)199 __rndr (uint64_t *__res)
200 {
201 return __builtin_aarch64_rndr (__res);
202 }
203
204 __extension__ static __inline int __attribute__ ((__always_inline__))
__rndrrs(uint64_t * __res)205 __rndrrs (uint64_t *__res)
206 {
207 return __builtin_aarch64_rndrrs (__res);
208 }
209
210 #pragma GCC pop_options
211
212 #pragma GCC push_options
213 #pragma GCC target ("arch=armv8.5-a+memtag")
214
215 #define __arm_mte_create_random_tag(__ptr, __u64_mask) \
216 __builtin_aarch64_memtag_irg(__ptr, __u64_mask)
217
218 #define __arm_mte_exclude_tag(__ptr, __u64_excluded) \
219 __builtin_aarch64_memtag_gmi(__ptr, __u64_excluded)
220
221 #define __arm_mte_ptrdiff(__ptr_a, __ptr_b) \
222 __builtin_aarch64_memtag_subp(__ptr_a, __ptr_b)
223
224 #define __arm_mte_increment_tag(__ptr, __u_offset) \
225 __builtin_aarch64_memtag_inc_tag(__ptr, __u_offset)
226
227 #define __arm_mte_set_tag(__tagged_address) \
228 __builtin_aarch64_memtag_set_tag(__tagged_address)
229
230 #define __arm_mte_get_tag(__address) \
231 __builtin_aarch64_memtag_get_tag(__address)
232
233 #pragma GCC pop_options
234
235 #ifdef __cplusplus
236 }
237 #endif
238
239 #endif
240