1 /* PREFIX_EVEX_0F10 */ 2 { 3 { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE }, 4 { VEX_W_TABLE (EVEX_W_0F10_P_1) }, 5 { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE }, 6 { VEX_W_TABLE (EVEX_W_0F10_P_3) }, 7 }, 8 /* PREFIX_EVEX_0F11 */ 9 { 10 { "vmovupX", { EXxS, XM }, PREFIX_OPCODE }, 11 { VEX_W_TABLE (EVEX_W_0F11_P_1) }, 12 { "vmovupX", { EXxS, XM }, PREFIX_OPCODE }, 13 { VEX_W_TABLE (EVEX_W_0F11_P_3) }, 14 }, 15 /* PREFIX_EVEX_0F12 */ 16 { 17 { MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) }, 18 { VEX_W_TABLE (EVEX_W_0F12_P_1) }, 19 { MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) }, 20 { VEX_W_TABLE (EVEX_W_0F12_P_3) }, 21 }, 22 /* PREFIX_EVEX_0F16 */ 23 { 24 { MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) }, 25 { VEX_W_TABLE (EVEX_W_0F16_P_1) }, 26 { MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) }, 27 }, 28 /* PREFIX_EVEX_0F2A */ 29 { 30 { Bad_Opcode }, 31 { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 32 { Bad_Opcode }, 33 { VEX_W_TABLE (EVEX_W_0F2A_P_3) }, 34 }, 35 /* PREFIX_EVEX_0F51 */ 36 { 37 { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE }, 38 { VEX_W_TABLE (EVEX_W_0F51_P_1) }, 39 { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE }, 40 { VEX_W_TABLE (EVEX_W_0F51_P_3) }, 41 }, 42 /* PREFIX_EVEX_0F58 */ 43 { 44 { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 45 { VEX_W_TABLE (EVEX_W_0F58_P_1) }, 46 { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 47 { VEX_W_TABLE (EVEX_W_0F58_P_3) }, 48 }, 49 /* PREFIX_EVEX_0F59 */ 50 { 51 { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 52 { VEX_W_TABLE (EVEX_W_0F59_P_1) }, 53 { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 54 { VEX_W_TABLE (EVEX_W_0F59_P_3) }, 55 }, 56 /* PREFIX_EVEX_0F5A */ 57 { 58 { VEX_W_TABLE (EVEX_W_0F5A_P_0) }, 59 { VEX_W_TABLE (EVEX_W_0F5A_P_1) }, 60 { VEX_W_TABLE (EVEX_W_0F5A_P_2) }, 61 { VEX_W_TABLE (EVEX_W_0F5A_P_3) }, 62 }, 63 /* PREFIX_EVEX_0F5B */ 64 { 65 { VEX_W_TABLE (EVEX_W_0F5B_P_0) }, 66 { VEX_W_TABLE (EVEX_W_0F5B_P_1) }, 67 { VEX_W_TABLE (EVEX_W_0F5B_P_2) }, 68 }, 69 /* PREFIX_EVEX_0F5C */ 70 { 71 { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 72 { VEX_W_TABLE (EVEX_W_0F5C_P_1) }, 73 { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 74 { VEX_W_TABLE (EVEX_W_0F5C_P_3) }, 75 }, 76 /* PREFIX_EVEX_0F5D */ 77 { 78 { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE }, 79 { VEX_W_TABLE (EVEX_W_0F5D_P_1) }, 80 { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE }, 81 { VEX_W_TABLE (EVEX_W_0F5D_P_3) }, 82 }, 83 /* PREFIX_EVEX_0F5E */ 84 { 85 { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 86 { VEX_W_TABLE (EVEX_W_0F5E_P_1) }, 87 { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE }, 88 { VEX_W_TABLE (EVEX_W_0F5E_P_3) }, 89 }, 90 /* PREFIX_EVEX_0F5F */ 91 { 92 { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE }, 93 { VEX_W_TABLE (EVEX_W_0F5F_P_1) }, 94 { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE }, 95 { VEX_W_TABLE (EVEX_W_0F5F_P_3) }, 96 }, 97 /* PREFIX_EVEX_0F6F */ 98 { 99 { Bad_Opcode }, 100 { VEX_W_TABLE (EVEX_W_0F6F_P_1) }, 101 { VEX_W_TABLE (EVEX_W_0F6F_P_2) }, 102 { VEX_W_TABLE (EVEX_W_0F6F_P_3) }, 103 }, 104 /* PREFIX_EVEX_0F70 */ 105 { 106 { Bad_Opcode }, 107 { "vpshufhw", { XM, EXx, Ib }, 0 }, 108 { VEX_W_TABLE (EVEX_W_0F70_P_2) }, 109 { "vpshuflw", { XM, EXx, Ib }, 0 }, 110 }, 111 /* PREFIX_EVEX_0F78 */ 112 { 113 { VEX_W_TABLE (EVEX_W_0F78_P_0) }, 114 { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 }, 115 { VEX_W_TABLE (EVEX_W_0F78_P_2) }, 116 { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 }, 117 }, 118 /* PREFIX_EVEX_0F79 */ 119 { 120 { VEX_W_TABLE (EVEX_W_0F79_P_0) }, 121 { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 }, 122 { VEX_W_TABLE (EVEX_W_0F79_P_2) }, 123 { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 }, 124 }, 125 /* PREFIX_EVEX_0F7A */ 126 { 127 { Bad_Opcode }, 128 { VEX_W_TABLE (EVEX_W_0F7A_P_1) }, 129 { VEX_W_TABLE (EVEX_W_0F7A_P_2) }, 130 { VEX_W_TABLE (EVEX_W_0F7A_P_3) }, 131 }, 132 /* PREFIX_EVEX_0F7B */ 133 { 134 { Bad_Opcode }, 135 { "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 }, 136 { VEX_W_TABLE (EVEX_W_0F7B_P_2) }, 137 { VEX_W_TABLE (EVEX_W_0F7B_P_3) }, 138 }, 139 /* PREFIX_EVEX_0F7E */ 140 { 141 { Bad_Opcode }, 142 { VEX_W_TABLE (EVEX_W_0F7E_P_1) }, 143 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) }, 144 }, 145 /* PREFIX_EVEX_0F7F */ 146 { 147 { Bad_Opcode }, 148 { VEX_W_TABLE (EVEX_W_0F7F_P_1) }, 149 { VEX_W_TABLE (EVEX_W_0F7F_P_2) }, 150 { VEX_W_TABLE (EVEX_W_0F7F_P_3) }, 151 }, 152 /* PREFIX_EVEX_0FC2 */ 153 { 154 { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 155 { VEX_W_TABLE (EVEX_W_0FC2_P_1) }, 156 { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE }, 157 { VEX_W_TABLE (EVEX_W_0FC2_P_3) }, 158 }, 159 /* PREFIX_EVEX_0FE6 */ 160 { 161 { Bad_Opcode }, 162 { VEX_W_TABLE (EVEX_W_0FE6_P_1) }, 163 { VEX_W_TABLE (EVEX_W_0FE6_P_2) }, 164 { VEX_W_TABLE (EVEX_W_0FE6_P_3) }, 165 }, 166 /* PREFIX_EVEX_0F3810 */ 167 { 168 { Bad_Opcode }, 169 { VEX_W_TABLE (EVEX_W_0F3810_P_1) }, 170 { VEX_W_TABLE (EVEX_W_0F3810_P_2) }, 171 }, 172 /* PREFIX_EVEX_0F3811 */ 173 { 174 { Bad_Opcode }, 175 { VEX_W_TABLE (EVEX_W_0F3811_P_1) }, 176 { VEX_W_TABLE (EVEX_W_0F3811_P_2) }, 177 }, 178 /* PREFIX_EVEX_0F3812 */ 179 { 180 { Bad_Opcode }, 181 { VEX_W_TABLE (EVEX_W_0F3812_P_1) }, 182 { VEX_W_TABLE (EVEX_W_0F3812_P_2) }, 183 }, 184 /* PREFIX_EVEX_0F3813 */ 185 { 186 { Bad_Opcode }, 187 { VEX_W_TABLE (EVEX_W_0F3813_P_1) }, 188 { VEX_W_TABLE (EVEX_W_0F3813_P_2) }, 189 }, 190 /* PREFIX_EVEX_0F3814 */ 191 { 192 { Bad_Opcode }, 193 { VEX_W_TABLE (EVEX_W_0F3814_P_1) }, 194 { "vprorv%DQ", { XM, Vex, EXx }, 0 }, 195 }, 196 /* PREFIX_EVEX_0F3815 */ 197 { 198 { Bad_Opcode }, 199 { VEX_W_TABLE (EVEX_W_0F3815_P_1) }, 200 { "vprolv%DQ", { XM, Vex, EXx }, 0 }, 201 }, 202 /* PREFIX_EVEX_0F3820 */ 203 { 204 { Bad_Opcode }, 205 { VEX_W_TABLE (EVEX_W_0F3820_P_1) }, 206 { "vpmovsxbw", { XM, EXxmmq }, 0 }, 207 }, 208 /* PREFIX_EVEX_0F3821 */ 209 { 210 { Bad_Opcode }, 211 { VEX_W_TABLE (EVEX_W_0F3821_P_1) }, 212 { "vpmovsxbd", { XM, EXxmmqd }, 0 }, 213 }, 214 /* PREFIX_EVEX_0F3822 */ 215 { 216 { Bad_Opcode }, 217 { VEX_W_TABLE (EVEX_W_0F3822_P_1) }, 218 { "vpmovsxbq", { XM, EXxmmdw }, 0 }, 219 }, 220 /* PREFIX_EVEX_0F3823 */ 221 { 222 { Bad_Opcode }, 223 { VEX_W_TABLE (EVEX_W_0F3823_P_1) }, 224 { "vpmovsxwd", { XM, EXxmmq }, 0 }, 225 }, 226 /* PREFIX_EVEX_0F3824 */ 227 { 228 { Bad_Opcode }, 229 { VEX_W_TABLE (EVEX_W_0F3824_P_1) }, 230 { "vpmovsxwq", { XM, EXxmmqd }, 0 }, 231 }, 232 /* PREFIX_EVEX_0F3825 */ 233 { 234 { Bad_Opcode }, 235 { VEX_W_TABLE (EVEX_W_0F3825_P_1) }, 236 { VEX_W_TABLE (EVEX_W_0F3825_P_2) }, 237 }, 238 /* PREFIX_EVEX_0F3826 */ 239 { 240 { Bad_Opcode }, 241 { "vptestnm%BW", { XMask, Vex, EXx }, 0 }, 242 { "vptestm%BW", { XMask, Vex, EXx }, 0 }, 243 }, 244 /* PREFIX_EVEX_0F3827 */ 245 { 246 { Bad_Opcode }, 247 { "vptestnm%DQ", { XMask, Vex, EXx }, 0 }, 248 { "vptestm%DQ", { XMask, Vex, EXx }, 0 }, 249 }, 250 /* PREFIX_EVEX_0F3828 */ 251 { 252 { Bad_Opcode }, 253 { MOD_TABLE (MOD_EVEX_0F3828_P_1) }, 254 { VEX_W_TABLE (EVEX_W_0F3828_P_2) }, 255 }, 256 /* PREFIX_EVEX_0F3829 */ 257 { 258 { Bad_Opcode }, 259 { "vpmov%BW2m", { XMask, EXx }, 0 }, 260 { VEX_W_TABLE (EVEX_W_0F3829_P_2) }, 261 }, 262 /* PREFIX_EVEX_0F382A */ 263 { 264 { Bad_Opcode }, 265 { VEX_W_TABLE (EVEX_W_0F382A_P_1) }, 266 { VEX_W_TABLE (EVEX_W_0F382A_P_2) }, 267 }, 268 /* PREFIX_EVEX_0F3830 */ 269 { 270 { Bad_Opcode }, 271 { VEX_W_TABLE (EVEX_W_0F3830_P_1) }, 272 { "vpmovzxbw", { XM, EXxmmq }, 0 }, 273 }, 274 /* PREFIX_EVEX_0F3831 */ 275 { 276 { Bad_Opcode }, 277 { VEX_W_TABLE (EVEX_W_0F3831_P_1) }, 278 { "vpmovzxbd", { XM, EXxmmqd }, 0 }, 279 }, 280 /* PREFIX_EVEX_0F3832 */ 281 { 282 { Bad_Opcode }, 283 { VEX_W_TABLE (EVEX_W_0F3832_P_1) }, 284 { "vpmovzxbq", { XM, EXxmmdw }, 0 }, 285 }, 286 /* PREFIX_EVEX_0F3833 */ 287 { 288 { Bad_Opcode }, 289 { VEX_W_TABLE (EVEX_W_0F3833_P_1) }, 290 { "vpmovzxwd", { XM, EXxmmq }, 0 }, 291 }, 292 /* PREFIX_EVEX_0F3834 */ 293 { 294 { Bad_Opcode }, 295 { VEX_W_TABLE (EVEX_W_0F3834_P_1) }, 296 { "vpmovzxwq", { XM, EXxmmqd }, 0 }, 297 }, 298 /* PREFIX_EVEX_0F3835 */ 299 { 300 { Bad_Opcode }, 301 { VEX_W_TABLE (EVEX_W_0F3835_P_1) }, 302 { VEX_W_TABLE (EVEX_W_0F3835_P_2) }, 303 }, 304 /* PREFIX_EVEX_0F3838 */ 305 { 306 { Bad_Opcode }, 307 { MOD_TABLE (MOD_EVEX_0F3838_P_1) }, 308 { "vpminsb", { XM, Vex, EXx }, 0 }, 309 }, 310 /* PREFIX_EVEX_0F3839 */ 311 { 312 { Bad_Opcode }, 313 { "vpmov%DQ2m", { XMask, EXx }, 0 }, 314 { "vpmins%DQ", { XM, Vex, EXx }, 0 }, 315 }, 316 /* PREFIX_EVEX_0F383A */ 317 { 318 { Bad_Opcode }, 319 { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, 320 { "vpminuw", { XM, Vex, EXx }, 0 }, 321 }, 322 /* PREFIX_EVEX_0F3852 */ 323 { 324 { Bad_Opcode }, 325 { VEX_W_TABLE (EVEX_W_0F3852_P_1) }, 326 { "vpdpwssd", { XM, Vex, EXx }, 0 }, 327 { "vp4dpwssd", { XM, Vex, EXxmm }, 0 }, 328 }, 329 /* PREFIX_EVEX_0F3853 */ 330 { 331 { Bad_Opcode }, 332 { Bad_Opcode }, 333 { "vpdpwssds", { XM, Vex, EXx }, 0 }, 334 { "vp4dpwssds", { XM, Vex, EXxmm }, 0 }, 335 }, 336 /* PREFIX_EVEX_0F3868 */ 337 { 338 { Bad_Opcode }, 339 { Bad_Opcode }, 340 { Bad_Opcode }, 341 { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 }, 342 }, 343 /* PREFIX_EVEX_0F3872 */ 344 { 345 { Bad_Opcode }, 346 { VEX_W_TABLE (EVEX_W_0F3872_P_1) }, 347 { VEX_W_TABLE (EVEX_W_0F3872_P_2) }, 348 { VEX_W_TABLE (EVEX_W_0F3872_P_3) }, 349 }, 350 /* PREFIX_EVEX_0F389A */ 351 { 352 { Bad_Opcode }, 353 { Bad_Opcode }, 354 { "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 355 { "v4fmaddps", { XM, Vex, Mxmm }, 0 }, 356 }, 357 /* PREFIX_EVEX_0F389B */ 358 { 359 { Bad_Opcode }, 360 { Bad_Opcode }, 361 { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 }, 362 { "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 }, 363 }, 364 /* PREFIX_EVEX_0F38AA */ 365 { 366 { Bad_Opcode }, 367 { Bad_Opcode }, 368 { "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 }, 369 { "v4fnmaddps", { XM, Vex, Mxmm }, 0 }, 370 }, 371 /* PREFIX_EVEX_0F38AB */ 372 { 373 { Bad_Opcode }, 374 { Bad_Opcode }, 375 { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 }, 376 { "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 }, 377 }, 378