1 /*
2  * Copyright (c) Facebook, Inc. and its affiliates.
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #pragma once
18 
19 #include <cstdint>
20 
21 #include <folly/Portability.h>
22 
23 #ifdef _MSC_VER
24 #include <intrin.h>
25 #endif
26 
27 namespace folly {
28 
29 /**
30  * Identification of an Intel CPU.
31  * Supports CPUID feature flags (EAX=1) and extended features (EAX=7, ECX=0).
32  * Values from
33  * http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html
34  */
35 class CpuId {
36  public:
37   // Always inline in order for this to be usable from a __ifunc__.
38   // In shared library mode, a __ifunc__ runs at relocation time, while the
39   // PLT hasn't been fully populated yet; thus, ifuncs cannot use symbols
40   // with potentially external linkage. (This issue is less likely in opt
41   // mode since inlining happens more likely, and it doesn't happen for
42   // statically linked binaries which don't depend on the PLT)
CpuId()43   FOLLY_ALWAYS_INLINE CpuId() {
44 #if defined(_MSC_VER) && (FOLLY_X64 || defined(_M_IX86))
45     int reg[4];
46     __cpuid(static_cast<int*>(reg), 0);
47     const int n = reg[0];
48     if (n >= 1) {
49       __cpuid(static_cast<int*>(reg), 1);
50       f1c_ = uint32_t(reg[2]);
51       f1d_ = uint32_t(reg[3]);
52     }
53     if (n >= 7) {
54       __cpuidex(static_cast<int*>(reg), 7, 0);
55       f7b_ = uint32_t(reg[1]);
56       f7c_ = uint32_t(reg[2]);
57     }
58 #elif defined(__i386__) && defined(__PIC__) && !defined(__clang__) && \
59     defined(__GNUC__)
60     // The following block like the normal cpuid branch below, but gcc
61     // reserves ebx for use of its pic register so we must specially
62     // handle the save and restore to avoid clobbering the register
63     uint32_t n;
64     __asm__(
65         "pushl %%ebx\n\t"
66         "cpuid\n\t"
67         "popl %%ebx\n\t"
68         : "=a"(n)
69         : "a"(0)
70         : "ecx", "edx");
71     if (n >= 1) {
72       uint32_t f1a;
73       __asm__(
74           "pushl %%ebx\n\t"
75           "cpuid\n\t"
76           "popl %%ebx\n\t"
77           : "=a"(f1a), "=c"(f1c_), "=d"(f1d_)
78           : "a"(1)
79           :);
80     }
81     if (n >= 7) {
82       __asm__(
83           "pushl %%ebx\n\t"
84           "cpuid\n\t"
85           "movl %%ebx, %%eax\n\t"
86           "popl %%ebx"
87           : "=a"(f7b_), "=c"(f7c_)
88           : "a"(7), "c"(0)
89           : "edx");
90     }
91 #elif FOLLY_X64 || defined(__i386__)
92     uint32_t n;
93     __asm__("cpuid" : "=a"(n) : "a"(0) : "ebx", "ecx", "edx");
94     if (n >= 1) {
95       uint32_t f1a;
96       __asm__("cpuid" : "=a"(f1a), "=c"(f1c_), "=d"(f1d_) : "a"(1) : "ebx");
97     }
98     if (n >= 7) {
99       uint32_t f7a;
100       __asm__("cpuid"
101               : "=a"(f7a), "=b"(f7b_), "=c"(f7c_)
102               : "a"(7), "c"(0)
103               : "edx");
104     }
105 #endif
106   }
107 
108 #define FOLLY_DETAIL_CPUID_X(name, r, bit) \
109   FOLLY_ALWAYS_INLINE bool name() const { return ((r) & (1U << bit)) != 0; }
110 
111 // cpuid(1): Processor Info and Feature Bits.
112 #define FOLLY_DETAIL_CPUID_C(name, bit) FOLLY_DETAIL_CPUID_X(name, f1c_, bit)
113   FOLLY_DETAIL_CPUID_C(sse3, 0)
114   FOLLY_DETAIL_CPUID_C(pclmuldq, 1)
115   FOLLY_DETAIL_CPUID_C(dtes64, 2)
116   FOLLY_DETAIL_CPUID_C(monitor, 3)
117   FOLLY_DETAIL_CPUID_C(dscpl, 4)
118   FOLLY_DETAIL_CPUID_C(vmx, 5)
119   FOLLY_DETAIL_CPUID_C(smx, 6)
120   FOLLY_DETAIL_CPUID_C(eist, 7)
121   FOLLY_DETAIL_CPUID_C(tm2, 8)
122   FOLLY_DETAIL_CPUID_C(ssse3, 9)
123   FOLLY_DETAIL_CPUID_C(cnxtid, 10)
124   FOLLY_DETAIL_CPUID_C(fma, 12)
125   FOLLY_DETAIL_CPUID_C(cx16, 13)
126   FOLLY_DETAIL_CPUID_C(xtpr, 14)
127   FOLLY_DETAIL_CPUID_C(pdcm, 15)
128   FOLLY_DETAIL_CPUID_C(pcid, 17)
129   FOLLY_DETAIL_CPUID_C(dca, 18)
130   FOLLY_DETAIL_CPUID_C(sse41, 19)
131   FOLLY_DETAIL_CPUID_C(sse42, 20)
132   FOLLY_DETAIL_CPUID_C(x2apic, 21)
133   FOLLY_DETAIL_CPUID_C(movbe, 22)
134   FOLLY_DETAIL_CPUID_C(popcnt, 23)
135   FOLLY_DETAIL_CPUID_C(tscdeadline, 24)
136   FOLLY_DETAIL_CPUID_C(aes, 25)
137   FOLLY_DETAIL_CPUID_C(xsave, 26)
138   FOLLY_DETAIL_CPUID_C(osxsave, 27)
139   FOLLY_DETAIL_CPUID_C(avx, 28)
140   FOLLY_DETAIL_CPUID_C(f16c, 29)
141   FOLLY_DETAIL_CPUID_C(rdrand, 30)
142 #undef FOLLY_DETAIL_CPUID_C
143 #define FOLLY_DETAIL_CPUID_D(name, bit) FOLLY_DETAIL_CPUID_X(name, f1d_, bit)
144   FOLLY_DETAIL_CPUID_D(fpu, 0)
145   FOLLY_DETAIL_CPUID_D(vme, 1)
146   FOLLY_DETAIL_CPUID_D(de, 2)
147   FOLLY_DETAIL_CPUID_D(pse, 3)
148   FOLLY_DETAIL_CPUID_D(tsc, 4)
149   FOLLY_DETAIL_CPUID_D(msr, 5)
150   FOLLY_DETAIL_CPUID_D(pae, 6)
151   FOLLY_DETAIL_CPUID_D(mce, 7)
152   FOLLY_DETAIL_CPUID_D(cx8, 8)
153   FOLLY_DETAIL_CPUID_D(apic, 9)
154   FOLLY_DETAIL_CPUID_D(sep, 11)
155   FOLLY_DETAIL_CPUID_D(mtrr, 12)
156   FOLLY_DETAIL_CPUID_D(pge, 13)
157   FOLLY_DETAIL_CPUID_D(mca, 14)
158   FOLLY_DETAIL_CPUID_D(cmov, 15)
159   FOLLY_DETAIL_CPUID_D(pat, 16)
160   FOLLY_DETAIL_CPUID_D(pse36, 17)
161   FOLLY_DETAIL_CPUID_D(psn, 18)
162   FOLLY_DETAIL_CPUID_D(clfsh, 19)
163   FOLLY_DETAIL_CPUID_D(ds, 21)
164   FOLLY_DETAIL_CPUID_D(acpi, 22)
165   FOLLY_DETAIL_CPUID_D(mmx, 23)
166   FOLLY_DETAIL_CPUID_D(fxsr, 24)
167   FOLLY_DETAIL_CPUID_D(sse, 25)
168   FOLLY_DETAIL_CPUID_D(sse2, 26)
169   FOLLY_DETAIL_CPUID_D(ss, 27)
170   FOLLY_DETAIL_CPUID_D(htt, 28)
171   FOLLY_DETAIL_CPUID_D(tm, 29)
172   FOLLY_DETAIL_CPUID_D(pbe, 31)
173 #undef FOLLY_DETAIL_CPUID_D
174 
175   // cpuid(7): Extended Features.
176 #define FOLLY_DETAIL_CPUID_B(name, bit) FOLLY_DETAIL_CPUID_X(name, f7b_, bit)
177   FOLLY_DETAIL_CPUID_B(bmi1, 3)
178   FOLLY_DETAIL_CPUID_B(hle, 4)
179   FOLLY_DETAIL_CPUID_B(avx2, 5)
180   FOLLY_DETAIL_CPUID_B(smep, 7)
181   FOLLY_DETAIL_CPUID_B(bmi2, 8)
182   FOLLY_DETAIL_CPUID_B(erms, 9)
183   FOLLY_DETAIL_CPUID_B(invpcid, 10)
184   FOLLY_DETAIL_CPUID_B(rtm, 11)
185   FOLLY_DETAIL_CPUID_B(mpx, 14)
186   FOLLY_DETAIL_CPUID_B(avx512f, 16)
187   FOLLY_DETAIL_CPUID_B(avx512dq, 17)
188   FOLLY_DETAIL_CPUID_B(rdseed, 18)
189   FOLLY_DETAIL_CPUID_B(adx, 19)
190   FOLLY_DETAIL_CPUID_B(smap, 20)
191   FOLLY_DETAIL_CPUID_B(avx512ifma, 21)
192   FOLLY_DETAIL_CPUID_B(pcommit, 22)
193   FOLLY_DETAIL_CPUID_B(clflushopt, 23)
194   FOLLY_DETAIL_CPUID_B(clwb, 24)
195   FOLLY_DETAIL_CPUID_B(avx512pf, 26)
196   FOLLY_DETAIL_CPUID_B(avx512er, 27)
197   FOLLY_DETAIL_CPUID_B(avx512cd, 28)
198   FOLLY_DETAIL_CPUID_B(sha, 29)
199   FOLLY_DETAIL_CPUID_B(avx512bw, 30)
200   FOLLY_DETAIL_CPUID_B(avx512vl, 31)
201 #undef FOLLY_DETAIL_CPUID_B
202 #define FOLLY_DETAIL_CPUID_C(name, bit) FOLLY_DETAIL_CPUID_X(name, f7c_, bit)
203   FOLLY_DETAIL_CPUID_C(prefetchwt1, 0)
204   FOLLY_DETAIL_CPUID_C(avx512vbmi, 1)
205   FOLLY_DETAIL_CPUID_C(vaes, 9)
206   FOLLY_DETAIL_CPUID_C(vpclmulqdq, 10)
207 #undef FOLLY_DETAIL_CPUID_C
208 
209 #undef FOLLY_DETAIL_CPUID_X
210 
211  private:
212   uint32_t f1c_ = 0;
213   uint32_t f1d_ = 0;
214   uint32_t f7b_ = 0;
215   uint32_t f7c_ = 0;
216 };
217 
218 } // namespace folly
219