1 /* Native-dependent code for AMD64.
2 
3    Copyright (C) 2003-2021 Free Software Foundation, Inc.
4 
5    This file is part of GDB.
6 
7    This program is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3 of the License, or
10    (at your option) any later version.
11 
12    This program is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19 
20 #include "defs.h"
21 #include "gdbarch.h"
22 #include "regcache.h"
23 
24 #include "i386-tdep.h"
25 #include "amd64-tdep.h"
26 #include "amd64-nat.h"
27 
28 /* The following bits of code help with implementing debugging 32-bit
29    code natively on AMD64.  The idea is to define two mappings between
30    the register number as used by GDB and the register set used by the
31    host to represent the general-purpose registers; one for 32-bit
32    code and one for 64-bit code.  The mappings are specified by the
33    following variables and consist of an array of offsets within the
34    register set indexed by register number, and the number of
35    registers supported by the mapping.  We don't need mappings for the
36    floating-point and SSE registers, since the difference between
37    64-bit and 32-bit variants are negligible.  The difference in the
38    number of SSE registers is already handled by the target code.  */
39 
40 /* General-purpose register mapping for native 32-bit code.  */
41 int *amd64_native_gregset32_reg_offset;
42 int amd64_native_gregset32_num_regs = I386_NUM_GREGS;
43 
44 /* General-purpose register mapping for native 64-bit code.  */
45 int *amd64_native_gregset64_reg_offset;
46 int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS;
47 
48 /* Return the offset of REGNUM within the appropriate native
49    general-purpose register set.  */
50 
51 static int
amd64_native_gregset_reg_offset(struct gdbarch * gdbarch,int regnum)52 amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum)
53 {
54   int *reg_offset = amd64_native_gregset64_reg_offset;
55   int num_regs = amd64_native_gregset64_num_regs;
56 
57   gdb_assert (regnum >= 0);
58 
59   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
60     {
61       reg_offset = amd64_native_gregset32_reg_offset;
62       num_regs = amd64_native_gregset32_num_regs;
63     }
64 
65   if (num_regs > gdbarch_num_regs (gdbarch))
66     num_regs = gdbarch_num_regs (gdbarch);
67 
68   if (regnum >= num_regs)
69     return -1;
70 
71   return reg_offset[regnum];
72 }
73 
74 /* Return whether the native general-purpose register set supplies
75    register REGNUM.  */
76 
77 int
amd64_native_gregset_supplies_p(struct gdbarch * gdbarch,int regnum)78 amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum)
79 {
80   return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1);
81 }
82 
83 
84 /* Supply register REGNUM, whose contents are stored in GREGS, to
85    REGCACHE.  If REGNUM is -1, supply all appropriate registers.  */
86 
87 void
amd64_supply_native_gregset(struct regcache * regcache,const void * gregs,int regnum)88 amd64_supply_native_gregset (struct regcache *regcache,
89 			     const void *gregs, int regnum)
90 {
91   const char *regs = (const char *) gregs;
92   struct gdbarch *gdbarch = regcache->arch ();
93   int num_regs = amd64_native_gregset64_num_regs;
94   int i;
95 
96   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
97     num_regs = amd64_native_gregset32_num_regs;
98 
99   if (num_regs > gdbarch_num_regs (gdbarch))
100     num_regs = gdbarch_num_regs (gdbarch);
101 
102   for (i = 0; i < num_regs; i++)
103     {
104       if (regnum == -1 || regnum == i)
105 	{
106 	  int offset = amd64_native_gregset_reg_offset (gdbarch, i);
107 
108 	  if (offset != -1)
109 	    regcache->raw_supply (i, regs + offset);
110 	}
111     }
112 }
113 
114 /* Collect register REGNUM from REGCACHE and store its contents in
115    GREGS.  If REGNUM is -1, collect and store all appropriate
116    registers.  */
117 
118 void
amd64_collect_native_gregset(const struct regcache * regcache,void * gregs,int regnum)119 amd64_collect_native_gregset (const struct regcache *regcache,
120 			      void *gregs, int regnum)
121 {
122   char *regs = (char *) gregs;
123   struct gdbarch *gdbarch = regcache->arch ();
124   int num_regs = amd64_native_gregset64_num_regs;
125   int i;
126 
127   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
128     {
129       num_regs = amd64_native_gregset32_num_regs;
130 
131       /* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and
132 	 %eip get zero-extended to 64 bits.  */
133       for (i = 0; i <= I386_EIP_REGNUM; i++)
134 	{
135 	  if (regnum == -1 || regnum == i)
136 	    memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
137 	}
138       /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs.  */
139       for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++)
140 	{
141 	  if (regnum == -1 || regnum == i)
142 	    memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
143 	}
144     }
145 
146   if (num_regs > gdbarch_num_regs (gdbarch))
147     num_regs = gdbarch_num_regs (gdbarch);
148 
149   for (i = 0; i < num_regs; i++)
150     {
151       if (regnum == -1 || regnum == i)
152 	{
153 	  int offset = amd64_native_gregset_reg_offset (gdbarch, i);
154 
155 	  if (offset != -1)
156 	    regcache->raw_collect (i, regs + offset);
157 	}
158     }
159 }
160