1 LIST 2 3;========================================================================== 4; Build date : Oct 21 2015 5; MPASM PIC18F2620 processor include 6; 7; (c) Copyright 1999-2015 Microchip Technology, All rights reserved 8;========================================================================== 9 10 NOLIST 11 12;========================================================================== 13; This header file defines configurations, registers, and other useful 14; bits of information for the PIC18F2620 microcontroller. These names 15; are taken to match the data sheets as closely as possible. 16; 17; Note that the processor must be selected before this file is included. 18; The processor may be selected the following ways: 19; 20; 1. Command line switch: 21; C:\MPASM MYFILE.ASM /PIC18F2620 22; 2. LIST directive in the source file 23; LIST P=PIC18F2620 24; 3. Processor Type entry in the MPASM full-screen interface 25; 4. Setting the processor in the MPLAB Project Dialog 26;========================================================================== 27 28;========================================================================== 29; 30; Verify Processor 31; 32;========================================================================== 33 IFNDEF __18F2620 34 MESSG "Processor-header file mismatch. Verify selected processor." 35 ENDIF 36 37;========================================================================== 38; 18xxxx Family EQUates 39;========================================================================== 40FSR0 EQU 0 41FSR1 EQU 1 42FSR2 EQU 2 43 44FAST EQU 1 45 46W EQU 0 47A EQU 0 48ACCESS EQU 0 49BANKED EQU 1 50;========================================================================== 51 52;========================================================================== 53; 16Cxxx/17Cxxx Substitutions 54;========================================================================== 55 #define DDRA TRISA ; PIC17Cxxx SFR substitution 56 #define DDRB TRISB ; PIC17Cxxx SFR substitution 57 #define DDRC TRISC ; PIC17Cxxx SFR substitution 58 #define DDRD TRISD ; PIC17Cxxx SFR substitution 59 #define DDRE TRISE ; PIC17Cxxx SFR substitution 60 61;========================================================================== 62; 63; Register Definitions 64; 65;========================================================================== 66 67;----- Register Files ----------------------------------------------------- 68PORTA EQU H'0F80' 69PORTB EQU H'0F81' 70PORTC EQU H'0F82' 71PORTE EQU H'0F84' 72LATA EQU H'0F89' 73LATB EQU H'0F8A' 74LATC EQU H'0F8B' 75DDRA EQU H'0F92' 76TRISA EQU H'0F92' 77DDRB EQU H'0F93' 78TRISB EQU H'0F93' 79DDRC EQU H'0F94' 80TRISC EQU H'0F94' 81OSCTUNE EQU H'0F9B' 82PIE1 EQU H'0F9D' 83PIR1 EQU H'0F9E' 84IPR1 EQU H'0F9F' 85PIE2 EQU H'0FA0' 86PIR2 EQU H'0FA1' 87IPR2 EQU H'0FA2' 88EECON1 EQU H'0FA6' 89EECON2 EQU H'0FA7' 90EEDATA EQU H'0FA8' 91EEADR EQU H'0FA9' 92EEADRH EQU H'0FAA' 93RCSTA EQU H'0FAB' 94TXSTA EQU H'0FAC' 95TXREG EQU H'0FAD' 96RCREG EQU H'0FAE' 97SPBRG EQU H'0FAF' 98SPBRGH EQU H'0FB0' 99T3CON EQU H'0FB1' 100TMR3 EQU H'0FB2' 101TMR3L EQU H'0FB2' 102TMR3H EQU H'0FB3' 103CMCON EQU H'0FB4' 104CVRCON EQU H'0FB5' 105ECCP1AS EQU H'0FB6' 106ECCPAS EQU H'0FB6' 107ECCP1DEL EQU H'0FB7' 108PWM1CON EQU H'0FB7' 109BAUDCON EQU H'0FB8' 110BAUDCTL EQU H'0FB8' 111CCP2CON EQU H'0FBA' 112CCPR2 EQU H'0FBB' 113CCPR2L EQU H'0FBB' 114CCPR2H EQU H'0FBC' 115CCP1CON EQU H'0FBD' 116CCPR1 EQU H'0FBE' 117CCPR1L EQU H'0FBE' 118CCPR1H EQU H'0FBF' 119ADCON2 EQU H'0FC0' 120ADCON1 EQU H'0FC1' 121ADCON0 EQU H'0FC2' 122ADRES EQU H'0FC3' 123ADRESL EQU H'0FC3' 124ADRESH EQU H'0FC4' 125SSPCON2 EQU H'0FC5' 126SSPCON1 EQU H'0FC6' 127SSPSTAT EQU H'0FC7' 128SSPADD EQU H'0FC8' 129SSPBUF EQU H'0FC9' 130T2CON EQU H'0FCA' 131PR2 EQU H'0FCB' 132TMR2 EQU H'0FCC' 133T1CON EQU H'0FCD' 134TMR1 EQU H'0FCE' 135TMR1L EQU H'0FCE' 136TMR1H EQU H'0FCF' 137RCON EQU H'0FD0' 138WDTCON EQU H'0FD1' 139HLVDCON EQU H'0FD2' 140LVDCON EQU H'0FD2' 141OSCCON EQU H'0FD3' 142T0CON EQU H'0FD5' 143TMR0 EQU H'0FD6' 144TMR0L EQU H'0FD6' 145TMR0H EQU H'0FD7' 146STATUS EQU H'0FD8' 147FSR2L EQU H'0FD9' 148FSR2H EQU H'0FDA' 149PLUSW2 EQU H'0FDB' 150PREINC2 EQU H'0FDC' 151POSTDEC2 EQU H'0FDD' 152POSTINC2 EQU H'0FDE' 153INDF2 EQU H'0FDF' 154BSR EQU H'0FE0' 155FSR1L EQU H'0FE1' 156FSR1H EQU H'0FE2' 157PLUSW1 EQU H'0FE3' 158PREINC1 EQU H'0FE4' 159POSTDEC1 EQU H'0FE5' 160POSTINC1 EQU H'0FE6' 161INDF1 EQU H'0FE7' 162WREG EQU H'0FE8' 163FSR0L EQU H'0FE9' 164FSR0H EQU H'0FEA' 165PLUSW0 EQU H'0FEB' 166PREINC0 EQU H'0FEC' 167POSTDEC0 EQU H'0FED' 168POSTINC0 EQU H'0FEE' 169INDF0 EQU H'0FEF' 170INTCON3 EQU H'0FF0' 171INTCON2 EQU H'0FF1' 172INTCON EQU H'0FF2' 173PROD EQU H'0FF3' 174PRODL EQU H'0FF3' 175PRODH EQU H'0FF4' 176TABLAT EQU H'0FF5' 177TBLPTR EQU H'0FF6' 178TBLPTRL EQU H'0FF6' 179TBLPTRH EQU H'0FF7' 180TBLPTRU EQU H'0FF8' 181PC EQU H'0FF9' 182PCL EQU H'0FF9' 183PCLATH EQU H'0FFA' 184PCLATU EQU H'0FFB' 185STKPTR EQU H'0FFC' 186TOS EQU H'0FFD' 187TOSL EQU H'0FFD' 188TOSH EQU H'0FFE' 189TOSU EQU H'0FFF' 190 191;----- PORTA Bits ----------------------------------------------------- 192RA0 EQU H'0000' 193RA1 EQU H'0001' 194RA2 EQU H'0002' 195RA3 EQU H'0003' 196RA4 EQU H'0004' 197RA5 EQU H'0005' 198RA6 EQU H'0006' 199RA7 EQU H'0007' 200 201T0CKI EQU H'0004' 202AN4 EQU H'0005' 203 204SS EQU H'0005' 205 206NOT_SS EQU H'0005' 207 208LVDIN EQU H'0005' 209 210HLVDIN EQU H'0005' 211 212 213;----- PORTB Bits ----------------------------------------------------- 214RB0 EQU H'0000' 215RB1 EQU H'0001' 216RB2 EQU H'0002' 217RB3 EQU H'0003' 218RB4 EQU H'0004' 219RB5 EQU H'0005' 220RB6 EQU H'0006' 221RB7 EQU H'0007' 222 223INT0 EQU H'0000' 224INT1 EQU H'0001' 225INT2 EQU H'0002' 226CCP2_PORTB EQU H'0003' 227KBI0 EQU H'0004' 228KBI1 EQU H'0005' 229KBI2 EQU H'0006' 230KBI3 EQU H'0007' 231 232AN12 EQU H'0000' 233AN10 EQU H'0001' 234AN8 EQU H'0002' 235AN9 EQU H'0003' 236AN11 EQU H'0004' 237PGM EQU H'0005' 238PGC EQU H'0006' 239PGD EQU H'0007' 240 241 242;----- PORTC Bits ----------------------------------------------------- 243RC0 EQU H'0000' 244RC1 EQU H'0001' 245RC2 EQU H'0002' 246RC3 EQU H'0003' 247RC4 EQU H'0004' 248RC5 EQU H'0005' 249RC6 EQU H'0006' 250RC7 EQU H'0007' 251 252T1OSO EQU H'0000' 253T1OSI EQU H'0001' 254CCP1 EQU H'0002' 255SCK EQU H'0003' 256SDI EQU H'0004' 257SDO EQU H'0005' 258TX EQU H'0006' 259RX EQU H'0007' 260 261T13CKI EQU H'0000' 262CCP2_PORTC EQU H'0001' 263SCL EQU H'0003' 264SDA EQU H'0004' 265CK EQU H'0006' 266; DT is a reserved word 267; DT EQU H'0007' 268 269T1CKI EQU H'0000' 270 271 272;----- PORTE Bits ----------------------------------------------------- 273RE3 EQU H'0003' 274 275MCLR EQU H'0003' 276 277NOT_MCLR EQU H'0003' 278 279VPP EQU H'0003' 280 281 282;----- LATA Bits ----------------------------------------------------- 283LATA0 EQU H'0000' 284LATA1 EQU H'0001' 285LATA2 EQU H'0002' 286LATA3 EQU H'0003' 287LATA4 EQU H'0004' 288LATA5 EQU H'0005' 289LATA6 EQU H'0006' 290LATA7 EQU H'0007' 291 292 293;----- LATB Bits ----------------------------------------------------- 294LATB0 EQU H'0000' 295LATB1 EQU H'0001' 296LATB2 EQU H'0002' 297LATB3 EQU H'0003' 298LATB4 EQU H'0004' 299LATB5 EQU H'0005' 300LATB6 EQU H'0006' 301LATB7 EQU H'0007' 302 303 304;----- LATC Bits ----------------------------------------------------- 305LATC0 EQU H'0000' 306LATC1 EQU H'0001' 307LATC2 EQU H'0002' 308LATC3 EQU H'0003' 309LATC4 EQU H'0004' 310LATC5 EQU H'0005' 311LATC6 EQU H'0006' 312LATC7 EQU H'0007' 313 314 315;----- DDRA Bits ----------------------------------------------------- 316TRISA0 EQU H'0000' 317TRISA1 EQU H'0001' 318TRISA2 EQU H'0002' 319TRISA3 EQU H'0003' 320TRISA4 EQU H'0004' 321TRISA5 EQU H'0005' 322TRISA6 EQU H'0006' 323TRISA7 EQU H'0007' 324 325RA0 EQU H'0000' 326RA1 EQU H'0001' 327RA2 EQU H'0002' 328RA3 EQU H'0003' 329RA4 EQU H'0004' 330RA5 EQU H'0005' 331RA6 EQU H'0006' 332RA7 EQU H'0007' 333 334 335;----- TRISA Bits ----------------------------------------------------- 336TRISA0 EQU H'0000' 337TRISA1 EQU H'0001' 338TRISA2 EQU H'0002' 339TRISA3 EQU H'0003' 340TRISA4 EQU H'0004' 341TRISA5 EQU H'0005' 342TRISA6 EQU H'0006' 343TRISA7 EQU H'0007' 344 345RA0 EQU H'0000' 346RA1 EQU H'0001' 347RA2 EQU H'0002' 348RA3 EQU H'0003' 349RA4 EQU H'0004' 350RA5 EQU H'0005' 351RA6 EQU H'0006' 352RA7 EQU H'0007' 353 354 355;----- DDRB Bits ----------------------------------------------------- 356TRISB0 EQU H'0000' 357TRISB1 EQU H'0001' 358TRISB2 EQU H'0002' 359TRISB3 EQU H'0003' 360TRISB4 EQU H'0004' 361TRISB5 EQU H'0005' 362TRISB6 EQU H'0006' 363TRISB7 EQU H'0007' 364 365RB0 EQU H'0000' 366RB1 EQU H'0001' 367RB2 EQU H'0002' 368RB3 EQU H'0003' 369RB4 EQU H'0004' 370RB5 EQU H'0005' 371RB6 EQU H'0006' 372RB7 EQU H'0007' 373 374 375;----- TRISB Bits ----------------------------------------------------- 376TRISB0 EQU H'0000' 377TRISB1 EQU H'0001' 378TRISB2 EQU H'0002' 379TRISB3 EQU H'0003' 380TRISB4 EQU H'0004' 381TRISB5 EQU H'0005' 382TRISB6 EQU H'0006' 383TRISB7 EQU H'0007' 384 385RB0 EQU H'0000' 386RB1 EQU H'0001' 387RB2 EQU H'0002' 388RB3 EQU H'0003' 389RB4 EQU H'0004' 390RB5 EQU H'0005' 391RB6 EQU H'0006' 392RB7 EQU H'0007' 393 394 395;----- DDRC Bits ----------------------------------------------------- 396TRISC0 EQU H'0000' 397TRISC1 EQU H'0001' 398TRISC2 EQU H'0002' 399TRISC3 EQU H'0003' 400TRISC4 EQU H'0004' 401TRISC5 EQU H'0005' 402TRISC6 EQU H'0006' 403TRISC7 EQU H'0007' 404 405RC0 EQU H'0000' 406RC1 EQU H'0001' 407RC2 EQU H'0002' 408RC3 EQU H'0003' 409RC4 EQU H'0004' 410RC5 EQU H'0005' 411RC6 EQU H'0006' 412RC7 EQU H'0007' 413 414 415;----- TRISC Bits ----------------------------------------------------- 416TRISC0 EQU H'0000' 417TRISC1 EQU H'0001' 418TRISC2 EQU H'0002' 419TRISC3 EQU H'0003' 420TRISC4 EQU H'0004' 421TRISC5 EQU H'0005' 422TRISC6 EQU H'0006' 423TRISC7 EQU H'0007' 424 425RC0 EQU H'0000' 426RC1 EQU H'0001' 427RC2 EQU H'0002' 428RC3 EQU H'0003' 429RC4 EQU H'0004' 430RC5 EQU H'0005' 431RC6 EQU H'0006' 432RC7 EQU H'0007' 433 434 435;----- OSCTUNE Bits ----------------------------------------------------- 436PLLEN EQU H'0006' 437INTSRC EQU H'0007' 438 439TUN0 EQU H'0000' 440TUN1 EQU H'0001' 441TUN2 EQU H'0002' 442TUN3 EQU H'0003' 443TUN4 EQU H'0004' 444 445 446;----- PIE1 Bits ----------------------------------------------------- 447TMR1IE EQU H'0000' 448TMR2IE EQU H'0001' 449CCP1IE EQU H'0002' 450SSPIE EQU H'0003' 451TXIE EQU H'0004' 452RCIE EQU H'0005' 453ADIE EQU H'0006' 454 455 456;----- PIR1 Bits ----------------------------------------------------- 457TMR1IF EQU H'0000' 458TMR2IF EQU H'0001' 459CCP1IF EQU H'0002' 460SSPIF EQU H'0003' 461TXIF EQU H'0004' 462RCIF EQU H'0005' 463ADIF EQU H'0006' 464 465 466;----- IPR1 Bits ----------------------------------------------------- 467TMR1IP EQU H'0000' 468TMR2IP EQU H'0001' 469CCP1IP EQU H'0002' 470SSPIP EQU H'0003' 471TXIP EQU H'0004' 472RCIP EQU H'0005' 473ADIP EQU H'0006' 474 475 476;----- PIE2 Bits ----------------------------------------------------- 477CCP2IE EQU H'0000' 478TMR3IE EQU H'0001' 479HLVDIE EQU H'0002' 480BCLIE EQU H'0003' 481EEIE EQU H'0004' 482CMIE EQU H'0006' 483OSCFIE EQU H'0007' 484 485LVDIE EQU H'0002' 486 487 488;----- PIR2 Bits ----------------------------------------------------- 489CCP2IF EQU H'0000' 490TMR3IF EQU H'0001' 491HLVDIF EQU H'0002' 492BCLIF EQU H'0003' 493EEIF EQU H'0004' 494CMIF EQU H'0006' 495OSCFIF EQU H'0007' 496 497LVDIF EQU H'0002' 498 499 500;----- IPR2 Bits ----------------------------------------------------- 501CCP2IP EQU H'0000' 502TMR3IP EQU H'0001' 503HLVDIP EQU H'0002' 504BCLIP EQU H'0003' 505EEIP EQU H'0004' 506CMIP EQU H'0006' 507OSCFIP EQU H'0007' 508 509LVDIP EQU H'0002' 510 511 512;----- EECON1 Bits ----------------------------------------------------- 513RD EQU H'0000' 514WR EQU H'0001' 515WREN EQU H'0002' 516WRERR EQU H'0003' 517FREE EQU H'0004' 518CFGS EQU H'0006' 519EEPGD EQU H'0007' 520 521 522;----- RCSTA Bits ----------------------------------------------------- 523RX9D EQU H'0000' 524OERR EQU H'0001' 525FERR EQU H'0002' 526ADDEN EQU H'0003' 527CREN EQU H'0004' 528SREN EQU H'0005' 529RX9 EQU H'0006' 530SPEN EQU H'0007' 531 532ADEN EQU H'0003' 533 534 535;----- TXSTA Bits ----------------------------------------------------- 536TX9D EQU H'0000' 537TRMT EQU H'0001' 538BRGH EQU H'0002' 539SENDB EQU H'0003' 540SYNC EQU H'0004' 541TXEN EQU H'0005' 542TX9 EQU H'0006' 543CSRC EQU H'0007' 544 545 546;----- T3CON Bits ----------------------------------------------------- 547TMR3ON EQU H'0000' 548TMR3CS EQU H'0001' 549NOT_T3SYNC EQU H'0002' 550T3CCP1 EQU H'0003' 551T3CCP2 EQU H'0006' 552RD16 EQU H'0007' 553 554T3SYNC EQU H'0002' 555T3CKPS0 EQU H'0004' 556T3CKPS1 EQU H'0005' 557 558 559;----- CMCON Bits ----------------------------------------------------- 560CIS EQU H'0003' 561C1INV EQU H'0004' 562C2INV EQU H'0005' 563C1OUT EQU H'0006' 564C2OUT EQU H'0007' 565 566CM0 EQU H'0000' 567CM1 EQU H'0001' 568CM2 EQU H'0002' 569 570 571;----- CVRCON Bits ----------------------------------------------------- 572CVRSS EQU H'0004' 573CVRR EQU H'0005' 574CVROE EQU H'0006' 575CVREN EQU H'0007' 576 577CVR0 EQU H'0000' 578CVR1 EQU H'0001' 579CVR2 EQU H'0002' 580CVR3 EQU H'0003' 581 582 583;----- ECCP1AS Bits ----------------------------------------------------- 584ECCPASE EQU H'0007' 585 586PSSAC0 EQU H'0002' 587PSSAC1 EQU H'0003' 588ECCPAS0 EQU H'0004' 589ECCPAS1 EQU H'0005' 590ECCPAS2 EQU H'0006' 591 592 593;----- ECCPAS Bits ----------------------------------------------------- 594ECCPASE EQU H'0007' 595 596PSSAC0 EQU H'0002' 597PSSAC1 EQU H'0003' 598ECCPAS0 EQU H'0004' 599ECCPAS1 EQU H'0005' 600ECCPAS2 EQU H'0006' 601 602 603;----- ECCP1DEL Bits ----------------------------------------------------- 604PRSEN EQU H'0007' 605 606 607;----- PWM1CON Bits ----------------------------------------------------- 608PRSEN EQU H'0007' 609 610 611;----- BAUDCON Bits ----------------------------------------------------- 612ABDEN EQU H'0000' 613WUE EQU H'0001' 614BRG16 EQU H'0003' 615TXCKP EQU H'0004' 616RXDTP EQU H'0005' 617RCIDL EQU H'0006' 618ABDOVF EQU H'0007' 619 620SCKP EQU H'0004' 621RXCKP EQU H'0005' 622RCMT EQU H'0006' 623 624 625;----- BAUDCTL Bits ----------------------------------------------------- 626ABDEN EQU H'0000' 627WUE EQU H'0001' 628BRG16 EQU H'0003' 629TXCKP EQU H'0004' 630RXDTP EQU H'0005' 631RCIDL EQU H'0006' 632ABDOVF EQU H'0007' 633 634SCKP EQU H'0004' 635RXCKP EQU H'0005' 636RCMT EQU H'0006' 637 638 639;----- CCP2CON Bits ----------------------------------------------------- 640CCP2M0 EQU H'0000' 641CCP2M1 EQU H'0001' 642CCP2M2 EQU H'0002' 643CCP2M3 EQU H'0003' 644CCP2Y EQU H'0004' 645CCP2X EQU H'0005' 646 647DC2B0 EQU H'0004' 648DC2B1 EQU H'0005' 649 650 651;----- CCP1CON Bits ----------------------------------------------------- 652CCP1M0 EQU H'0000' 653CCP1M1 EQU H'0001' 654CCP1M2 EQU H'0002' 655CCP1M3 EQU H'0003' 656CCP1Y EQU H'0004' 657CCP1X EQU H'0005' 658 659DC1B0 EQU H'0004' 660DC1B1 EQU H'0005' 661 662 663;----- ADCON2 Bits ----------------------------------------------------- 664ADFM EQU H'0007' 665 666ADCS0 EQU H'0000' 667ADCS1 EQU H'0001' 668ADCS2 EQU H'0002' 669ACQT0 EQU H'0003' 670ACQT1 EQU H'0004' 671ACQT2 EQU H'0005' 672 673 674;----- ADCON1 Bits ----------------------------------------------------- 675PCFG0 EQU H'0000' 676PCFG1 EQU H'0001' 677PCFG2 EQU H'0002' 678PCFG3 EQU H'0003' 679VCFG0 EQU H'0004' 680VCFG1 EQU H'0005' 681 682 683;----- ADCON0 Bits ----------------------------------------------------- 684ADON EQU H'0000' 685GO_NOT_DONE EQU H'0001' 686 687GO EQU H'0001' 688CHS0 EQU H'0002' 689CHS1 EQU H'0003' 690CHS2 EQU H'0004' 691CHS3 EQU H'0005' 692 693DONE EQU H'0001' 694 695NOT_DONE EQU H'0001' 696 697GO_DONE EQU H'0001' 698 699 700;----- SSPCON2 Bits ----------------------------------------------------- 701SEN EQU H'0000' 702RSEN EQU H'0001' 703PEN EQU H'0002' 704RCEN EQU H'0003' 705ACKEN EQU H'0004' 706ACKDT EQU H'0005' 707ACKSTAT EQU H'0006' 708GCEN EQU H'0007' 709 710 711;----- SSPCON1 Bits ----------------------------------------------------- 712CKP EQU H'0004' 713SSPEN EQU H'0005' 714SSPOV EQU H'0006' 715WCOL EQU H'0007' 716 717SSPM0 EQU H'0000' 718SSPM1 EQU H'0001' 719SSPM2 EQU H'0002' 720SSPM3 EQU H'0003' 721 722 723;----- SSPSTAT Bits ----------------------------------------------------- 724BF EQU H'0000' 725UA EQU H'0001' 726R_NOT_W EQU H'0002' 727S EQU H'0003' 728P EQU H'0004' 729D_NOT_A EQU H'0005' 730CKE EQU H'0006' 731SMP EQU H'0007' 732 733R EQU H'0002' 734D EQU H'0005' 735 736 737NOT_W EQU H'0002' 738NOT_A EQU H'0005' 739 740R_W EQU H'0002' 741D_A EQU H'0005' 742 743NOT_WRITE EQU H'0002' 744NOT_ADDRESS EQU H'0005' 745 746 747;----- T2CON Bits ----------------------------------------------------- 748TMR2ON EQU H'0002' 749 750T2CKPS0 EQU H'0000' 751T2CKPS1 EQU H'0001' 752T2OUTPS0 EQU H'0003' 753T2OUTPS1 EQU H'0004' 754T2OUTPS2 EQU H'0005' 755T2OUTPS3 EQU H'0006' 756 757 758;----- T1CON Bits ----------------------------------------------------- 759TMR1ON EQU H'0000' 760TMR1CS EQU H'0001' 761NOT_T1SYNC EQU H'0002' 762T1OSCEN EQU H'0003' 763T1RUN EQU H'0006' 764RD16 EQU H'0007' 765 766T1SYNC EQU H'0002' 767T1CKPS0 EQU H'0004' 768T1CKPS1 EQU H'0005' 769 770 771;----- RCON Bits ----------------------------------------------------- 772NOT_BOR EQU H'0000' 773NOT_POR EQU H'0001' 774NOT_PD EQU H'0002' 775NOT_TO EQU H'0003' 776NOT_RI EQU H'0004' 777SBOREN EQU H'0006' 778IPEN EQU H'0007' 779 780BOR EQU H'0000' 781POR EQU H'0001' 782PD EQU H'0002' 783TO EQU H'0003' 784RI EQU H'0004' 785 786 787;----- WDTCON Bits ----------------------------------------------------- 788SWDTEN EQU H'0000' 789 790SWDTE EQU H'0000' 791 792 793;----- HLVDCON Bits ----------------------------------------------------- 794HLVDEN EQU H'0004' 795IVRST EQU H'0005' 796VDIRMAG EQU H'0007' 797 798HLVDL0 EQU H'0000' 799HLVDL1 EQU H'0001' 800HLVDL2 EQU H'0002' 801HLVDL3 EQU H'0003' 802 803LVDL0 EQU H'0000' 804LVDL1 EQU H'0001' 805LVDL2 EQU H'0002' 806LVDL3 EQU H'0003' 807LVDEN EQU H'0004' 808IRVST EQU H'0005' 809 810LVV0 EQU H'0000' 811LVV1 EQU H'0001' 812LVV2 EQU H'0002' 813LVV3 EQU H'0003' 814BGST EQU H'0005' 815 816 817;----- LVDCON Bits ----------------------------------------------------- 818HLVDEN EQU H'0004' 819IVRST EQU H'0005' 820VDIRMAG EQU H'0007' 821 822HLVDL0 EQU H'0000' 823HLVDL1 EQU H'0001' 824HLVDL2 EQU H'0002' 825HLVDL3 EQU H'0003' 826 827LVDL0 EQU H'0000' 828LVDL1 EQU H'0001' 829LVDL2 EQU H'0002' 830LVDL3 EQU H'0003' 831LVDEN EQU H'0004' 832IRVST EQU H'0005' 833 834LVV0 EQU H'0000' 835LVV1 EQU H'0001' 836LVV2 EQU H'0002' 837LVV3 EQU H'0003' 838BGST EQU H'0005' 839 840 841;----- OSCCON Bits ----------------------------------------------------- 842IOFS EQU H'0002' 843OSTS EQU H'0003' 844IDLEN EQU H'0007' 845 846SCS0 EQU H'0000' 847SCS1 EQU H'0001' 848IRCF0 EQU H'0004' 849IRCF1 EQU H'0005' 850IRCF2 EQU H'0006' 851 852 853;----- T0CON Bits ----------------------------------------------------- 854PSA EQU H'0003' 855T0SE EQU H'0004' 856T0CS EQU H'0005' 857T08BIT EQU H'0006' 858TMR0ON EQU H'0007' 859 860T0PS0 EQU H'0000' 861T0PS1 EQU H'0001' 862T0PS2 EQU H'0002' 863T016BIT EQU H'0006' 864 865 866;----- STATUS Bits ----------------------------------------------------- 867C EQU H'0000' 868DC EQU H'0001' 869Z EQU H'0002' 870OV EQU H'0003' 871N EQU H'0004' 872 873 874;----- INTCON3 Bits ----------------------------------------------------- 875INT1IF EQU H'0000' 876INT2IF EQU H'0001' 877INT1IE EQU H'0003' 878INT2IE EQU H'0004' 879INT1IP EQU H'0006' 880INT2IP EQU H'0007' 881 882INT1F EQU H'0000' 883INT2F EQU H'0001' 884INT1E EQU H'0003' 885INT2E EQU H'0004' 886INT1P EQU H'0006' 887INT2P EQU H'0007' 888 889 890;----- INTCON2 Bits ----------------------------------------------------- 891RBIP EQU H'0000' 892TMR0IP EQU H'0002' 893INTEDG2 EQU H'0004' 894INTEDG1 EQU H'0005' 895INTEDG0 EQU H'0006' 896NOT_RBPU EQU H'0007' 897 898RBPU EQU H'0007' 899 900 901;----- INTCON Bits ----------------------------------------------------- 902RBIF EQU H'0000' 903INT0IF EQU H'0001' 904TMR0IF EQU H'0002' 905RBIE EQU H'0003' 906INT0IE EQU H'0004' 907TMR0IE EQU H'0005' 908PEIE_GIEL EQU H'0006' 909GIE_GIEH EQU H'0007' 910 911INT0F EQU H'0001' 912T0IF EQU H'0002' 913INT0E EQU H'0004' 914T0IE EQU H'0005' 915PEIE EQU H'0006' 916GIE EQU H'0007' 917 918GIEL EQU H'0006' 919GIEH EQU H'0007' 920 921 922;----- STKPTR Bits ----------------------------------------------------- 923STKUNF EQU H'0006' 924STKFUL EQU H'0007' 925 926STKPTR0 EQU H'0000' 927STKPTR1 EQU H'0001' 928STKPTR2 EQU H'0002' 929STKPTR3 EQU H'0003' 930STKPTR4 EQU H'0004' 931STKOVF EQU H'0007' 932 933SP0 EQU H'0000' 934SP1 EQU H'0001' 935SP2 EQU H'0002' 936SP3 EQU H'0003' 937SP4 EQU H'0004' 938 939 940 941;========================================================================== 942; 943; RAM Definitions 944; 945;========================================================================== 946 __MAXRAM H'0FFF' 947 __BADRAM H'0F83' 948 __BADRAM H'0F85'-H'0F88' 949 __BADRAM H'0F8C'-H'0F91' 950 __BADRAM H'0F95'-H'0F9A' 951 __BADRAM H'0F9C' 952 __BADRAM H'0FA3'-H'0FA5' 953 __BADRAM H'0FB9' 954 __BADRAM H'0FD4' 955 956;========================================================================== 957; 958; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been 959; superseded by the CONFIG directive. The following settings 960; are available for this device. 961; 962; Oscillator Selection bits: 963; OSC = LP LP oscillator 964; OSC = XT XT oscillator 965; OSC = HS HS oscillator 966; OSC = RC External RC oscillator, CLKO function on RA6 967; OSC = EC EC oscillator, CLKOUT function on RA6 968; OSC = ECIO6 EC oscillator, port function on RA6 969; OSC = HSPLL HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) 970; OSC = RCIO6 External RC oscillator, port function on RA6 971; OSC = INTIO67 Internal oscillator block, port function on RA6 and RA7 972; OSC = INTIO7 Internal oscillator block, CLKOUT function on RA6, port function on RA7 973; 974; Fail-Safe Clock Monitor Enable bit: 975; FCMEN = OFF Fail-Safe Clock Monitor disabled 976; FCMEN = ON Fail-Safe Clock Monitor enabled 977; 978; Internal/External Oscillator Switchover bit: 979; IESO = OFF Oscillator Switchover mode disabled 980; IESO = ON Oscillator Switchover mode enabled 981; 982; Power-up Timer Enable bit: 983; PWRT = ON PWRT enabled 984; PWRT = OFF PWRT disabled 985; 986; Brown-out Reset Enable bits: 987; BOREN = OFF Brown-out Reset disabled in hardware and software 988; BOREN = ON Brown-out Reset enabled and controlled by software (SBOREN is enabled) 989; BOREN = NOSLP Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) 990; BOREN = SBORDIS Brown-out Reset enabled in hardware only (SBOREN is disabled) 991; 992; Brown Out Reset Voltage bits: 993; BORV = 0 Maximum setting 994; BORV = 1 995; BORV = 2 996; BORV = 3 Minimum setting 997; 998; Watchdog Timer Enable bit: 999; WDT = OFF WDT disabled (control is placed on the SWDTEN bit) 1000; WDT = ON WDT enabled 1001; 1002; Watchdog Timer Postscale Select bits: 1003; WDTPS = 1 1:1 1004; WDTPS = 2 1:2 1005; WDTPS = 4 1:4 1006; WDTPS = 8 1:8 1007; WDTPS = 16 1:16 1008; WDTPS = 32 1:32 1009; WDTPS = 64 1:64 1010; WDTPS = 128 1:128 1011; WDTPS = 256 1:256 1012; WDTPS = 512 1:512 1013; WDTPS = 1024 1:1024 1014; WDTPS = 2048 1:2048 1015; WDTPS = 4096 1:4096 1016; WDTPS = 8192 1:8192 1017; WDTPS = 16384 1:16384 1018; WDTPS = 32768 1:32768 1019; 1020; CCP2 MUX bit: 1021; CCP2MX = PORTBE CCP2 input/output is multiplexed with RB3 1022; CCP2MX = PORTC CCP2 input/output is multiplexed with RC1 1023; 1024; PORTB A/D Enable bit: 1025; PBADEN = OFF PORTB<4:0> pins are configured as digital I/O on Reset 1026; PBADEN = ON PORTB<4:0> pins are configured as analog input channels on Reset 1027; 1028; Low-Power Timer1 Oscillator Enable bit: 1029; LPT1OSC = OFF Timer1 configured for higher power operation 1030; LPT1OSC = ON Timer1 configured for low-power operation 1031; 1032; MCLR Pin Enable bit: 1033; MCLRE = OFF RE3 input pin enabled; MCLR disabled 1034; MCLRE = ON MCLR pin enabled; RE3 input pin disabled 1035; 1036; Stack Full/Underflow Reset Enable bit: 1037; STVREN = OFF Stack full/underflow will not cause Reset 1038; STVREN = ON Stack full/underflow will cause Reset 1039; 1040; Single-Supply ICSP Enable bit: 1041; LVP = OFF Single-Supply ICSP disabled 1042; LVP = ON Single-Supply ICSP enabled 1043; 1044; Extended Instruction Set Enable bit: 1045; XINST = OFF Instruction set extension and Indexed Addressing mode disabled (Legacy mode) 1046; XINST = ON Instruction set extension and Indexed Addressing mode enabled 1047; 1048; Background Debugger Enable bit: 1049; DEBUG = ON Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug 1050; DEBUG = OFF Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins 1051; 1052; Code Protection bit: 1053; CP0 = ON Block 0 (000800-003FFFh) code-protected 1054; CP0 = OFF Block 0 (000800-003FFFh) not code-protected 1055; 1056; Code Protection bit: 1057; CP1 = ON Block 1 (004000-007FFFh) code-protected 1058; CP1 = OFF Block 1 (004000-007FFFh) not code-protected 1059; 1060; Code Protection bit: 1061; CP2 = ON Block 2 (008000-00BFFFh) code-protected 1062; CP2 = OFF Block 2 (008000-00BFFFh) not code-protected 1063; 1064; Code Protection bit: 1065; CP3 = ON Block 3 (00C000-00FFFFh) code-protected 1066; CP3 = OFF Block 3 (00C000-00FFFFh) not code-protected 1067; 1068; Boot Block Code Protection bit: 1069; CPB = ON Boot block (000000-0007FFh) code-protected 1070; CPB = OFF Boot block (000000-0007FFh) not code-protected 1071; 1072; Data EEPROM Code Protection bit: 1073; CPD = ON Data EEPROM code-protected 1074; CPD = OFF Data EEPROM not code-protected 1075; 1076; Write Protection bit: 1077; WRT0 = ON Block 0 (000800-003FFFh) write-protected 1078; WRT0 = OFF Block 0 (000800-003FFFh) not write-protected 1079; 1080; Write Protection bit: 1081; WRT1 = ON Block 1 (004000-007FFFh) write-protected 1082; WRT1 = OFF Block 1 (004000-007FFFh) not write-protected 1083; 1084; Write Protection bit: 1085; WRT2 = ON Block 2 (008000-00BFFFh) write-protected 1086; WRT2 = OFF Block 2 (008000-00BFFFh) not write-protected 1087; 1088; Write Protection bit: 1089; WRT3 = ON Block 3 (00C000-00FFFFh) write-protected 1090; WRT3 = OFF Block 3 (00C000-00FFFFh) not write-protected 1091; 1092; Configuration Register Write Protection bit: 1093; WRTC = ON Configuration registers (300000-3000FFh) write-protected 1094; WRTC = OFF Configuration registers (300000-3000FFh) not write-protected 1095; 1096; Boot Block Write Protection bit: 1097; WRTB = ON Boot Block (000000-0007FFh) write-protected 1098; WRTB = OFF Boot Block (000000-0007FFh) not write-protected 1099; 1100; Data EEPROM Write Protection bit: 1101; WRTD = ON Data EEPROM write-protected 1102; WRTD = OFF Data EEPROM not write-protected 1103; 1104; Table Read Protection bit: 1105; EBTR0 = ON Block 0 (000800-003FFFh) protected from table reads executed in other blocks 1106; EBTR0 = OFF Block 0 (000800-003FFFh) not protected from table reads executed in other blocks 1107; 1108; Table Read Protection bit: 1109; EBTR1 = ON Block 1 (004000-007FFFh) protected from table reads executed in other blocks 1110; EBTR1 = OFF Block 1 (004000-007FFFh) not protected from table reads executed in other blocks 1111; 1112; Table Read Protection bit: 1113; EBTR2 = ON Block 2 (008000-00BFFFh) protected from table reads executed in other blocks 1114; EBTR2 = OFF Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks 1115; 1116; Table Read Protection bit: 1117; EBTR3 = ON Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks 1118; EBTR3 = OFF Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks 1119; 1120; Boot Block Table Read Protection bit: 1121; EBTRB = ON Boot Block (000000-0007FFh) protected from table reads executed in other blocks 1122; EBTRB = OFF Boot Block (000000-0007FFh) not protected from table reads executed in other blocks 1123; 1124;========================================================================== 1125;========================================================================== 1126; 1127; Configuration Bits 1128; 1129; NAME Address 1130; CONFIG1H 300001h 1131; CONFIG2L 300002h 1132; CONFIG2H 300003h 1133; CONFIG3H 300005h 1134; CONFIG4L 300006h 1135; CONFIG5L 300008h 1136; CONFIG5H 300009h 1137; CONFIG6L 30000Ah 1138; CONFIG6H 30000Bh 1139; CONFIG7L 30000Ch 1140; CONFIG7H 30000Dh 1141; 1142;========================================================================== 1143 1144; The following is an assignment of address values for all of the 1145; configuration registers for the purpose of table reads 1146_CONFIG1H EQU H'300001' 1147_CONFIG2L EQU H'300002' 1148_CONFIG2H EQU H'300003' 1149_CONFIG3H EQU H'300005' 1150_CONFIG4L EQU H'300006' 1151_CONFIG5L EQU H'300008' 1152_CONFIG5H EQU H'300009' 1153_CONFIG6L EQU H'30000A' 1154_CONFIG6H EQU H'30000B' 1155_CONFIG7L EQU H'30000C' 1156_CONFIG7H EQU H'30000D' 1157 1158;----- CONFIG1H Options -------------------------------------------------- 1159_OSC_LP_1H EQU H'F0'; LP oscillator 1160_OSC_XT_1H EQU H'F1'; XT oscillator 1161_OSC_HS_1H EQU H'F2'; HS oscillator 1162_OSC_RC_1H EQU H'F3'; External RC oscillator, CLKO function on RA6 1163_OSC_EC_1H EQU H'F4'; EC oscillator, CLKOUT function on RA6 1164_OSC_ECIO6_1H EQU H'F5'; EC oscillator, port function on RA6 1165_OSC_HSPLL_1H EQU H'F6'; HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) 1166_OSC_RCIO6_1H EQU H'F7'; External RC oscillator, port function on RA6 1167_OSC_INTIO67_1H EQU H'F8'; Internal oscillator block, port function on RA6 and RA7 1168_OSC_INTIO7_1H EQU H'F9'; Internal oscillator block, CLKOUT function on RA6, port function on RA7 1169 1170_FCMEN_OFF_1H EQU H'BF'; Fail-Safe Clock Monitor disabled 1171_FCMEN_ON_1H EQU H'FF'; Fail-Safe Clock Monitor enabled 1172 1173_IESO_OFF_1H EQU H'7F'; Oscillator Switchover mode disabled 1174_IESO_ON_1H EQU H'FF'; Oscillator Switchover mode enabled 1175 1176;----- CONFIG2L Options -------------------------------------------------- 1177_PWRT_ON_2L EQU H'FE'; PWRT enabled 1178_PWRT_OFF_2L EQU H'FF'; PWRT disabled 1179 1180_BOREN_OFF_2L EQU H'F9'; Brown-out Reset disabled in hardware and software 1181_BOREN_ON_2L EQU H'FB'; Brown-out Reset enabled and controlled by software (SBOREN is enabled) 1182_BOREN_NOSLP_2L EQU H'FD'; Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled) 1183_BOREN_SBORDIS_2L EQU H'FF'; Brown-out Reset enabled in hardware only (SBOREN is disabled) 1184 1185_BORV_0_2L EQU H'E7'; Maximum setting 1186_BORV_1_2L EQU H'EF' 1187_BORV_2_2L EQU H'F7' 1188_BORV_3_2L EQU H'FF'; Minimum setting 1189 1190;----- CONFIG2H Options -------------------------------------------------- 1191_WDT_OFF_2H EQU H'FE'; WDT disabled (control is placed on the SWDTEN bit) 1192_WDT_ON_2H EQU H'FF'; WDT enabled 1193 1194_WDTPS_1_2H EQU H'E1'; 1:1 1195_WDTPS_2_2H EQU H'E3'; 1:2 1196_WDTPS_4_2H EQU H'E5'; 1:4 1197_WDTPS_8_2H EQU H'E7'; 1:8 1198_WDTPS_16_2H EQU H'E9'; 1:16 1199_WDTPS_32_2H EQU H'EB'; 1:32 1200_WDTPS_64_2H EQU H'ED'; 1:64 1201_WDTPS_128_2H EQU H'EF'; 1:128 1202_WDTPS_256_2H EQU H'F1'; 1:256 1203_WDTPS_512_2H EQU H'F3'; 1:512 1204_WDTPS_1024_2H EQU H'F5'; 1:1024 1205_WDTPS_2048_2H EQU H'F7'; 1:2048 1206_WDTPS_4096_2H EQU H'F9'; 1:4096 1207_WDTPS_8192_2H EQU H'FB'; 1:8192 1208_WDTPS_16384_2H EQU H'FD'; 1:16384 1209_WDTPS_32768_2H EQU H'FF'; 1:32768 1210 1211;----- CONFIG3H Options -------------------------------------------------- 1212_CCP2MX_PORTBE_3H EQU H'FE'; CCP2 input/output is multiplexed with RB3 1213_CCP2MX_PORTC_3H EQU H'FF'; CCP2 input/output is multiplexed with RC1 1214 1215_PBADEN_OFF_3H EQU H'FD'; PORTB<4:0> pins are configured as digital I/O on Reset 1216_PBADEN_ON_3H EQU H'FF'; PORTB<4:0> pins are configured as analog input channels on Reset 1217 1218_LPT1OSC_OFF_3H EQU H'FB'; Timer1 configured for higher power operation 1219_LPT1OSC_ON_3H EQU H'FF'; Timer1 configured for low-power operation 1220 1221_MCLRE_OFF_3H EQU H'7F'; RE3 input pin enabled; MCLR disabled 1222_MCLRE_ON_3H EQU H'FF'; MCLR pin enabled; RE3 input pin disabled 1223 1224;----- CONFIG4L Options -------------------------------------------------- 1225_STVREN_OFF_4L EQU H'FE'; Stack full/underflow will not cause Reset 1226_STVREN_ON_4L EQU H'FF'; Stack full/underflow will cause Reset 1227 1228_LVP_OFF_4L EQU H'FB'; Single-Supply ICSP disabled 1229_LVP_ON_4L EQU H'FF'; Single-Supply ICSP enabled 1230 1231_XINST_OFF_4L EQU H'BF'; Instruction set extension and Indexed Addressing mode disabled (Legacy mode) 1232_XINST_ON_4L EQU H'FF'; Instruction set extension and Indexed Addressing mode enabled 1233 1234_DEBUG_ON_4L EQU H'7F'; Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug 1235_DEBUG_OFF_4L EQU H'FF'; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins 1236 1237;----- CONFIG5L Options -------------------------------------------------- 1238_CP0_ON_5L EQU H'FE'; Block 0 (000800-003FFFh) code-protected 1239_CP0_OFF_5L EQU H'FF'; Block 0 (000800-003FFFh) not code-protected 1240 1241_CP1_ON_5L EQU H'FD'; Block 1 (004000-007FFFh) code-protected 1242_CP1_OFF_5L EQU H'FF'; Block 1 (004000-007FFFh) not code-protected 1243 1244_CP2_ON_5L EQU H'FB'; Block 2 (008000-00BFFFh) code-protected 1245_CP2_OFF_5L EQU H'FF'; Block 2 (008000-00BFFFh) not code-protected 1246 1247_CP3_ON_5L EQU H'F7'; Block 3 (00C000-00FFFFh) code-protected 1248_CP3_OFF_5L EQU H'FF'; Block 3 (00C000-00FFFFh) not code-protected 1249 1250;----- CONFIG5H Options -------------------------------------------------- 1251_CPB_ON_5H EQU H'BF'; Boot block (000000-0007FFh) code-protected 1252_CPB_OFF_5H EQU H'FF'; Boot block (000000-0007FFh) not code-protected 1253 1254_CPD_ON_5H EQU H'7F'; Data EEPROM code-protected 1255_CPD_OFF_5H EQU H'FF'; Data EEPROM not code-protected 1256 1257;----- CONFIG6L Options -------------------------------------------------- 1258_WRT0_ON_6L EQU H'FE'; Block 0 (000800-003FFFh) write-protected 1259_WRT0_OFF_6L EQU H'FF'; Block 0 (000800-003FFFh) not write-protected 1260 1261_WRT1_ON_6L EQU H'FD'; Block 1 (004000-007FFFh) write-protected 1262_WRT1_OFF_6L EQU H'FF'; Block 1 (004000-007FFFh) not write-protected 1263 1264_WRT2_ON_6L EQU H'FB'; Block 2 (008000-00BFFFh) write-protected 1265_WRT2_OFF_6L EQU H'FF'; Block 2 (008000-00BFFFh) not write-protected 1266 1267_WRT3_ON_6L EQU H'F7'; Block 3 (00C000-00FFFFh) write-protected 1268_WRT3_OFF_6L EQU H'FF'; Block 3 (00C000-00FFFFh) not write-protected 1269 1270;----- CONFIG6H Options -------------------------------------------------- 1271_WRTC_ON_6H EQU H'DF'; Configuration registers (300000-3000FFh) write-protected 1272_WRTC_OFF_6H EQU H'FF'; Configuration registers (300000-3000FFh) not write-protected 1273 1274_WRTB_ON_6H EQU H'BF'; Boot Block (000000-0007FFh) write-protected 1275_WRTB_OFF_6H EQU H'FF'; Boot Block (000000-0007FFh) not write-protected 1276 1277_WRTD_ON_6H EQU H'7F'; Data EEPROM write-protected 1278_WRTD_OFF_6H EQU H'FF'; Data EEPROM not write-protected 1279 1280;----- CONFIG7L Options -------------------------------------------------- 1281_EBTR0_ON_7L EQU H'FE'; Block 0 (000800-003FFFh) protected from table reads executed in other blocks 1282_EBTR0_OFF_7L EQU H'FF'; Block 0 (000800-003FFFh) not protected from table reads executed in other blocks 1283 1284_EBTR1_ON_7L EQU H'FD'; Block 1 (004000-007FFFh) protected from table reads executed in other blocks 1285_EBTR1_OFF_7L EQU H'FF'; Block 1 (004000-007FFFh) not protected from table reads executed in other blocks 1286 1287_EBTR2_ON_7L EQU H'FB'; Block 2 (008000-00BFFFh) protected from table reads executed in other blocks 1288_EBTR2_OFF_7L EQU H'FF'; Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks 1289 1290_EBTR3_ON_7L EQU H'F7'; Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks 1291_EBTR3_OFF_7L EQU H'FF'; Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks 1292 1293;----- CONFIG7H Options -------------------------------------------------- 1294_EBTRB_ON_7H EQU H'BF'; Boot Block (000000-0007FFh) protected from table reads executed in other blocks 1295_EBTRB_OFF_7H EQU H'FF'; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks 1296 1297 1298;----- DEVID Equates -------------------------------------------------- 1299_DEVID1 EQU H'3FFFFE' 1300_DEVID2 EQU H'3FFFFF' 1301 1302;----- IDLOC Equates -------------------------------------------------- 1303_IDLOC0 EQU H'200000' 1304_IDLOC1 EQU H'200001' 1305_IDLOC2 EQU H'200002' 1306_IDLOC3 EQU H'200003' 1307_IDLOC4 EQU H'200004' 1308_IDLOC5 EQU H'200005' 1309_IDLOC6 EQU H'200006' 1310_IDLOC7 EQU H'200007' 1311 1312 LIST 1313