1 LIST 2 3;========================================================================== 4; Build date : Oct 21 2015 5; MPASM PIC18LF252 processor include 6; 7; (c) Copyright 1999-2015 Microchip Technology, All rights reserved 8;========================================================================== 9 10 NOLIST 11 12;========================================================================== 13; This header file defines configurations, registers, and other useful 14; bits of information for the PIC18LF252 microcontroller. These names 15; are taken to match the data sheets as closely as possible. 16; 17; Note that the processor must be selected before this file is included. 18; The processor may be selected the following ways: 19; 20; 1. Command line switch: 21; C:\MPASM MYFILE.ASM /PIC18LF252 22; 2. LIST directive in the source file 23; LIST P=PIC18LF252 24; 3. Processor Type entry in the MPASM full-screen interface 25; 4. Setting the processor in the MPLAB Project Dialog 26;========================================================================== 27 28;========================================================================== 29; 30; Verify Processor 31; 32;========================================================================== 33 IFNDEF __18LF252 34 MESSG "Processor-header file mismatch. Verify selected processor." 35 ENDIF 36 37;========================================================================== 38; 18xxxx Family EQUates 39;========================================================================== 40FSR0 EQU 0 41FSR1 EQU 1 42FSR2 EQU 2 43 44FAST EQU 1 45 46W EQU 0 47A EQU 0 48ACCESS EQU 0 49BANKED EQU 1 50;========================================================================== 51 52;========================================================================== 53; 16Cxxx/17Cxxx Substitutions 54;========================================================================== 55 #define DDRA TRISA ; PIC17Cxxx SFR substitution 56 #define DDRB TRISB ; PIC17Cxxx SFR substitution 57 #define DDRC TRISC ; PIC17Cxxx SFR substitution 58 #define DDRD TRISD ; PIC17Cxxx SFR substitution 59 #define DDRE TRISE ; PIC17Cxxx SFR substitution 60 61;========================================================================== 62; 63; Register Definitions 64; 65;========================================================================== 66 67;----- Register Files ----------------------------------------------------- 68PORTA EQU H'0F80' 69PORTB EQU H'0F81' 70PORTC EQU H'0F82' 71LATA EQU H'0F89' 72LATB EQU H'0F8A' 73LATC EQU H'0F8B' 74DDRA EQU H'0F92' 75TRISA EQU H'0F92' 76DDRB EQU H'0F93' 77TRISB EQU H'0F93' 78DDRC EQU H'0F94' 79TRISC EQU H'0F94' 80PIE1 EQU H'0F9D' 81PIR1 EQU H'0F9E' 82IPR1 EQU H'0F9F' 83PIE2 EQU H'0FA0' 84PIR2 EQU H'0FA1' 85IPR2 EQU H'0FA2' 86EECON1 EQU H'0FA6' 87EECON2 EQU H'0FA7' 88EEDATA EQU H'0FA8' 89EEADR EQU H'0FA9' 90RCSTA EQU H'0FAB' 91TXSTA EQU H'0FAC' 92TXREG EQU H'0FAD' 93RCREG EQU H'0FAE' 94SPBRG EQU H'0FAF' 95T3CON EQU H'0FB1' 96TMR3 EQU H'0FB2' 97TMR3L EQU H'0FB2' 98TMR3H EQU H'0FB3' 99CCP2CON EQU H'0FBA' 100CCPR2 EQU H'0FBB' 101CCPR2L EQU H'0FBB' 102CCPR2H EQU H'0FBC' 103CCP1CON EQU H'0FBD' 104CCPR1 EQU H'0FBE' 105CCPR1L EQU H'0FBE' 106CCPR1H EQU H'0FBF' 107ADCON1 EQU H'0FC1' 108ADCON0 EQU H'0FC2' 109ADRES EQU H'0FC3' 110ADRESL EQU H'0FC3' 111ADRESH EQU H'0FC4' 112SSPCON2 EQU H'0FC5' 113SSPCON1 EQU H'0FC6' 114SSPSTAT EQU H'0FC7' 115SSPADD EQU H'0FC8' 116SSPBUF EQU H'0FC9' 117T2CON EQU H'0FCA' 118PR2 EQU H'0FCB' 119TMR2 EQU H'0FCC' 120T1CON EQU H'0FCD' 121TMR1 EQU H'0FCE' 122TMR1L EQU H'0FCE' 123TMR1H EQU H'0FCF' 124RCON EQU H'0FD0' 125WDTCON EQU H'0FD1' 126LVDCON EQU H'0FD2' 127OSCCON EQU H'0FD3' 128T0CON EQU H'0FD5' 129TMR0 EQU H'0FD6' 130TMR0L EQU H'0FD6' 131TMR0H EQU H'0FD7' 132STATUS EQU H'0FD8' 133FSR2L EQU H'0FD9' 134FSR2H EQU H'0FDA' 135PLUSW2 EQU H'0FDB' 136PREINC2 EQU H'0FDC' 137POSTDEC2 EQU H'0FDD' 138POSTINC2 EQU H'0FDE' 139INDF2 EQU H'0FDF' 140BSR EQU H'0FE0' 141FSR1L EQU H'0FE1' 142FSR1H EQU H'0FE2' 143PLUSW1 EQU H'0FE3' 144PREINC1 EQU H'0FE4' 145POSTDEC1 EQU H'0FE5' 146POSTINC1 EQU H'0FE6' 147INDF1 EQU H'0FE7' 148WREG EQU H'0FE8' 149FSR0L EQU H'0FE9' 150FSR0H EQU H'0FEA' 151PLUSW0 EQU H'0FEB' 152PREINC0 EQU H'0FEC' 153POSTDEC0 EQU H'0FED' 154POSTINC0 EQU H'0FEE' 155INDF0 EQU H'0FEF' 156INTCON3 EQU H'0FF0' 157INTCON2 EQU H'0FF1' 158INTCON EQU H'0FF2' 159INTCON1 EQU H'0FF2' 160PROD EQU H'0FF3' 161PRODL EQU H'0FF3' 162PRODH EQU H'0FF4' 163TABLAT EQU H'0FF5' 164TBLPTR EQU H'0FF6' 165TBLPTRL EQU H'0FF6' 166TBLPTRH EQU H'0FF7' 167TBLPTRU EQU H'0FF8' 168PC EQU H'0FF9' 169PCL EQU H'0FF9' 170PCLATH EQU H'0FFA' 171PCLATU EQU H'0FFB' 172STKPTR EQU H'0FFC' 173TOS EQU H'0FFD' 174TOSL EQU H'0FFD' 175TOSH EQU H'0FFE' 176TOSU EQU H'0FFF' 177 178;----- PORTA Bits ----------------------------------------------------- 179RA0 EQU H'0000' 180RA1 EQU H'0001' 181RA2 EQU H'0002' 182RA3 EQU H'0003' 183RA4 EQU H'0004' 184RA5 EQU H'0005' 185RA6 EQU H'0006' 186 187AN0 EQU H'0000' 188AN1 EQU H'0001' 189AN2 EQU H'0002' 190AN3 EQU H'0003' 191AN4 EQU H'0005' 192OSC2 EQU H'0006' 193 194VREFM EQU H'0002' 195VREFP EQU H'0003' 196T0CKI EQU H'0004' 197SS EQU H'0005' 198CLKO EQU H'0006' 199 200LVDIN EQU H'0005' 201 202 203;----- PORTB Bits ----------------------------------------------------- 204RB0 EQU H'0000' 205RB1 EQU H'0001' 206RB2 EQU H'0002' 207RB3 EQU H'0003' 208RB4 EQU H'0004' 209RB5 EQU H'0005' 210RB6 EQU H'0006' 211RB7 EQU H'0007' 212 213INT0 EQU H'0000' 214INT1 EQU H'0001' 215INT2 EQU H'0002' 216CCP2_PORTB EQU H'0003' 217PGM EQU H'0005' 218PGC EQU H'0006' 219PGD EQU H'0007' 220 221CCP2A EQU H'0003' 222 223 224;----- PORTC Bits ----------------------------------------------------- 225RC0 EQU H'0000' 226RC1 EQU H'0001' 227RC2 EQU H'0002' 228RC3 EQU H'0003' 229RC4 EQU H'0004' 230RC5 EQU H'0005' 231RC6 EQU H'0006' 232RC7 EQU H'0007' 233 234T1OSO EQU H'0000' 235T1OSI EQU H'0001' 236SCK EQU H'0003' 237SDI EQU H'0004' 238SDO EQU H'0005' 239TX EQU H'0006' 240RX EQU H'0007' 241 242T1CKI EQU H'0000' 243CCP2_PORTC EQU H'0001' 244CCP1 EQU H'0002' 245SCL EQU H'0003' 246SDA EQU H'0004' 247CK EQU H'0006' 248; DT is a reserved word 249; DT EQU H'0007' 250 251 252;----- LATA Bits ----------------------------------------------------- 253LATA0 EQU H'0000' 254LATA1 EQU H'0001' 255LATA2 EQU H'0002' 256LATA3 EQU H'0003' 257LATA4 EQU H'0004' 258LATA5 EQU H'0005' 259LATA6 EQU H'0006' 260 261 262;----- LATB Bits ----------------------------------------------------- 263LATB0 EQU H'0000' 264LATB1 EQU H'0001' 265LATB2 EQU H'0002' 266LATB3 EQU H'0003' 267LATB4 EQU H'0004' 268LATB5 EQU H'0005' 269LATB6 EQU H'0006' 270LATB7 EQU H'0007' 271 272 273;----- LATC Bits ----------------------------------------------------- 274LATC0 EQU H'0000' 275LATC1 EQU H'0001' 276LATC2 EQU H'0002' 277LATC3 EQU H'0003' 278LATC4 EQU H'0004' 279LATC5 EQU H'0005' 280LATC6 EQU H'0006' 281LATC7 EQU H'0007' 282 283 284;----- DDRA Bits ----------------------------------------------------- 285TRISA0 EQU H'0000' 286TRISA1 EQU H'0001' 287TRISA2 EQU H'0002' 288TRISA3 EQU H'0003' 289TRISA4 EQU H'0004' 290TRISA5 EQU H'0005' 291TRISA6 EQU H'0006' 292 293RA0 EQU H'0000' 294RA1 EQU H'0001' 295RA2 EQU H'0002' 296RA3 EQU H'0003' 297RA4 EQU H'0004' 298RA5 EQU H'0005' 299RA6 EQU H'0006' 300 301 302;----- TRISA Bits ----------------------------------------------------- 303TRISA0 EQU H'0000' 304TRISA1 EQU H'0001' 305TRISA2 EQU H'0002' 306TRISA3 EQU H'0003' 307TRISA4 EQU H'0004' 308TRISA5 EQU H'0005' 309TRISA6 EQU H'0006' 310 311RA0 EQU H'0000' 312RA1 EQU H'0001' 313RA2 EQU H'0002' 314RA3 EQU H'0003' 315RA4 EQU H'0004' 316RA5 EQU H'0005' 317RA6 EQU H'0006' 318 319 320;----- DDRB Bits ----------------------------------------------------- 321TRISB0 EQU H'0000' 322TRISB1 EQU H'0001' 323TRISB2 EQU H'0002' 324TRISB3 EQU H'0003' 325TRISB4 EQU H'0004' 326TRISB5 EQU H'0005' 327TRISB6 EQU H'0006' 328TRISB7 EQU H'0007' 329 330RB0 EQU H'0000' 331RB1 EQU H'0001' 332RB2 EQU H'0002' 333RB3 EQU H'0003' 334RB4 EQU H'0004' 335RB5 EQU H'0005' 336RB6 EQU H'0006' 337RB7 EQU H'0007' 338 339CCP2_DDRB EQU H'0003' 340 341 342;----- TRISB Bits ----------------------------------------------------- 343TRISB0 EQU H'0000' 344TRISB1 EQU H'0001' 345TRISB2 EQU H'0002' 346TRISB3 EQU H'0003' 347TRISB4 EQU H'0004' 348TRISB5 EQU H'0005' 349TRISB6 EQU H'0006' 350TRISB7 EQU H'0007' 351 352RB0 EQU H'0000' 353RB1 EQU H'0001' 354RB2 EQU H'0002' 355RB3 EQU H'0003' 356RB4 EQU H'0004' 357RB5 EQU H'0005' 358RB6 EQU H'0006' 359RB7 EQU H'0007' 360 361CCP2_TRISB EQU H'0003' 362 363 364;----- DDRC Bits ----------------------------------------------------- 365TRISC0 EQU H'0000' 366TRISC1 EQU H'0001' 367TRISC2 EQU H'0002' 368TRISC3 EQU H'0003' 369TRISC4 EQU H'0004' 370TRISC5 EQU H'0005' 371TRISC6 EQU H'0006' 372TRISC7 EQU H'0007' 373 374RC0 EQU H'0000' 375RC1 EQU H'0001' 376RC2 EQU H'0002' 377RC3 EQU H'0003' 378RC4 EQU H'0004' 379RC5 EQU H'0005' 380RC6 EQU H'0006' 381RC7 EQU H'0007' 382 383CCP2_DDRC EQU H'0001' 384 385 386;----- TRISC Bits ----------------------------------------------------- 387TRISC0 EQU H'0000' 388TRISC1 EQU H'0001' 389TRISC2 EQU H'0002' 390TRISC3 EQU H'0003' 391TRISC4 EQU H'0004' 392TRISC5 EQU H'0005' 393TRISC6 EQU H'0006' 394TRISC7 EQU H'0007' 395 396RC0 EQU H'0000' 397RC1 EQU H'0001' 398RC2 EQU H'0002' 399RC3 EQU H'0003' 400RC4 EQU H'0004' 401RC5 EQU H'0005' 402RC6 EQU H'0006' 403RC7 EQU H'0007' 404 405CCP2_TRISC EQU H'0001' 406 407 408;----- PIE1 Bits ----------------------------------------------------- 409TMR1IE EQU H'0000' 410TMR2IE EQU H'0001' 411CCP1IE EQU H'0002' 412SSPIE EQU H'0003' 413TXIE EQU H'0004' 414RCIE EQU H'0005' 415ADIE EQU H'0006' 416 417 418;----- PIR1 Bits ----------------------------------------------------- 419TMR1IF EQU H'0000' 420TMR2IF EQU H'0001' 421CCP1IF EQU H'0002' 422SSPIF EQU H'0003' 423TXIF EQU H'0004' 424RCIF EQU H'0005' 425ADIF EQU H'0006' 426 427 428;----- IPR1 Bits ----------------------------------------------------- 429TMR1IP EQU H'0000' 430TMR2IP EQU H'0001' 431CCP1IP EQU H'0002' 432SSPIP EQU H'0003' 433TXIP EQU H'0004' 434RCIP EQU H'0005' 435ADIP EQU H'0006' 436 437 438;----- PIE2 Bits ----------------------------------------------------- 439CCP2IE EQU H'0000' 440TMR3IE EQU H'0001' 441LVDIE EQU H'0002' 442BCLIE EQU H'0003' 443EEIE EQU H'0004' 444 445 446;----- PIR2 Bits ----------------------------------------------------- 447CCP2IF EQU H'0000' 448TMR3IF EQU H'0001' 449LVDIF EQU H'0002' 450BCLIF EQU H'0003' 451EEIF EQU H'0004' 452 453 454;----- IPR2 Bits ----------------------------------------------------- 455CCP2IP EQU H'0000' 456TMR3IP EQU H'0001' 457LVDIP EQU H'0002' 458BCLIP EQU H'0003' 459EEIP EQU H'0004' 460 461 462;----- EECON1 Bits ----------------------------------------------------- 463RD EQU H'0000' 464WR EQU H'0001' 465WREN EQU H'0002' 466WRERR EQU H'0003' 467FREE EQU H'0004' 468CFGS EQU H'0006' 469EEPGD EQU H'0007' 470 471 472;----- RCSTA Bits ----------------------------------------------------- 473RX9D EQU H'0000' 474OERR EQU H'0001' 475FERR EQU H'0002' 476ADDEN EQU H'0003' 477CREN EQU H'0004' 478SREN EQU H'0005' 479RX9 EQU H'0006' 480SPEN EQU H'0007' 481 482RCD8 EQU H'0000' 483RC8_9 EQU H'0006' 484 485NOT_RC8 EQU H'0006' 486 487RC9 EQU H'0006' 488 489 490;----- TXSTA Bits ----------------------------------------------------- 491TX9D EQU H'0000' 492TRMT EQU H'0001' 493BRGH EQU H'0002' 494SYNC EQU H'0004' 495TXEN EQU H'0005' 496TX9 EQU H'0006' 497CSRC EQU H'0007' 498 499TXD8 EQU H'0000' 500TX8_9 EQU H'0006' 501 502NOT_TX8 EQU H'0006' 503 504 505;----- T3CON Bits ----------------------------------------------------- 506TMR3ON EQU H'0000' 507TMR3CS EQU H'0001' 508NOT_T3SYNC EQU H'0002' 509T3CCP1 EQU H'0003' 510T3CCP2 EQU H'0006' 511RD16 EQU H'0007' 512 513T3SYNC EQU H'0002' 514T3CKPS0 EQU H'0004' 515T3CKPS1 EQU H'0005' 516 517T3INSYNC EQU H'0002' 518 519 520;----- CCP2CON Bits ----------------------------------------------------- 521CCP2M0 EQU H'0000' 522CCP2M1 EQU H'0001' 523CCP2M2 EQU H'0002' 524CCP2M3 EQU H'0003' 525DC2B0 EQU H'0004' 526DC2B1 EQU H'0005' 527 528CCP2Y EQU H'0004' 529CCP2X EQU H'0005' 530 531DCCPX EQU H'0005' 532 533 534;----- CCP1CON Bits ----------------------------------------------------- 535CCP1M0 EQU H'0000' 536CCP1M1 EQU H'0001' 537CCP1M2 EQU H'0002' 538CCP1M3 EQU H'0003' 539DC1B0 EQU H'0004' 540DC1B1 EQU H'0005' 541 542CCP1Y EQU H'0004' 543CCP1X EQU H'0005' 544 545 546;----- ADCON1 Bits ----------------------------------------------------- 547ADCS2 EQU H'0006' 548ADFM EQU H'0007' 549 550PCFG0 EQU H'0000' 551PCFG1 EQU H'0001' 552PCFG2 EQU H'0002' 553PCFG3 EQU H'0003' 554 555 556;----- ADCON0 Bits ----------------------------------------------------- 557ADON EQU H'0000' 558GO_NOT_DONE EQU H'0002' 559 560GO EQU H'0002' 561CHS0 EQU H'0003' 562CHS1 EQU H'0004' 563CHS2 EQU H'0005' 564ADCS0 EQU H'0006' 565ADCS1 EQU H'0007' 566 567NOT_DONE EQU H'0002' 568 569DONE EQU H'0002' 570 571GO_DONE EQU H'0002' 572 573 574;----- SSPCON2 Bits ----------------------------------------------------- 575SEN EQU H'0000' 576RSEN EQU H'0001' 577PEN EQU H'0002' 578RCEN EQU H'0003' 579ACKEN EQU H'0004' 580ACKDT EQU H'0005' 581ACKSTAT EQU H'0006' 582GCEN EQU H'0007' 583 584 585;----- SSPCON1 Bits ----------------------------------------------------- 586CKP EQU H'0004' 587SSPEN EQU H'0005' 588SSPOV EQU H'0006' 589WCOL EQU H'0007' 590 591SSPM0 EQU H'0000' 592SSPM1 EQU H'0001' 593SSPM2 EQU H'0002' 594SSPM3 EQU H'0003' 595 596 597;----- SSPSTAT Bits ----------------------------------------------------- 598BF EQU H'0000' 599UA EQU H'0001' 600R_NOT_W EQU H'0002' 601S EQU H'0003' 602P EQU H'0004' 603D_NOT_A EQU H'0005' 604CKE EQU H'0006' 605SMP EQU H'0007' 606 607I2C_READ EQU H'0002' 608I2C_START EQU H'0003' 609I2C_STOP EQU H'0004' 610I2C_DATA EQU H'0005' 611 612R EQU H'0002' 613D EQU H'0005' 614 615READ_WRITE EQU H'0002' 616DATA_ADDRESS EQU H'0005' 617 618NOT_WRITE EQU H'0002' 619NOT_ADDRESS EQU H'0005' 620 621NOT_W EQU H'0002' 622NOT_A EQU H'0005' 623 624R_W EQU H'0002' 625D_A EQU H'0005' 626 627I2C_DAT EQU H'0005' 628 629 630;----- T2CON Bits ----------------------------------------------------- 631TMR2ON EQU H'0002' 632 633T2CKPS0 EQU H'0000' 634T2CKPS1 EQU H'0001' 635TOUTPS0 EQU H'0003' 636TOUTPS1 EQU H'0004' 637TOUTPS2 EQU H'0005' 638TOUTPS3 EQU H'0006' 639 640 641;----- T1CON Bits ----------------------------------------------------- 642TMR1ON EQU H'0000' 643TMR1CS EQU H'0001' 644NOT_T1SYNC EQU H'0002' 645T1OSCEN EQU H'0003' 646RD16 EQU H'0007' 647 648T1SYNC EQU H'0002' 649T1CKPS0 EQU H'0004' 650T1CKPS1 EQU H'0005' 651 652T1INSYNC EQU H'0002' 653 654 655;----- RCON Bits ----------------------------------------------------- 656NOT_BOR EQU H'0000' 657NOT_POR EQU H'0001' 658NOT_PD EQU H'0002' 659NOT_TO EQU H'0003' 660NOT_RI EQU H'0004' 661IPEN EQU H'0007' 662 663BOR EQU H'0000' 664POR EQU H'0001' 665PD EQU H'0002' 666TO EQU H'0003' 667RI EQU H'0004' 668NOT_IPEN EQU H'0007' 669 670 671;----- WDTCON Bits ----------------------------------------------------- 672SWDTEN EQU H'0000' 673 674SWDTE EQU H'0000' 675 676 677;----- LVDCON Bits ----------------------------------------------------- 678LVDEN EQU H'0004' 679IRVST EQU H'0005' 680 681LVDL0 EQU H'0000' 682LVDL1 EQU H'0001' 683LVDL2 EQU H'0002' 684LVDL3 EQU H'0003' 685 686 687;----- OSCCON Bits ----------------------------------------------------- 688SCS EQU H'0000' 689 690 691;----- T0CON Bits ----------------------------------------------------- 692PSA EQU H'0003' 693T0SE EQU H'0004' 694T0CS EQU H'0005' 695T08BIT EQU H'0006' 696TMR0ON EQU H'0007' 697 698T0PS0 EQU H'0000' 699T0PS1 EQU H'0001' 700T0PS2 EQU H'0002' 701 702 703;----- STATUS Bits ----------------------------------------------------- 704C EQU H'0000' 705DC EQU H'0001' 706Z EQU H'0002' 707OV EQU H'0003' 708N EQU H'0004' 709 710 711;----- INTCON3 Bits ----------------------------------------------------- 712INT1IF EQU H'0000' 713INT2IF EQU H'0001' 714INT1IE EQU H'0003' 715INT2IE EQU H'0004' 716INT1IP EQU H'0006' 717INT2IP EQU H'0007' 718 719INT1F EQU H'0000' 720INT2F EQU H'0001' 721INT1E EQU H'0003' 722INT2E EQU H'0004' 723INT1P EQU H'0006' 724INT2P EQU H'0007' 725 726 727;----- INTCON2 Bits ----------------------------------------------------- 728RBIP EQU H'0000' 729TMR0IP EQU H'0002' 730INTEDG2 EQU H'0004' 731INTEDG1 EQU H'0005' 732INTEDG0 EQU H'0006' 733NOT_RBPU EQU H'0007' 734 735T0IP EQU H'0002' 736RBPU EQU H'0007' 737 738 739;----- INTCON Bits ----------------------------------------------------- 740RBIF EQU H'0000' 741INT0IF EQU H'0001' 742TMR0IF EQU H'0002' 743RBIE EQU H'0003' 744INT0IE EQU H'0004' 745TMR0IE EQU H'0005' 746PEIE_GIEL EQU H'0006' 747GIE_GIEH EQU H'0007' 748 749INT0F EQU H'0001' 750T0IF EQU H'0002' 751INT0E EQU H'0004' 752T0IE EQU H'0005' 753PEIE EQU H'0006' 754GIE EQU H'0007' 755 756GIEL EQU H'0006' 757GIEH EQU H'0007' 758 759 760;----- INTCON1 Bits ----------------------------------------------------- 761RBIF EQU H'0000' 762INT0IF EQU H'0001' 763TMR0IF EQU H'0002' 764RBIE EQU H'0003' 765INT0IE EQU H'0004' 766TMR0IE EQU H'0005' 767PEIE_GIEL EQU H'0006' 768GIE_GIEH EQU H'0007' 769 770INT0F EQU H'0001' 771T0IF EQU H'0002' 772INT0E EQU H'0004' 773T0IE EQU H'0005' 774PEIE EQU H'0006' 775GIE EQU H'0007' 776 777GIEL EQU H'0006' 778GIEH EQU H'0007' 779 780 781;----- STKPTR Bits ----------------------------------------------------- 782STKUNF EQU H'0006' 783STKFUL EQU H'0007' 784 785STKPTR0 EQU H'0000' 786STKPTR1 EQU H'0001' 787STKPTR2 EQU H'0002' 788STKPTR3 EQU H'0003' 789STKPTR4 EQU H'0004' 790STKOVF EQU H'0007' 791 792SP0 EQU H'0000' 793SP1 EQU H'0001' 794SP2 EQU H'0002' 795SP3 EQU H'0003' 796SP4 EQU H'0004' 797 798 799 800;========================================================================== 801; 802; RAM Definitions 803; 804;========================================================================== 805 __MAXRAM H'0FFF' 806 __BADRAM H'0600'-H'0F7F' 807 __BADRAM H'0F83'-H'0F88' 808 __BADRAM H'0F8C'-H'0F91' 809 __BADRAM H'0F95'-H'0F9C' 810 __BADRAM H'0FA3'-H'0FA5' 811 __BADRAM H'0FAA' 812 __BADRAM H'0FB0' 813 __BADRAM H'0FB4'-H'0FB9' 814 __BADRAM H'0FC0' 815 __BADRAM H'0FD4' 816 817;========================================================================== 818; 819; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been 820; superseded by the CONFIG directive. The following settings 821; are available for this device. 822; 823; Oscillator Selection bits: 824; OSC = LP LP oscillator 825; OSC = XT XT oscillator 826; OSC = HS HS oscillator 827; OSC = RC RC oscillator 828; OSC = EC EC oscillator w/ OSC2 configured as divide-by-4 clock output 829; OSC = ECIO EC oscillator w/ OSC2 configured as RA6 830; OSC = HSPLL HS oscillator with PLL enabled/Clock frequency = (4 x FOSC) 831; OSC = RCIO RC oscillator w/ OSC2 configured as RA6 832; 833; Oscillator System Clock Switch Enable bit: 834; OSCS = ON Oscillator system clock switch option is enabled (oscillator switching is enabled) 835; OSCS = OFF Oscillator system clock switch option is disabled (main oscillator is source) 836; 837; Power-up Timer Enable bit: 838; PWRT = ON PWRT enabled 839; PWRT = OFF PWRT disabled 840; 841; Brown-out Reset Enable bit: 842; BOR = OFF Brown-out Reset disabled 843; BOR = ON Brown-out Reset enabled 844; 845; Brown-out Reset Voltage bits: 846; BORV = 45 VBOR set to 4.5V 847; BORV = 42 VBOR set to 4.2V 848; BORV = 27 VBOR set to 2.7V 849; BORV = 20 VBOR set to 2.0V 850; 851; Watchdog Timer Enable bit: 852; WDT = OFF WDT disabled (control is placed on the SWDTEN bit) 853; WDT = ON WDT enabled 854; 855; Watchdog Timer Postscale Select bits: 856; WDTPS = 1 1:1 857; WDTPS = 2 1:2 858; WDTPS = 4 1:4 859; WDTPS = 8 1:8 860; WDTPS = 16 1:16 861; WDTPS = 32 1:32 862; WDTPS = 64 1:64 863; WDTPS = 128 1:128 864; 865; CCP2 Mux bit: 866; CCP2MUX = OFF CCP2 input/output is multiplexed with RB3 867; CCP2MUX = ON CCP2 input/output is multiplexed with RC1 868; 869; Stack Full/Underflow Reset Enable bit: 870; STVR = OFF Stack Full/Underflow will not cause RESET 871; STVR = ON Stack Full/Underflow will cause RESET 872; 873; Low Voltage ICSP Enable bit: 874; LVP = OFF Low Voltage ICSP disabled 875; LVP = ON Low Voltage ICSP enabled 876; 877; Background Debugger Enable bit: 878; DEBUG = ON Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug. 879; DEBUG = OFF Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins. 880; 881; Code Protection bit: 882; CP0 = ON Block 0 (000200-001FFFh) code protected 883; CP0 = OFF Block 0 (000200-001FFFh) not code protected 884; 885; Code Protection bit: 886; CP1 = ON Block 1 (002000-003FFFh) code protected 887; CP1 = OFF Block 1 (002000-003FFFh) not code protected 888; 889; Code Protection bit: 890; CP2 = ON Block 2 (004000-005FFFh) code protected 891; CP2 = OFF Block 2 (004000-005FFFh) not code protected 892; 893; Code Protection bit: 894; CP3 = ON Block 3 (006000-007FFFh) code protected 895; CP3 = OFF Block 3 (006000-007FFFh) not code protected 896; 897; Boot Block Code Protection bit: 898; CPB = ON Boot Block (000000-0001FFh) code protected 899; CPB = OFF Boot Block (000000-0001FFh) not code protected 900; 901; Data EEPROM Code Protection bit: 902; CPD = ON Data EEPROM code protected 903; CPD = OFF Data EEPROM not code protected 904; 905; Write Protection bit: 906; WRT0 = ON Block 0 (000200-001FFFh) write protected 907; WRT0 = OFF Block 0 (000200-001FFFh) not write protected 908; 909; Write Protection bit: 910; WRT1 = ON Block 1 (002000-003FFFh) write protected 911; WRT1 = OFF Block 1 (002000-003FFFh) not write protected 912; 913; Write Protection bit: 914; WRT2 = ON Block 2 (004000-005FFFh) write protected 915; WRT2 = OFF Block 2 (004000-005FFFh) not write protected 916; 917; Write Protection bit: 918; WRT3 = ON Block 3 (006000-007FFFh) write protected 919; WRT3 = OFF Block 3 (006000-007FFFh) not write protected 920; 921; Configuration Register Write Protection bit: 922; WRTC = ON Configuration registers (300000-3000FFh) write protected 923; WRTC = OFF Configuration registers (300000-3000FFh) not write protected 924; 925; Boot Block Write Protection bit: 926; WRTB = ON Boot Block (000000-0001FFh) write protected 927; WRTB = OFF Boot Block (000000-0001FFh) not write protected 928; 929; Data EEPROM Write Protection bit: 930; WRTD = ON Data EEPROM write protected 931; WRTD = OFF Data EEPROM not write protected 932; 933; Table Read Protection bit: 934; EBTR0 = ON Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks 935; EBTR0 = OFF Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks 936; 937; Table Read Protection bit: 938; EBTR1 = ON Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks 939; EBTR1 = OFF Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks 940; 941; Table Read Protection bit: 942; EBTR2 = ON Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks 943; EBTR2 = OFF Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks 944; 945; Table Read Protection bit: 946; EBTR3 = ON Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks 947; EBTR3 = OFF Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks 948; 949; Boot Block Table Read Protection bit: 950; EBTRB = ON Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks 951; EBTRB = OFF Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks 952; 953;========================================================================== 954;========================================================================== 955; 956; Configuration Bits 957; 958; NAME Address 959; CONFIG1H 300001h 960; CONFIG2L 300002h 961; CONFIG2H 300003h 962; CONFIG3H 300005h 963; CONFIG4L 300006h 964; CONFIG5L 300008h 965; CONFIG5H 300009h 966; CONFIG6L 30000Ah 967; CONFIG6H 30000Bh 968; CONFIG7L 30000Ch 969; CONFIG7H 30000Dh 970; 971;========================================================================== 972 973; The following is an assignment of address values for all of the 974; configuration registers for the purpose of table reads 975_CONFIG1H EQU H'300001' 976_CONFIG2L EQU H'300002' 977_CONFIG2H EQU H'300003' 978_CONFIG3H EQU H'300005' 979_CONFIG4L EQU H'300006' 980_CONFIG5L EQU H'300008' 981_CONFIG5H EQU H'300009' 982_CONFIG6L EQU H'30000A' 983_CONFIG6H EQU H'30000B' 984_CONFIG7L EQU H'30000C' 985_CONFIG7H EQU H'30000D' 986 987;----- CONFIG1H Options -------------------------------------------------- 988_LP_OSC EQU H'F8' ; LP oscillator 989_LP_OSC_1H EQU H'F8' ; LP oscillator 990_XT_OSC EQU H'F9' ; XT oscillator 991_XT_OSC_1H EQU H'F9' ; XT oscillator 992_HS_OSC EQU H'FA' ; HS oscillator 993_HS_OSC_1H EQU H'FA' ; HS oscillator 994_RC_OSC EQU H'FB' ; RC oscillator 995_RC_OSC_1H EQU H'FB' ; RC oscillator 996_EC_OSC EQU H'FC' ; EC oscillator w/ OSC2 configured as divide-by-4 clock output 997_EC_OSC_1H EQU H'FC' ; EC oscillator w/ OSC2 configured as divide-by-4 clock output 998_ECIO_OSC EQU H'FD' ; EC oscillator w/ OSC2 configured as RA6 999_ECIO_OSC_1H EQU H'FD' ; EC oscillator w/ OSC2 configured as RA6 1000_HSPLL_OSC EQU H'FE' ; HS oscillator with PLL enabled/Clock frequency = (4 x FOSC) 1001_HSPLL_OSC_1H EQU H'FE' ; HS oscillator with PLL enabled/Clock frequency = (4 x FOSC) 1002_RCIO_OSC EQU H'FF' ; RC oscillator w/ OSC2 configured as RA6 1003_RCIO_OSC_1H EQU H'FF' ; RC oscillator w/ OSC2 configured as RA6 1004 1005_OSCS_ON_1H EQU H'DF' ; Oscillator system clock switch option is enabled (oscillator switching is enabled) 1006_OSCS_OFF_1H EQU H'FF' ; Oscillator system clock switch option is disabled (main oscillator is source) 1007 1008;----- CONFIG2L Options -------------------------------------------------- 1009_PWRT_ON_2L EQU H'FE' ; PWRT enabled 1010_PWRT_OFF_2L EQU H'FF' ; PWRT disabled 1011 1012_BOR_OFF_2L EQU H'FD' ; Brown-out Reset disabled 1013_BOR_ON_2L EQU H'FF' ; Brown-out Reset enabled 1014 1015_BORV_45_2L EQU H'F3' ; VBOR set to 4.5V 1016_BORV_42_2L EQU H'F7' ; VBOR set to 4.2V 1017_BORV_27_2L EQU H'FB' ; VBOR set to 2.7V 1018_BORV_20 EQU H'FF' ; VBOR set to 2.0V 1019_BORV_20_2L EQU H'FF' ; VBOR set to 2.0V 1020 1021;----- CONFIG2H Options -------------------------------------------------- 1022_WDT_OFF_2H EQU H'FE' ; WDT disabled (control is placed on the SWDTEN bit) 1023_WDT_ON_2H EQU H'FF' ; WDT enabled 1024 1025_WDTPS_1_2H EQU H'F1' ; 1:1 1026_WDTPS_2_2H EQU H'F3' ; 1:2 1027_WDTPS_4_2H EQU H'F5' ; 1:4 1028_WDTPS_8_2H EQU H'F7' ; 1:8 1029_WDTPS_16_2H EQU H'F9' ; 1:16 1030_WDTPS_32_2H EQU H'FB' ; 1:32 1031_WDTPS_64_2H EQU H'FD' ; 1:64 1032_WDTPS_128_2H EQU H'FF' ; 1:128 1033 1034;----- CONFIG3H Options -------------------------------------------------- 1035_CCP2MX_OFF EQU H'FE' ; CCP2 input/output is multiplexed with RB3 1036_CCP2MX_OFF_3H EQU H'FE' ; CCP2 input/output is multiplexed with RB3 1037_CCP2MX_ON EQU H'FF' ; CCP2 input/output is multiplexed with RC1 1038_CCP2MX_ON_3H EQU H'FF' ; CCP2 input/output is multiplexed with RC1 1039 1040;----- CONFIG4L Options -------------------------------------------------- 1041_STVR_OFF_4L EQU H'FE' ; Stack Full/Underflow will not cause RESET 1042_STVR_ON_4L EQU H'FF' ; Stack Full/Underflow will cause RESET 1043 1044_LVP_OFF_4L EQU H'FB' ; Low Voltage ICSP disabled 1045_LVP_ON_4L EQU H'FF' ; Low Voltage ICSP enabled 1046 1047_DEBUG_ON_4L EQU H'7F' ; Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug. 1048_DEBUG_OFF_4L EQU H'FF' ; Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins. 1049 1050;----- CONFIG5L Options -------------------------------------------------- 1051_CP0_ON_5L EQU H'FE' ; Block 0 (000200-001FFFh) code protected 1052_CP0_OFF_5L EQU H'FF' ; Block 0 (000200-001FFFh) not code protected 1053 1054_CP1_ON_5L EQU H'FD' ; Block 1 (002000-003FFFh) code protected 1055_CP1_OFF_5L EQU H'FF' ; Block 1 (002000-003FFFh) not code protected 1056 1057_CP2_ON_5L EQU H'FB' ; Block 2 (004000-005FFFh) code protected 1058_CP2_OFF_5L EQU H'FF' ; Block 2 (004000-005FFFh) not code protected 1059 1060_CP3_ON_5L EQU H'F7' ; Block 3 (006000-007FFFh) code protected 1061_CP3_OFF_5L EQU H'FF' ; Block 3 (006000-007FFFh) not code protected 1062 1063;----- CONFIG5H Options -------------------------------------------------- 1064_CPB_ON_5H EQU H'BF' ; Boot Block (000000-0001FFh) code protected 1065_CPB_OFF_5H EQU H'FF' ; Boot Block (000000-0001FFh) not code protected 1066 1067_CPD_ON_5H EQU H'7F' ; Data EEPROM code protected 1068_CPD_OFF_5H EQU H'FF' ; Data EEPROM not code protected 1069 1070;----- CONFIG6L Options -------------------------------------------------- 1071_WRT0_ON_6L EQU H'FE' ; Block 0 (000200-001FFFh) write protected 1072_WRT0_OFF_6L EQU H'FF' ; Block 0 (000200-001FFFh) not write protected 1073 1074_WRT1_ON_6L EQU H'FD' ; Block 1 (002000-003FFFh) write protected 1075_WRT1_OFF_6L EQU H'FF' ; Block 1 (002000-003FFFh) not write protected 1076 1077_WRT2_ON_6L EQU H'FB' ; Block 2 (004000-005FFFh) write protected 1078_WRT2_OFF_6L EQU H'FF' ; Block 2 (004000-005FFFh) not write protected 1079 1080_WRT3_ON_6L EQU H'F7' ; Block 3 (006000-007FFFh) write protected 1081_WRT3_OFF_6L EQU H'FF' ; Block 3 (006000-007FFFh) not write protected 1082 1083;----- CONFIG6H Options -------------------------------------------------- 1084_WRTC_ON_6H EQU H'DF' ; Configuration registers (300000-3000FFh) write protected 1085_WRTC_OFF_6H EQU H'FF' ; Configuration registers (300000-3000FFh) not write protected 1086 1087_WRTB_ON_6H EQU H'BF' ; Boot Block (000000-0001FFh) write protected 1088_WRTB_OFF_6H EQU H'FF' ; Boot Block (000000-0001FFh) not write protected 1089 1090_WRTD_ON_6H EQU H'7F' ; Data EEPROM write protected 1091_WRTD_OFF_6H EQU H'FF' ; Data EEPROM not write protected 1092 1093;----- CONFIG7L Options -------------------------------------------------- 1094_EBTR0_ON_7L EQU H'FE' ; Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks 1095_EBTR0_OFF_7L EQU H'FF' ; Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks 1096 1097_EBTR1_ON_7L EQU H'FD' ; Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks 1098_EBTR1_OFF_7L EQU H'FF' ; Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks 1099 1100_EBTR2_ON_7L EQU H'FB' ; Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks 1101_EBTR2_OFF_7L EQU H'FF' ; Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks 1102 1103_EBTR3_ON_7L EQU H'F7' ; Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks 1104_EBTR3_OFF_7L EQU H'FF' ; Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks 1105 1106;----- CONFIG7H Options -------------------------------------------------- 1107_EBTRB_ON_7H EQU H'BF' ; Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks 1108_EBTRB_OFF_7H EQU H'FF' ; Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks 1109 1110 1111;----- DEVID Equates -------------------------------------------------- 1112_DEVID1 EQU H'3FFFFE' 1113_DEVID2 EQU H'3FFFFF' 1114 1115;----- IDLOC Equates -------------------------------------------------- 1116_IDLOC0 EQU H'200000' 1117_IDLOC1 EQU H'200001' 1118_IDLOC2 EQU H'200002' 1119_IDLOC3 EQU H'200003' 1120_IDLOC4 EQU H'200004' 1121_IDLOC5 EQU H'200005' 1122_IDLOC6 EQU H'200006' 1123_IDLOC7 EQU H'200007' 1124 1125 LIST 1126