1#!/bin/bash
2
3set -e
4lattice_simlib="/opt/lscc/iCEcube2.2014.12/verilog/sb_ice_syn.v"
5
6mkdir -p test_pio.work
7cd test_pio.work
8
9for NEGTRIG in 0 1; do
10for INTYPE in 00 01 10 11; do
11for OUTTYPE in 0000 0110 1010 1110 0101 1001 1101 \
12               0100 1000 1100 0111 1011 1111; do
13	pf="test_pio_${OUTTYPE}${INTYPE}${NEGTRIG}"
14	echo "Testing ${pf}..."
15	if ! test -f ${pf}.bin; then
16		cat > ${pf}.v <<- EOT
17			module top (
18			    inout pin,
19			    input latch_in,
20			    input clk_en,
21			    input clk_in,
22			    input clk_out,
23			    input oen,
24			    input dout_0,
25			    input dout_1,
26			    output din_0,
27			    output din_1,
28			    output global
29			);
30			    SB_GB_IO #(
31				.PIN_TYPE(6'b${OUTTYPE}${INTYPE}),
32				.PULLUP(1'b0),
33				.NEG_TRIGGER(1'b${NEGTRIG}),
34				.IO_STANDARD("SB_LVCMOS")
35			    ) pin_gb_io (
36				.PACKAGE_PIN(pin),
37				.GLOBAL_BUFFER_OUTPUT(global),
38				.LATCH_INPUT_VALUE(latch_in),
39				.CLOCK_ENABLE(clk_en),
40				.INPUT_CLK(clk_in),
41				.OUTPUT_CLK(clk_out),
42				.OUTPUT_ENABLE(oen),
43				.D_OUT_0(dout_0),
44				.D_OUT_1(dout_1),
45				.D_IN_0(din_0),
46				.D_IN_1(din_1)
47			    );
48			endmodule
49		EOT
50		bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
51	fi
52	python3 ../../../icebox/icebox_vlog.py -P ${pf}.psb ${pf}.asc > ${pf}_out.v
53	iverilog -D"VCDFILE=\"${pf}_tb.vcd\"" -DINTYPE=${INTYPE} -o ${pf}_tb \
54			-s testbench ../test_pio_tb.v ${pf}.v ${pf}_out.v $lattice_simlib 2> /dev/null
55	./${pf}_tb > ${pf}_tb.txt
56	if grep ERROR ${pf}_tb.txt; then exit 1; fi
57done; done; done
58
59echo "All tests passed."
60
61