1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3--- |
4
5  define void @ne_i32() {entry: ret void}
6  define void @eq_ptr() {entry: ret void}
7  define void @ult_i8() {entry: ret void}
8  define void @slt_i16() {entry: ret void}
9  define void @eq_i64() {entry: ret void}
10  define void @ne_i64() {entry: ret void}
11  define void @sgt_i64() {entry: ret void}
12  define void @sge_i64() {entry: ret void}
13  define void @slt_i64() {entry: ret void}
14  define void @sle_i64() {entry: ret void}
15  define void @ugt_i64() {entry: ret void}
16  define void @uge_i64() {entry: ret void}
17  define void @ult_i64() {entry: ret void}
18  define void @ule_i64() {entry: ret void}
19
20...
21---
22name:            ne_i32
23alignment:       4
24tracksRegLiveness: true
25body:             |
26  bb.1.entry:
27    liveins: $a0, $a1
28
29    ; MIPS32-LABEL: name: ne_i32
30    ; MIPS32: liveins: $a0, $a1
31    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
32    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
33    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
34    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
35    ; MIPS32: $v0 = COPY [[COPY2]](s32)
36    ; MIPS32: RetRA implicit $v0
37    %0:_(s32) = COPY $a0
38    %1:_(s32) = COPY $a1
39    %2:_(s1) = G_ICMP intpred(ne), %0(s32), %1
40    %3:_(s32) = G_ANYEXT %2(s1)
41    $v0 = COPY %3(s32)
42    RetRA implicit $v0
43
44...
45---
46name:            eq_ptr
47alignment:       4
48tracksRegLiveness: true
49body:             |
50  bb.1.entry:
51    liveins: $a0, $a1
52
53    ; MIPS32-LABEL: name: eq_ptr
54    ; MIPS32: liveins: $a0, $a1
55    ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
56    ; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
57    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](p0), [[COPY1]]
58    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
59    ; MIPS32: $v0 = COPY [[COPY2]](s32)
60    ; MIPS32: RetRA implicit $v0
61    %0:_(p0) = COPY $a0
62    %1:_(p0) = COPY $a1
63    %2:_(s1) = G_ICMP intpred(eq), %0(p0), %1
64    %3:_(s32) = G_ANYEXT %2(s1)
65    $v0 = COPY %3(s32)
66    RetRA implicit $v0
67
68...
69---
70name:            ult_i8
71alignment:       4
72tracksRegLiveness: true
73body:             |
74  bb.1.entry:
75    liveins: $a0, $a1
76
77    ; MIPS32-LABEL: name: ult_i8
78    ; MIPS32: liveins: $a0, $a1
79    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
80    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
81    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
82    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
83    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
84    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
85    ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
86    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]
87    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
88    ; MIPS32: $v0 = COPY [[COPY4]](s32)
89    ; MIPS32: RetRA implicit $v0
90    %2:_(s32) = COPY $a0
91    %0:_(s8) = G_TRUNC %2(s32)
92    %3:_(s32) = COPY $a1
93    %1:_(s8) = G_TRUNC %3(s32)
94    %4:_(s1) = G_ICMP intpred(ult), %0(s8), %1
95    %5:_(s32) = G_ANYEXT %4(s1)
96    $v0 = COPY %5(s32)
97    RetRA implicit $v0
98
99...
100---
101name:            slt_i16
102alignment:       4
103tracksRegLiveness: true
104body:             |
105  bb.1.entry:
106    liveins: $a0, $a1
107
108    ; MIPS32-LABEL: name: slt_i16
109    ; MIPS32: liveins: $a0, $a1
110    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
111    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
112    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
113    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
114    ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C]](s32)
115    ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
116    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
117    ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY3]], [[C]](s32)
118    ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
119    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ASHR]](s32), [[ASHR1]]
120    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
121    ; MIPS32: $v0 = COPY [[COPY4]](s32)
122    ; MIPS32: RetRA implicit $v0
123    %2:_(s32) = COPY $a0
124    %0:_(s16) = G_TRUNC %2(s32)
125    %3:_(s32) = COPY $a1
126    %1:_(s16) = G_TRUNC %3(s32)
127    %4:_(s1) = G_ICMP intpred(slt), %0(s16), %1
128    %5:_(s32) = G_ANYEXT %4(s1)
129    $v0 = COPY %5(s32)
130    RetRA implicit $v0
131
132...
133---
134name:            eq_i64
135alignment:       4
136tracksRegLiveness: true
137body:             |
138  bb.1.entry:
139    liveins: $a0, $a1, $a2, $a3
140
141    ; MIPS32-LABEL: name: eq_i64
142    ; MIPS32: liveins: $a0, $a1, $a2, $a3
143    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
144    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
145    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
146    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
147    ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY2]]
148    ; MIPS32: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY3]]
149    ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[XOR1]]
150    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
151    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s32), [[C]]
152    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
153    ; MIPS32: $v0 = COPY [[COPY4]](s32)
154    ; MIPS32: RetRA implicit $v0
155    %2:_(s32) = COPY $a0
156    %3:_(s32) = COPY $a1
157    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
158    %4:_(s32) = COPY $a2
159    %5:_(s32) = COPY $a3
160    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
161    %6:_(s1) = G_ICMP intpred(eq), %0(s64), %1
162    %7:_(s32) = G_ANYEXT %6(s1)
163    $v0 = COPY %7(s32)
164    RetRA implicit $v0
165
166...
167---
168name:            ne_i64
169alignment:       4
170tracksRegLiveness: true
171body:             |
172  bb.1.entry:
173    liveins: $a0, $a1, $a2, $a3
174
175    ; MIPS32-LABEL: name: ne_i64
176    ; MIPS32: liveins: $a0, $a1, $a2, $a3
177    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
178    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
179    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
180    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
181    ; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY2]]
182    ; MIPS32: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY3]]
183    ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[XOR1]]
184    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
185    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s32), [[C]]
186    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
187    ; MIPS32: $v0 = COPY [[COPY4]](s32)
188    ; MIPS32: RetRA implicit $v0
189    %2:_(s32) = COPY $a0
190    %3:_(s32) = COPY $a1
191    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
192    %4:_(s32) = COPY $a2
193    %5:_(s32) = COPY $a3
194    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
195    %6:_(s1) = G_ICMP intpred(ne), %0(s64), %1
196    %7:_(s32) = G_ANYEXT %6(s1)
197    $v0 = COPY %7(s32)
198    RetRA implicit $v0
199
200...
201---
202name:            sgt_i64
203alignment:       4
204tracksRegLiveness: true
205body:             |
206  bb.1.entry:
207    liveins: $a0, $a1, $a2, $a3
208
209    ; MIPS32-LABEL: name: sgt_i64
210    ; MIPS32: liveins: $a0, $a1, $a2, $a3
211    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
212    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
213    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
214    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
215    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[COPY1]](s32), [[COPY3]]
216    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
217    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY2]]
218    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
219    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
220    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
221    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
222    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
223    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
224    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
225    ; MIPS32: $v0 = COPY [[COPY7]](s32)
226    ; MIPS32: RetRA implicit $v0
227    %2:_(s32) = COPY $a0
228    %3:_(s32) = COPY $a1
229    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
230    %4:_(s32) = COPY $a2
231    %5:_(s32) = COPY $a3
232    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
233    %6:_(s1) = G_ICMP intpred(sgt), %0(s64), %1
234    %7:_(s32) = G_ANYEXT %6(s1)
235    $v0 = COPY %7(s32)
236    RetRA implicit $v0
237
238...
239---
240name:            sge_i64
241alignment:       4
242tracksRegLiveness: true
243body:             |
244  bb.1.entry:
245    liveins: $a0, $a1, $a2, $a3
246
247    ; MIPS32-LABEL: name: sge_i64
248    ; MIPS32: liveins: $a0, $a1, $a2, $a3
249    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
250    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
251    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
252    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
253    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[COPY1]](s32), [[COPY3]]
254    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
255    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(uge), [[COPY]](s32), [[COPY2]]
256    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
257    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
258    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
259    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
260    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
261    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
262    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
263    ; MIPS32: $v0 = COPY [[COPY7]](s32)
264    ; MIPS32: RetRA implicit $v0
265    %2:_(s32) = COPY $a0
266    %3:_(s32) = COPY $a1
267    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
268    %4:_(s32) = COPY $a2
269    %5:_(s32) = COPY $a3
270    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
271    %6:_(s1) = G_ICMP intpred(sge), %0(s64), %1
272    %7:_(s32) = G_ANYEXT %6(s1)
273    $v0 = COPY %7(s32)
274    RetRA implicit $v0
275
276...
277---
278name:            slt_i64
279alignment:       4
280tracksRegLiveness: true
281body:             |
282  bb.1.entry:
283    liveins: $a0, $a1, $a2, $a3
284
285    ; MIPS32-LABEL: name: slt_i64
286    ; MIPS32: liveins: $a0, $a1, $a2, $a3
287    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
288    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
289    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
290    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
291    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY1]](s32), [[COPY3]]
292    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
293    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY2]]
294    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
295    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
296    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
297    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
298    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
299    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
300    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
301    ; MIPS32: $v0 = COPY [[COPY7]](s32)
302    ; MIPS32: RetRA implicit $v0
303    %2:_(s32) = COPY $a0
304    %3:_(s32) = COPY $a1
305    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
306    %4:_(s32) = COPY $a2
307    %5:_(s32) = COPY $a3
308    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
309    %6:_(s1) = G_ICMP intpred(slt), %0(s64), %1
310    %7:_(s32) = G_ANYEXT %6(s1)
311    $v0 = COPY %7(s32)
312    RetRA implicit $v0
313
314...
315---
316name:            sle_i64
317alignment:       4
318tracksRegLiveness: true
319body:             |
320  bb.1.entry:
321    liveins: $a0, $a1, $a2, $a3
322
323    ; MIPS32-LABEL: name: sle_i64
324    ; MIPS32: liveins: $a0, $a1, $a2, $a3
325    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
326    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
327    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
328    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
329    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[COPY1]](s32), [[COPY3]]
330    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
331    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ule), [[COPY]](s32), [[COPY2]]
332    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
333    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
334    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
335    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
336    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
337    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
338    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
339    ; MIPS32: $v0 = COPY [[COPY7]](s32)
340    ; MIPS32: RetRA implicit $v0
341    %2:_(s32) = COPY $a0
342    %3:_(s32) = COPY $a1
343    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
344    %4:_(s32) = COPY $a2
345    %5:_(s32) = COPY $a3
346    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
347    %6:_(s1) = G_ICMP intpred(sle), %0(s64), %1
348    %7:_(s32) = G_ANYEXT %6(s1)
349    $v0 = COPY %7(s32)
350    RetRA implicit $v0
351
352...
353---
354name:            ugt_i64
355alignment:       4
356tracksRegLiveness: true
357body:             |
358  bb.1.entry:
359    liveins: $a0, $a1, $a2, $a3
360
361    ; MIPS32-LABEL: name: ugt_i64
362    ; MIPS32: liveins: $a0, $a1, $a2, $a3
363    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
364    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
365    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
366    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
367    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY1]](s32), [[COPY3]]
368    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
369    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY2]]
370    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
371    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
372    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
373    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
374    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
375    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
376    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
377    ; MIPS32: $v0 = COPY [[COPY7]](s32)
378    ; MIPS32: RetRA implicit $v0
379    %2:_(s32) = COPY $a0
380    %3:_(s32) = COPY $a1
381    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
382    %4:_(s32) = COPY $a2
383    %5:_(s32) = COPY $a3
384    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
385    %6:_(s1) = G_ICMP intpred(ugt), %0(s64), %1
386    %7:_(s32) = G_ANYEXT %6(s1)
387    $v0 = COPY %7(s32)
388    RetRA implicit $v0
389
390...
391---
392name:            uge_i64
393alignment:       4
394tracksRegLiveness: true
395body:             |
396  bb.1.entry:
397    liveins: $a0, $a1, $a2, $a3
398
399    ; MIPS32-LABEL: name: uge_i64
400    ; MIPS32: liveins: $a0, $a1, $a2, $a3
401    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
402    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
403    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
404    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
405    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(uge), [[COPY1]](s32), [[COPY3]]
406    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
407    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(uge), [[COPY]](s32), [[COPY2]]
408    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
409    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
410    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
411    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
412    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
413    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
414    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
415    ; MIPS32: $v0 = COPY [[COPY7]](s32)
416    ; MIPS32: RetRA implicit $v0
417    %2:_(s32) = COPY $a0
418    %3:_(s32) = COPY $a1
419    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
420    %4:_(s32) = COPY $a2
421    %5:_(s32) = COPY $a3
422    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
423    %6:_(s1) = G_ICMP intpred(uge), %0(s64), %1
424    %7:_(s32) = G_ANYEXT %6(s1)
425    $v0 = COPY %7(s32)
426    RetRA implicit $v0
427
428...
429---
430name:            ult_i64
431alignment:       4
432tracksRegLiveness: true
433body:             |
434  bb.1.entry:
435    liveins: $a0, $a1, $a2, $a3
436
437    ; MIPS32-LABEL: name: ult_i64
438    ; MIPS32: liveins: $a0, $a1, $a2, $a3
439    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
440    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
441    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
442    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
443    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY1]](s32), [[COPY3]]
444    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
445    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY2]]
446    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
447    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
448    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
449    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
450    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
451    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
452    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
453    ; MIPS32: $v0 = COPY [[COPY7]](s32)
454    ; MIPS32: RetRA implicit $v0
455    %2:_(s32) = COPY $a0
456    %3:_(s32) = COPY $a1
457    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
458    %4:_(s32) = COPY $a2
459    %5:_(s32) = COPY $a3
460    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
461    %6:_(s1) = G_ICMP intpred(ult), %0(s64), %1
462    %7:_(s32) = G_ANYEXT %6(s1)
463    $v0 = COPY %7(s32)
464    RetRA implicit $v0
465
466...
467---
468name:            ule_i64
469alignment:       4
470tracksRegLiveness: true
471body:             |
472  bb.1.entry:
473    liveins: $a0, $a1, $a2, $a3
474
475    ; MIPS32-LABEL: name: ule_i64
476    ; MIPS32: liveins: $a0, $a1, $a2, $a3
477    ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
478    ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
479    ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
480    ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3
481    ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ule), [[COPY1]](s32), [[COPY3]]
482    ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]
483    ; MIPS32: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ule), [[COPY]](s32), [[COPY2]]
484    ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ICMP2]](s32)
485    ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
486    ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
487    ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32)
488    ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C]]
489    ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]]
490    ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
491    ; MIPS32: $v0 = COPY [[COPY7]](s32)
492    ; MIPS32: RetRA implicit $v0
493    %2:_(s32) = COPY $a0
494    %3:_(s32) = COPY $a1
495    %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
496    %4:_(s32) = COPY $a2
497    %5:_(s32) = COPY $a3
498    %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
499    %6:_(s1) = G_ICMP intpred(ule), %0(s64), %1
500    %7:_(s32) = G_ANYEXT %6(s1)
501    $v0 = COPY %7(s32)
502    RetRA implicit $v0
503
504...
505