1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2## Another machine verifier error found compiling libc
3# RUN: %cheri_purecap_llc -run-pass=cheriaddrmodefolder -verify-machineinstrs -o - %s | FileCheck %s
4--- |
5  ; ModuleID = '/Users/alex/cheri/llvm-project/llvm/test/CodeGen/Mips/cheri/_addrfolder-err.c-reduce.test.ll'
6  source_filename = "/Users/alex/cheri/llvm-project/llvm/test/CodeGen/Mips/cheri/_addrfolder-err.c"
7  target datalayout = "E-m:e-pf200:128:128:128:64-i8:8:32-i16:16:32-i64:64-n32:64-S128-A200-P200-G200"
8  target triple = "cheri-unknown-freebsd"
9
10  %struct.d.0.1.2.3.6.7.32 = type { i32, i16, [0 x i16] }
11
12  define void @f() addrspace(200) #0 {
13  entry:
14    %0 = load i16, i16 addrspace(200)* getelementptr (%struct.d.0.1.2.3.6.7.32, %struct.d.0.1.2.3.6.7.32 addrspace(200)* bitcast (void () addrspace(200)* @f to %struct.d.0.1.2.3.6.7.32 addrspace(200)*), i64 0, i32 2, i64 0), align 2
15    %idx.ext = sext i16 %0 to i64
16    %add.ptr = getelementptr inbounds %struct.d.0.1.2.3.6.7.32, %struct.d.0.1.2.3.6.7.32 addrspace(200)* bitcast (void () addrspace(200)* @f to %struct.d.0.1.2.3.6.7.32 addrspace(200)*), i64 %idx.ext
17    br label %for.cond
18
19  for.cond:                                         ; preds = %for.cond, %entry
20    %1 = bitcast %struct.d.0.1.2.3.6.7.32 addrspace(200)* %add.ptr to i8 addrspace(200)*
21    %sunkaddr = getelementptr inbounds i8, i8 addrspace(200)* %1, i64 1
22    %2 = bitcast i8 addrspace(200)* %sunkaddr to i32 addrspace(200)*
23    %3 = load i32, i32 addrspace(200)* %2, align 4
24    %conv2 = sext i32 %3 to i64
25    %4 = add nsw i64 %conv2, 3
26    %5 = tail call i8 addrspace(200)* @llvm.cheri.cap.address.set.i64(i8 addrspace(200)* null, i64 %4)
27    %6 = load i8, i8 addrspace(200)* %5, align 1
28    %7 = bitcast %struct.d.0.1.2.3.6.7.32 addrspace(200)* %add.ptr to i8 addrspace(200)*
29    %sunkaddr1 = getelementptr inbounds i8, i8 addrspace(200)* %7, i64 1
30    store i8 %6, i8 addrspace(200)* %sunkaddr1, align 1
31    br label %for.cond
32  }
33
34  ; Function Attrs: nounwind readnone willreturn
35  declare i8 addrspace(200)* @llvm.cheri.cap.address.set.i64(i8 addrspace(200)*, i64) addrspace(200) #1
36
37  ; Function Attrs: nounwind readnone willreturn
38  declare i64 @llvm.cheri.cap.address.get.i64(i8 addrspace(200)*) addrspace(200) #2
39
40  ; Function Attrs: nounwind
41  declare void @llvm.stackprotector(i8*, i8**) addrspace(200) #3
42
43  attributes #0 = { nounwind }
44  attributes #1 = { nounwind readnone willreturn }
45  attributes #2 = { nounwind readnone willreturn }
46  attributes #3 = { nounwind }
47
48  !llvm.ident = !{!0}
49
50  !0 = !{!"clang version 10.0.0 (https://github.com/CTSRD-CHERI/llvm-project bc146c2dcb6fcdd458e5c1ffcafbc301b391a2b9)"}
51
52...
53---
54name:            f
55alignment:       8
56exposesReturnsTwice: false
57legalized:       false
58regBankSelected: false
59selected:        false
60failedISel:      false
61tracksRegLiveness: true
62hasWinCFI:       false
63registers:
64  - { id: 0, class: cherigpr, preferred-register: '' }
65  - { id: 1, class: cherigpr, preferred-register: '' }
66  - { id: 2, class: gpr64, preferred-register: '' }
67  - { id: 3, class: cherigpr, preferred-register: '' }
68  - { id: 4, class: cherigpr, preferred-register: '' }
69  - { id: 5, class: gpr64, preferred-register: '' }
70  - { id: 6, class: gpr64, preferred-register: '' }
71  - { id: 7, class: cherigpr, preferred-register: '' }
72  - { id: 8, class: gpr64, preferred-register: '' }
73  - { id: 9, class: gpr64, preferred-register: '' }
74  - { id: 10, class: cherigpr, preferred-register: '' }
75  - { id: 11, class: cherigpr, preferred-register: '' }
76  - { id: 12, class: gpr64, preferred-register: '' }
77liveins:         []
78frameInfo:
79  isFrameAddressTaken: false
80  isReturnAddressTaken: false
81  hasStackMap:     false
82  hasPatchPoint:   false
83  stackSize:       0
84  offsetAdjustment: 0
85  maxAlignment:    1
86  adjustsStack:    false
87  hasCalls:        false
88  stackProtector:  ''
89  maxCallFrameSize: 4294967295
90  cvBytesOfCalleeSavedRegisters: 0
91  hasOpaqueSPAdjustment: false
92  hasVAStart:      false
93  hasMustTailInVarArgFunc: false
94  localFrameSize:  0
95  savePoint:       ''
96  restorePoint:    ''
97fixedStack:      []
98stack:           []
99callSites:       []
100constants:       []
101machineFunctionInfo: {}
102body:             |
103  ; CHECK-LABEL: name: f
104  ; CHECK: bb.0.entry:
105  ; CHECK:   successors: %bb.1(0x80000000)
106  ; CHECK:   [[PseudoPccRelativeAddressPostRA:%[0-9]+]]:cherigpr = PseudoPccRelativeAddressPostRA &_CHERI_CAPABILITY_TABLE_, implicit-def dead early-clobber %2
107  ; CHECK:   [[LOADCAP_BigImm:%[0-9]+]]:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @f, [[PseudoPccRelativeAddressPostRA]] :: (load 16 from cap-table)
108  ; CHECK:   [[CAPLOAD16_:%[0-9]+]]:gpr64 = CAPLOAD16 $zero_64, 6, [[LOADCAP_BigImm]] :: (load 2 from `i16 addrspace(200)* getelementptr (%struct.d.0.1.2.3.6.7.32, %struct.d.0.1.2.3.6.7.32 addrspace(200)* bitcast (void () addrspace(200)* @f to %struct.d.0.1.2.3.6.7.32 addrspace(200)*), i64 0, i32 2, i64 0)`, addrspace 200)
109  ; CHECK:   [[DSLL:%[0-9]+]]:gpr64 = DSLL killed [[CAPLOAD16_]], 3
110  ; CHECK:   [[CIncOffset:%[0-9]+]]:cherigpr = CIncOffset [[LOADCAP_BigImm]], [[DSLL]]
111  ; CHECK:   [[CIncOffsetImm:%[0-9]+]]:cherigpr = CIncOffsetImm [[LOADCAP_BigImm]], 1
112  ; CHECK: bb.1.for.cond:
113  ; CHECK:   successors: %bb.1(0x80000000)
114  ; CHECK:   [[CAPLOAD3264_:%[0-9]+]]:gpr64 = CAPLOAD3264 [[DSLL]], 0, [[CIncOffsetImm]] :: (load 4 from %ir.2, addrspace 200)
115  ; CHECK:   [[DADDiu:%[0-9]+]]:gpr64 = nsw DADDiu killed [[CAPLOAD3264_]], 3
116  ; CHECK:   [[CSetAddr:%[0-9]+]]:cherigpr = CSetAddr killed $cnull, killed [[DADDiu]]
117  ; CHECK:   [[CAPLOAD8_:%[0-9]+]]:gpr64 = CAPLOAD8 $zero_64, 0, killed [[CSetAddr]] :: (load 1 from %ir.5, addrspace 200)
118  ; CHECK:   CAPSTORE8 killed [[CAPLOAD8_]], $zero_64, 1, [[CIncOffset]] :: (store 1 into %ir.sunkaddr1, addrspace 200)
119  ; CHECK:   B %bb.1, implicit-def dead $at
120  bb.0.entry:
121    successors: %bb.1(0x80000000)
122
123    %1:cherigpr = PseudoPccRelativeAddressPostRA &_CHERI_CAPABILITY_TABLE_, implicit-def dead early-clobber %2
124    %3:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @f, %1 :: (load 16 from cap-table)
125    %4:cherigpr = CIncOffsetImm %3, 6
126    %5:gpr64 = CAPLOAD16 $zero_64, 0, killed %4 :: (load 2 from `i16 addrspace(200)* getelementptr (%struct.d.0.1.2.3.6.7.32, %struct.d.0.1.2.3.6.7.32 addrspace(200)* bitcast (void () addrspace(200)* @f to %struct.d.0.1.2.3.6.7.32 addrspace(200)*), i64 0, i32 2, i64 0)`, addrspace 200)
127    %6:gpr64 = DSLL killed %5, 3
128    ; Previously the killed flag was not removed here even though the register was reused in the next basic block
129    %0:cherigpr = CIncOffset %3, killed %6
130    %7:cherigpr = CIncOffsetImm %0, 1
131
132  bb.1.for.cond:
133    successors: %bb.1(0x80000000)
134
135    %8:gpr64 = CAPLOAD3264 $zero_64, 0, %7 :: (load 4 from %ir.2, addrspace 200)
136    %9:gpr64 = nsw DADDiu killed %8, 3
137    %11:cherigpr = CSetAddr killed $cnull, killed %9
138    %12:gpr64 = CAPLOAD8 $zero_64, 0, killed %11 :: (load 1 from %ir.5, addrspace 200)
139    CAPSTORE8 killed %12, $zero_64, 0, %7 :: (store 1 into %ir.sunkaddr1, addrspace 200)
140    B %bb.1, implicit-def dead $at
141
142...
143