1; RUN: llc < %s -fast-isel -asm-verbose=false -wasm-keep-registers | FileCheck %s
2
3target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
4target triple = "wasm32-unknown-unknown"
5
6; Fast-isel uses a 32-bit xor with -1 to negate i1 values, because it doesn't
7; make any guarantees about the contents of the high bits of a register holding
8; an i1 value. Test that when we do a `br_if` or `br_unless` with what what an
9; i1 value in LLVM IR, that we only test the low bit.
10
11; CHECK: i32.xor
12; CHECK: i32.const       $push[[L0:[0-9]+]]=, 1{{$}}
13; CHECK: i32.and         $push[[L1:[0-9]+]]=, $pop{{[0-9]+}}, $pop[[L0]]{{$}}
14; CHECK: br_if           0, $pop[[L1]]{{$}}
15
16; CHECK: i32.xor
17; CHECK: i32.const       $push[[L2:[0-9]+]]=, 1{{$}}
18; CHECK: i32.and         $push[[L3:[0-9]+]]=, $pop{{[0-9]+}}, $pop[[L2]]{{$}}
19; CHECK: br_if           0, $pop[[L3]]{{$}}
20
21define void @test() {
22start:
23  %0 = call i32 @return_one()
24  br label %bb1
25
26bb1:
27  %1 = icmp eq i32 %0, 1
28  %2 = xor i1 %1, true
29  br i1 %2, label %bb2, label %bb3
30
31bb2:
32  call void @panic()
33  unreachable
34
35bb3:
36  %3 = xor i1 %2, true
37  br i1 %3, label %bb4, label %bb5
38
39bb4:
40  call void @panic()
41  unreachable
42
43bb5:
44  ret void
45}
46
47declare i32 @return_one()
48declare void @panic()
49