1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test host codegen.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
9 
10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16 
17 // Test target codegen - host bc file has to be created first.
18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11
24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
26 
27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
35 
36 // Test host codegen.
37 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
38 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
39 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
40 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
41 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
42 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
43 
44 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
46 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
47 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
49 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
50 
51 // Test target codegen - host bc file has to be created first.
52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
53 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK25
54 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
55 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26
56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
57 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK27
58 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
59 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28
60 
61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
62 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
64 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
66 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
68 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
69 
70 // expected-no-diagnostics
71 #ifndef HEADER
72 #define HEADER
73 
74 
75 
76 
77 // We have 6 target regions
78 
79 
80 
81 // Check target registration is registered as a Ctor.
82 
83 
84 template<typename tx>
ftemplate(int n)85 tx ftemplate(int n) {
86   tx a = 0;
87 
88   #pragma omp target teams num_teams(tx(20))
89   {
90   }
91 
92   short b = 1;
93   #pragma omp target teams num_teams(b)
94   {
95     a += b;
96   }
97 
98   return a;
99 }
100 
101 static
fstatic(int n)102 int fstatic(int n) {
103 
104   #pragma omp target teams num_teams(n)
105   {
106   }
107 
108   #pragma omp target teams num_teams(32+n)
109   {
110   }
111 
112   return n+1;
113 }
114 
115 struct S1 {
116   double a;
117 
r1S1118   int r1(int n){
119     int b = 1;
120 
121     #pragma omp target teams num_teams(n-b)
122     {
123       this->a = (double)b + 1.5;
124     }
125 
126     #pragma omp target teams num_teams(1024)
127     {
128       this->a = 2.5;
129     }
130 
131     return (int)a;
132   }
133 };
134 
bar(int n)135 int bar(int n){
136   int a = 0;
137 
138   S1 S;
139   a += S.r1(n);
140 
141   a += fstatic(n);
142 
143   a += ftemplate<int>(n);
144 
145   return a;
146 }
147 
148 
149 
150 
151 
152 
153 
154 
155 
156 
157 
158 
159 
160 
161 
162 
163 
164 
165 
166 
167 
168 // Check that the offloading functions are emitted and that the parallel function
169 // is appropriately guarded.
170 
171 
172 
173 
174 
175 
176 #endif
177 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari
178 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
179 // CHECK1-NEXT:  entry:
180 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
181 // CHECK1-NEXT:    [[A:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
183 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
184 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
185 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
186 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
187 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
188 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
189 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
190 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
191 // CHECK1-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
192 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
193 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
194 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
195 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
196 // CHECK1-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
197 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
198 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
199 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
200 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
201 // CHECK1-NEXT:    ret i32 [[TMP6]]
202 //
203 //
204 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
205 // CHECK1-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
206 // CHECK1-NEXT:  entry:
207 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
208 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT:    [[B:%.*]] = alloca i32, align 4
210 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
212 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
213 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
214 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
215 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
216 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
217 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
218 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
219 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
220 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
221 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
222 // CHECK1-NEXT:    store i32 1, i32* [[B]], align 4
223 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
224 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
225 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
226 // CHECK1-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
227 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
228 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
229 // CHECK1-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
230 // CHECK1-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
231 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
232 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
233 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[CONV2]], align 4
234 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
235 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
236 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
237 // CHECK1-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
238 // CHECK1-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 8
239 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
240 // CHECK1-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
241 // CHECK1-NEXT:    store double* [[A]], double** [[TMP9]], align 8
242 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
243 // CHECK1-NEXT:    store i8* null, i8** [[TMP10]], align 8
244 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
245 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
246 // CHECK1-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
247 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
248 // CHECK1-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
249 // CHECK1-NEXT:    store i64 [[TMP3]], i64* [[TMP14]], align 8
250 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
251 // CHECK1-NEXT:    store i8* null, i8** [[TMP15]], align 8
252 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
253 // CHECK1-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
254 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP17]], align 8
255 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
256 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
257 // CHECK1-NEXT:    store i64 [[TMP5]], i64* [[TMP19]], align 8
258 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
259 // CHECK1-NEXT:    store i8* null, i8** [[TMP20]], align 8
260 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
261 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
262 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
263 // CHECK1-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
264 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
265 // CHECK1-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
266 // CHECK1:       omp_offload.failed:
267 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP3]], i64 [[TMP5]]) #[[ATTR2:[0-9]+]]
268 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
269 // CHECK1:       omp_offload.cont:
270 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
271 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
272 // CHECK1-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
273 // CHECK1-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 8
274 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
275 // CHECK1-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
276 // CHECK1-NEXT:    store double* [[A3]], double** [[TMP29]], align 8
277 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
278 // CHECK1-NEXT:    store i8* null, i8** [[TMP30]], align 8
279 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
280 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
281 // CHECK1-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
282 // CHECK1-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
283 // CHECK1-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
284 // CHECK1:       omp_offload.failed7:
285 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
286 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
287 // CHECK1:       omp_offload.cont8:
288 // CHECK1-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
289 // CHECK1-NEXT:    [[TMP35:%.*]] = load double, double* [[A9]], align 8
290 // CHECK1-NEXT:    [[CONV10:%.*]] = fptosi double [[TMP35]] to i32
291 // CHECK1-NEXT:    ret i32 [[CONV10]]
292 //
293 //
294 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici
295 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
296 // CHECK1-NEXT:  entry:
297 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
298 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
299 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
300 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
301 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
302 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
303 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
304 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
305 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
306 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
307 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
308 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
309 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
310 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
311 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
312 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
313 // CHECK1-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
314 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
315 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
316 // CHECK1-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
317 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP4]], align 8
318 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
319 // CHECK1-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
320 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP6]], align 8
321 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
322 // CHECK1-NEXT:    store i8* null, i8** [[TMP7]], align 8
323 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
324 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
325 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
326 // CHECK1-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
327 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
328 // CHECK1-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
329 // CHECK1:       omp_offload.failed:
330 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]]
331 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
332 // CHECK1:       omp_offload.cont:
333 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
334 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
335 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
336 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
337 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32*
338 // CHECK1-NEXT:    store i32 [[TMP14]], i32* [[CONV3]], align 4
339 // CHECK1-NEXT:    [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8
340 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
341 // CHECK1-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
342 // CHECK1-NEXT:    store i64 [[TMP15]], i64* [[TMP17]], align 8
343 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
344 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
345 // CHECK1-NEXT:    store i64 [[TMP15]], i64* [[TMP19]], align 8
346 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
347 // CHECK1-NEXT:    store i8* null, i8** [[TMP20]], align 8
348 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
349 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
350 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
351 // CHECK1-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
352 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
353 // CHECK1-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
354 // CHECK1:       omp_offload.failed7:
355 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i64 [[TMP15]]) #[[ATTR2]]
356 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
357 // CHECK1:       omp_offload.cont8:
358 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
359 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1
360 // CHECK1-NEXT:    ret i32 [[ADD9]]
361 //
362 //
363 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
364 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
365 // CHECK1-NEXT:  entry:
366 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT:    [[A:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT:    [[B:%.*]] = alloca i16, align 2
369 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
370 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
371 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
372 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
373 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
374 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
375 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
376 // CHECK1-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
377 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
378 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
379 // CHECK1-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
380 // CHECK1-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
381 // CHECK1:       omp_offload.failed:
382 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
383 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
384 // CHECK1:       omp_offload.cont:
385 // CHECK1-NEXT:    store i16 1, i16* [[B]], align 2
386 // CHECK1-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
387 // CHECK1-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
388 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
389 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
390 // CHECK1-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
391 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
392 // CHECK1-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
393 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_CASTED]] to i16*
394 // CHECK1-NEXT:    store i16 [[TMP5]], i16* [[CONV1]], align 2
395 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
396 // CHECK1-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
397 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i16*
398 // CHECK1-NEXT:    store i16 [[TMP7]], i16* [[CONV2]], align 2
399 // CHECK1-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
400 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
401 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
402 // CHECK1-NEXT:    store i64 [[TMP4]], i64* [[TMP10]], align 8
403 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
404 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
405 // CHECK1-NEXT:    store i64 [[TMP4]], i64* [[TMP12]], align 8
406 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
407 // CHECK1-NEXT:    store i8* null, i8** [[TMP13]], align 8
408 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
409 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
410 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP15]], align 8
411 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
412 // CHECK1-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
413 // CHECK1-NEXT:    store i64 [[TMP6]], i64* [[TMP17]], align 8
414 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
415 // CHECK1-NEXT:    store i8* null, i8** [[TMP18]], align 8
416 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
417 // CHECK1-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
418 // CHECK1-NEXT:    store i64 [[TMP8]], i64* [[TMP20]], align 8
419 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
420 // CHECK1-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
421 // CHECK1-NEXT:    store i64 [[TMP8]], i64* [[TMP22]], align 8
422 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
423 // CHECK1-NEXT:    store i8* null, i8** [[TMP23]], align 8
424 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
425 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
426 // CHECK1-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
427 // CHECK1-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
428 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
429 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
430 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
431 // CHECK1:       omp_offload.failed3:
432 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2]]
433 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
434 // CHECK1:       omp_offload.cont4:
435 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
436 // CHECK1-NEXT:    ret i32 [[TMP30]]
437 //
438 //
439 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
440 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
441 // CHECK1-NEXT:  entry:
442 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
443 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
444 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
445 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
446 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
447 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
448 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
449 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
450 // CHECK1-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
451 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
452 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
453 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
454 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
455 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
456 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
457 // CHECK1-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
458 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
459 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
460 // CHECK1-NEXT:    ret void
461 //
462 //
463 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
464 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
465 // CHECK1-NEXT:  entry:
466 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
467 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
468 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
469 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
470 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
471 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
472 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
473 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
474 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
475 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
476 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
477 // CHECK1-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
478 // CHECK1-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
479 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
480 // CHECK1-NEXT:    store double [[ADD]], double* [[A]], align 8
481 // CHECK1-NEXT:    ret void
482 //
483 //
484 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
485 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
486 // CHECK1-NEXT:  entry:
487 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
488 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
489 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
490 // CHECK1-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
491 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
492 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
493 // CHECK1-NEXT:    ret void
494 //
495 //
496 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
497 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
498 // CHECK1-NEXT:  entry:
499 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
500 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
501 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
502 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
503 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
504 // CHECK1-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
505 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
506 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
507 // CHECK1-NEXT:    store double 2.500000e+00, double* [[A]], align 8
508 // CHECK1-NEXT:    ret void
509 //
510 //
511 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
512 // CHECK1-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
513 // CHECK1-NEXT:  entry:
514 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
515 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
516 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
517 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
518 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
519 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
520 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
521 // CHECK1-NEXT:    ret void
522 //
523 //
524 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
525 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
526 // CHECK1-NEXT:  entry:
527 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
528 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
529 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
530 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
531 // CHECK1-NEXT:    ret void
532 //
533 //
534 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
535 // CHECK1-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
536 // CHECK1-NEXT:  entry:
537 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
538 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
539 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
540 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
541 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
542 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
543 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
544 // CHECK1-NEXT:    ret void
545 //
546 //
547 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
548 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
549 // CHECK1-NEXT:  entry:
550 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
551 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
552 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
553 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
554 // CHECK1-NEXT:    ret void
555 //
556 //
557 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
558 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
559 // CHECK1-NEXT:  entry:
560 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
561 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
562 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
563 // CHECK1-NEXT:    ret void
564 //
565 //
566 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
567 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
568 // CHECK1-NEXT:  entry:
569 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
570 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
571 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
572 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
573 // CHECK1-NEXT:    ret void
574 //
575 //
576 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
577 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
578 // CHECK1-NEXT:  entry:
579 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
580 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
581 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
582 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
583 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
584 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
585 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
586 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
587 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
588 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
589 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
590 // CHECK1-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
591 // CHECK1-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
592 // CHECK1-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
593 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
594 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
595 // CHECK1-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
596 // CHECK1-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
597 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
598 // CHECK1-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
599 // CHECK1-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
600 // CHECK1-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
601 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
602 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
603 // CHECK1-NEXT:    ret void
604 //
605 //
606 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
607 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
608 // CHECK1-NEXT:  entry:
609 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
610 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
611 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
612 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
613 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
614 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
615 // CHECK1-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
616 // CHECK1-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
617 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
618 // CHECK1-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
619 // CHECK1-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
620 // CHECK1-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
621 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
622 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
623 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
624 // CHECK1-NEXT:    ret void
625 //
626 //
627 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
628 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
629 // CHECK1-NEXT:  entry:
630 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
631 // CHECK1-NEXT:    ret void
632 //
633 //
634 // CHECK2-LABEL: define {{[^@]+}}@_Z3bari
635 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
636 // CHECK2-NEXT:  entry:
637 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
638 // CHECK2-NEXT:    [[A:%.*]] = alloca i32, align 4
639 // CHECK2-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
640 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
641 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
642 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
643 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
644 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
645 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
646 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
647 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
648 // CHECK2-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
649 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
650 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
651 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
652 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
653 // CHECK2-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
654 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
655 // CHECK2-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
656 // CHECK2-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
657 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
658 // CHECK2-NEXT:    ret i32 [[TMP6]]
659 //
660 //
661 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
662 // CHECK2-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
663 // CHECK2-NEXT:  entry:
664 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
665 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
666 // CHECK2-NEXT:    [[B:%.*]] = alloca i32, align 4
667 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
668 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
669 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
670 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
671 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
672 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
673 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
674 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
675 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
676 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
677 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
678 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
679 // CHECK2-NEXT:    store i32 1, i32* [[B]], align 4
680 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
681 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
682 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
683 // CHECK2-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
684 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
685 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
686 // CHECK2-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
687 // CHECK2-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
688 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
689 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
690 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[CONV2]], align 4
691 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
692 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
693 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
694 // CHECK2-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
695 // CHECK2-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 8
696 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
697 // CHECK2-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
698 // CHECK2-NEXT:    store double* [[A]], double** [[TMP9]], align 8
699 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
700 // CHECK2-NEXT:    store i8* null, i8** [[TMP10]], align 8
701 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
702 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
703 // CHECK2-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
704 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
705 // CHECK2-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
706 // CHECK2-NEXT:    store i64 [[TMP3]], i64* [[TMP14]], align 8
707 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
708 // CHECK2-NEXT:    store i8* null, i8** [[TMP15]], align 8
709 // CHECK2-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
710 // CHECK2-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
711 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP17]], align 8
712 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
713 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
714 // CHECK2-NEXT:    store i64 [[TMP5]], i64* [[TMP19]], align 8
715 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
716 // CHECK2-NEXT:    store i8* null, i8** [[TMP20]], align 8
717 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
718 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
719 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
720 // CHECK2-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
721 // CHECK2-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
722 // CHECK2-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
723 // CHECK2:       omp_offload.failed:
724 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP3]], i64 [[TMP5]]) #[[ATTR2:[0-9]+]]
725 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
726 // CHECK2:       omp_offload.cont:
727 // CHECK2-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
728 // CHECK2-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
729 // CHECK2-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
730 // CHECK2-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 8
731 // CHECK2-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
732 // CHECK2-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
733 // CHECK2-NEXT:    store double* [[A3]], double** [[TMP29]], align 8
734 // CHECK2-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
735 // CHECK2-NEXT:    store i8* null, i8** [[TMP30]], align 8
736 // CHECK2-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
737 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
738 // CHECK2-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
739 // CHECK2-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
740 // CHECK2-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
741 // CHECK2:       omp_offload.failed7:
742 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
743 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
744 // CHECK2:       omp_offload.cont8:
745 // CHECK2-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
746 // CHECK2-NEXT:    [[TMP35:%.*]] = load double, double* [[A9]], align 8
747 // CHECK2-NEXT:    [[CONV10:%.*]] = fptosi double [[TMP35]] to i32
748 // CHECK2-NEXT:    ret i32 [[CONV10]]
749 //
750 //
751 // CHECK2-LABEL: define {{[^@]+}}@_ZL7fstatici
752 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
753 // CHECK2-NEXT:  entry:
754 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
755 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
756 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
757 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
758 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
759 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
760 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
761 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
762 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
763 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
764 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
765 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
766 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
767 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
768 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
769 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
770 // CHECK2-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
771 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
772 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
773 // CHECK2-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
774 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP4]], align 8
775 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
776 // CHECK2-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
777 // CHECK2-NEXT:    store i64 [[TMP2]], i64* [[TMP6]], align 8
778 // CHECK2-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
779 // CHECK2-NEXT:    store i8* null, i8** [[TMP7]], align 8
780 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
781 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
782 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
783 // CHECK2-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
784 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
785 // CHECK2-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
786 // CHECK2:       omp_offload.failed:
787 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]]
788 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
789 // CHECK2:       omp_offload.cont:
790 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
791 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
792 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
793 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
794 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32*
795 // CHECK2-NEXT:    store i32 [[TMP14]], i32* [[CONV3]], align 4
796 // CHECK2-NEXT:    [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8
797 // CHECK2-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
798 // CHECK2-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
799 // CHECK2-NEXT:    store i64 [[TMP15]], i64* [[TMP17]], align 8
800 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
801 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
802 // CHECK2-NEXT:    store i64 [[TMP15]], i64* [[TMP19]], align 8
803 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
804 // CHECK2-NEXT:    store i8* null, i8** [[TMP20]], align 8
805 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
806 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
807 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
808 // CHECK2-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
809 // CHECK2-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
810 // CHECK2-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
811 // CHECK2:       omp_offload.failed7:
812 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i64 [[TMP15]]) #[[ATTR2]]
813 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
814 // CHECK2:       omp_offload.cont8:
815 // CHECK2-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
816 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1
817 // CHECK2-NEXT:    ret i32 [[ADD9]]
818 //
819 //
820 // CHECK2-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
821 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
822 // CHECK2-NEXT:  entry:
823 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
824 // CHECK2-NEXT:    [[A:%.*]] = alloca i32, align 4
825 // CHECK2-NEXT:    [[B:%.*]] = alloca i16, align 2
826 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
827 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
828 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
829 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
830 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
831 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
832 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
833 // CHECK2-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
834 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
835 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
836 // CHECK2-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
837 // CHECK2-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
838 // CHECK2:       omp_offload.failed:
839 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
840 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
841 // CHECK2:       omp_offload.cont:
842 // CHECK2-NEXT:    store i16 1, i16* [[B]], align 2
843 // CHECK2-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
844 // CHECK2-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
845 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
846 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
847 // CHECK2-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
848 // CHECK2-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
849 // CHECK2-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
850 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_CASTED]] to i16*
851 // CHECK2-NEXT:    store i16 [[TMP5]], i16* [[CONV1]], align 2
852 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
853 // CHECK2-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
854 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i16*
855 // CHECK2-NEXT:    store i16 [[TMP7]], i16* [[CONV2]], align 2
856 // CHECK2-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
857 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
858 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
859 // CHECK2-NEXT:    store i64 [[TMP4]], i64* [[TMP10]], align 8
860 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
861 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
862 // CHECK2-NEXT:    store i64 [[TMP4]], i64* [[TMP12]], align 8
863 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
864 // CHECK2-NEXT:    store i8* null, i8** [[TMP13]], align 8
865 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
866 // CHECK2-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
867 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP15]], align 8
868 // CHECK2-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
869 // CHECK2-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
870 // CHECK2-NEXT:    store i64 [[TMP6]], i64* [[TMP17]], align 8
871 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
872 // CHECK2-NEXT:    store i8* null, i8** [[TMP18]], align 8
873 // CHECK2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
874 // CHECK2-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
875 // CHECK2-NEXT:    store i64 [[TMP8]], i64* [[TMP20]], align 8
876 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
877 // CHECK2-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
878 // CHECK2-NEXT:    store i64 [[TMP8]], i64* [[TMP22]], align 8
879 // CHECK2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
880 // CHECK2-NEXT:    store i8* null, i8** [[TMP23]], align 8
881 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
882 // CHECK2-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
883 // CHECK2-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
884 // CHECK2-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
885 // CHECK2-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
886 // CHECK2-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
887 // CHECK2-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
888 // CHECK2:       omp_offload.failed3:
889 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2]]
890 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
891 // CHECK2:       omp_offload.cont4:
892 // CHECK2-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
893 // CHECK2-NEXT:    ret i32 [[TMP30]]
894 //
895 //
896 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
897 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
898 // CHECK2-NEXT:  entry:
899 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
900 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
901 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
902 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
903 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
904 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
905 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
906 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
907 // CHECK2-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
908 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
909 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
910 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
911 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
912 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
913 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
914 // CHECK2-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
915 // CHECK2-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
916 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
917 // CHECK2-NEXT:    ret void
918 //
919 //
920 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
921 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
922 // CHECK2-NEXT:  entry:
923 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
924 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
925 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
926 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
927 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
928 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
929 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
930 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
931 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
932 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
933 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
934 // CHECK2-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
935 // CHECK2-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
936 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
937 // CHECK2-NEXT:    store double [[ADD]], double* [[A]], align 8
938 // CHECK2-NEXT:    ret void
939 //
940 //
941 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
942 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
943 // CHECK2-NEXT:  entry:
944 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
945 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
946 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
947 // CHECK2-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
948 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
949 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
950 // CHECK2-NEXT:    ret void
951 //
952 //
953 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
954 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
955 // CHECK2-NEXT:  entry:
956 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
957 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
958 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
959 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
960 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
961 // CHECK2-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
962 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
963 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
964 // CHECK2-NEXT:    store double 2.500000e+00, double* [[A]], align 8
965 // CHECK2-NEXT:    ret void
966 //
967 //
968 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
969 // CHECK2-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
970 // CHECK2-NEXT:  entry:
971 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
972 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
973 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
974 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
975 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
976 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
977 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
978 // CHECK2-NEXT:    ret void
979 //
980 //
981 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
982 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
983 // CHECK2-NEXT:  entry:
984 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
985 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
986 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
987 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
988 // CHECK2-NEXT:    ret void
989 //
990 //
991 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
992 // CHECK2-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
993 // CHECK2-NEXT:  entry:
994 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
995 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
996 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
997 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
998 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
999 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1000 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
1001 // CHECK2-NEXT:    ret void
1002 //
1003 //
1004 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1005 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1006 // CHECK2-NEXT:  entry:
1007 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1008 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1009 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1010 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1011 // CHECK2-NEXT:    ret void
1012 //
1013 //
1014 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
1015 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
1016 // CHECK2-NEXT:  entry:
1017 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1018 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
1019 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1020 // CHECK2-NEXT:    ret void
1021 //
1022 //
1023 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
1024 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1025 // CHECK2-NEXT:  entry:
1026 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1027 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1028 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1029 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1030 // CHECK2-NEXT:    ret void
1031 //
1032 //
1033 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
1034 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1035 // CHECK2-NEXT:  entry:
1036 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1037 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1038 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1039 // CHECK2-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1040 // CHECK2-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
1041 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1042 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1043 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1044 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1045 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1046 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
1047 // CHECK2-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
1048 // CHECK2-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
1049 // CHECK2-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
1050 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
1051 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1052 // CHECK2-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1053 // CHECK2-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
1054 // CHECK2-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
1055 // CHECK2-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
1056 // CHECK2-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
1057 // CHECK2-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
1058 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
1059 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
1060 // CHECK2-NEXT:    ret void
1061 //
1062 //
1063 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1064 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
1065 // CHECK2-NEXT:  entry:
1066 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1067 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1068 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1069 // CHECK2-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
1070 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1071 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1072 // CHECK2-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
1073 // CHECK2-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
1074 // CHECK2-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1075 // CHECK2-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
1076 // CHECK2-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
1077 // CHECK2-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
1078 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1079 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
1080 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
1081 // CHECK2-NEXT:    ret void
1082 //
1083 //
1084 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1085 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
1086 // CHECK2-NEXT:  entry:
1087 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
1088 // CHECK2-NEXT:    ret void
1089 //
1090 //
1091 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari
1092 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1093 // CHECK3-NEXT:  entry:
1094 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1095 // CHECK3-NEXT:    [[A:%.*]] = alloca i32, align 4
1096 // CHECK3-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
1097 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1098 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
1099 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1100 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
1101 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
1102 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
1103 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
1104 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1105 // CHECK3-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
1106 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1107 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
1108 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
1109 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1110 // CHECK3-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
1111 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
1112 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
1113 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
1114 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
1115 // CHECK3-NEXT:    ret i32 [[TMP6]]
1116 //
1117 //
1118 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
1119 // CHECK3-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
1120 // CHECK3-NEXT:  entry:
1121 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1122 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1123 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
1124 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1125 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1126 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1127 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1128 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1129 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1130 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1131 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1132 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1133 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1134 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1135 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1136 // CHECK3-NEXT:    store i32 1, i32* [[B]], align 4
1137 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1138 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
1139 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
1140 // CHECK3-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
1141 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
1142 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
1143 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
1144 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1145 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1146 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1147 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
1148 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1149 // CHECK3-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
1150 // CHECK3-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 4
1151 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1152 // CHECK3-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
1153 // CHECK3-NEXT:    store double* [[A]], double** [[TMP9]], align 4
1154 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1155 // CHECK3-NEXT:    store i8* null, i8** [[TMP10]], align 4
1156 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1157 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1158 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
1159 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1160 // CHECK3-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
1161 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[TMP14]], align 4
1162 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1163 // CHECK3-NEXT:    store i8* null, i8** [[TMP15]], align 4
1164 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1165 // CHECK3-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1166 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[TMP17]], align 4
1167 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1168 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
1169 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[TMP19]], align 4
1170 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1171 // CHECK3-NEXT:    store i8* null, i8** [[TMP20]], align 4
1172 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1173 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1174 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1175 // CHECK3-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
1176 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1177 // CHECK3-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1178 // CHECK3:       omp_offload.failed:
1179 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR2:[0-9]+]]
1180 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1181 // CHECK3:       omp_offload.cont:
1182 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1183 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1184 // CHECK3-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
1185 // CHECK3-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 4
1186 // CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1187 // CHECK3-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
1188 // CHECK3-NEXT:    store double* [[A2]], double** [[TMP29]], align 4
1189 // CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1190 // CHECK3-NEXT:    store i8* null, i8** [[TMP30]], align 4
1191 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1192 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1193 // CHECK3-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
1194 // CHECK3-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1195 // CHECK3-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1196 // CHECK3:       omp_offload.failed6:
1197 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
1198 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1199 // CHECK3:       omp_offload.cont7:
1200 // CHECK3-NEXT:    [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1201 // CHECK3-NEXT:    [[TMP35:%.*]] = load double, double* [[A8]], align 4
1202 // CHECK3-NEXT:    [[CONV:%.*]] = fptosi double [[TMP35]] to i32
1203 // CHECK3-NEXT:    ret i32 [[CONV]]
1204 //
1205 //
1206 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici
1207 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
1208 // CHECK3-NEXT:  entry:
1209 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1210 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1211 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1212 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1213 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1214 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1215 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1216 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
1217 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1218 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1219 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1220 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1221 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1222 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
1223 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1224 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1225 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1226 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1227 // CHECK3-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1228 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP4]], align 4
1229 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1230 // CHECK3-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1231 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP6]], align 4
1232 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1233 // CHECK3-NEXT:    store i8* null, i8** [[TMP7]], align 4
1234 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1235 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1236 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1237 // CHECK3-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
1238 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1239 // CHECK3-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1240 // CHECK3:       omp_offload.failed:
1241 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]]
1242 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1243 // CHECK3:       omp_offload.cont:
1244 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
1245 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
1246 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1247 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1248 // CHECK3-NEXT:    store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1249 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1250 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1251 // CHECK3-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1252 // CHECK3-NEXT:    store i32 [[TMP15]], i32* [[TMP17]], align 4
1253 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1254 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
1255 // CHECK3-NEXT:    store i32 [[TMP15]], i32* [[TMP19]], align 4
1256 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1257 // CHECK3-NEXT:    store i8* null, i8** [[TMP20]], align 4
1258 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1259 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1260 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1261 // CHECK3-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
1262 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1263 // CHECK3-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1264 // CHECK3:       omp_offload.failed6:
1265 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i32 [[TMP15]]) #[[ATTR2]]
1266 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1267 // CHECK3:       omp_offload.cont7:
1268 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
1269 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1
1270 // CHECK3-NEXT:    ret i32 [[ADD8]]
1271 //
1272 //
1273 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
1274 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
1275 // CHECK3-NEXT:  entry:
1276 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1277 // CHECK3-NEXT:    [[A:%.*]] = alloca i32, align 4
1278 // CHECK3-NEXT:    [[B:%.*]] = alloca i16, align 2
1279 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
1280 // CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1281 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1282 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1283 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1284 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1285 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1286 // CHECK3-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1287 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
1288 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
1289 // CHECK3-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1290 // CHECK3-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1291 // CHECK3:       omp_offload.failed:
1292 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
1293 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1294 // CHECK3:       omp_offload.cont:
1295 // CHECK3-NEXT:    store i16 1, i16* [[B]], align 2
1296 // CHECK3-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
1297 // CHECK3-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
1298 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1299 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
1300 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
1301 // CHECK3-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
1302 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1303 // CHECK3-NEXT:    store i16 [[TMP5]], i16* [[CONV]], align 2
1304 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
1305 // CHECK3-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
1306 // CHECK3-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i16*
1307 // CHECK3-NEXT:    store i16 [[TMP7]], i16* [[CONV1]], align 2
1308 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1309 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1310 // CHECK3-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1311 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[TMP10]], align 4
1312 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1313 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1314 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[TMP12]], align 4
1315 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1316 // CHECK3-NEXT:    store i8* null, i8** [[TMP13]], align 4
1317 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1318 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1319 // CHECK3-NEXT:    store i32 [[TMP6]], i32* [[TMP15]], align 4
1320 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1321 // CHECK3-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1322 // CHECK3-NEXT:    store i32 [[TMP6]], i32* [[TMP17]], align 4
1323 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1324 // CHECK3-NEXT:    store i8* null, i8** [[TMP18]], align 4
1325 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1326 // CHECK3-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1327 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[TMP20]], align 4
1328 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1329 // CHECK3-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
1330 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[TMP22]], align 4
1331 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1332 // CHECK3-NEXT:    store i8* null, i8** [[TMP23]], align 4
1333 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1334 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1335 // CHECK3-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
1336 // CHECK3-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
1337 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
1338 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1339 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1340 // CHECK3:       omp_offload.failed2:
1341 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2]]
1342 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1343 // CHECK3:       omp_offload.cont3:
1344 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
1345 // CHECK3-NEXT:    ret i32 [[TMP30]]
1346 //
1347 //
1348 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
1349 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
1350 // CHECK3-NEXT:  entry:
1351 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1352 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1353 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1354 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1355 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1356 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1357 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1358 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1359 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1360 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1361 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
1362 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
1363 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
1364 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
1365 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
1366 // CHECK3-NEXT:    ret void
1367 //
1368 //
1369 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1370 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
1371 // CHECK3-NEXT:  entry:
1372 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1373 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1374 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1375 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1376 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1377 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1378 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1379 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1380 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1381 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
1382 // CHECK3-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
1383 // CHECK3-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
1384 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1385 // CHECK3-NEXT:    store double [[ADD]], double* [[A]], align 4
1386 // CHECK3-NEXT:    ret void
1387 //
1388 //
1389 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
1390 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
1391 // CHECK3-NEXT:  entry:
1392 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1393 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1394 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1395 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1396 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
1397 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
1398 // CHECK3-NEXT:    ret void
1399 //
1400 //
1401 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1402 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
1403 // CHECK3-NEXT:  entry:
1404 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1405 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1406 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1407 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1408 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1409 // CHECK3-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1410 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1411 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1412 // CHECK3-NEXT:    store double 2.500000e+00, double* [[A]], align 4
1413 // CHECK3-NEXT:    ret void
1414 //
1415 //
1416 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
1417 // CHECK3-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1418 // CHECK3-NEXT:  entry:
1419 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1420 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1421 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1422 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1423 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1424 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1425 // CHECK3-NEXT:    ret void
1426 //
1427 //
1428 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1429 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1430 // CHECK3-NEXT:  entry:
1431 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1432 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1433 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1434 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1435 // CHECK3-NEXT:    ret void
1436 //
1437 //
1438 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
1439 // CHECK3-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1440 // CHECK3-NEXT:  entry:
1441 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1442 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1443 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1444 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1445 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1446 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
1447 // CHECK3-NEXT:    ret void
1448 //
1449 //
1450 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
1451 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1452 // CHECK3-NEXT:  entry:
1453 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1454 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1455 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1456 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1457 // CHECK3-NEXT:    ret void
1458 //
1459 //
1460 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
1461 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1462 // CHECK3-NEXT:  entry:
1463 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1464 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
1465 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1466 // CHECK3-NEXT:    ret void
1467 //
1468 //
1469 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
1470 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1471 // CHECK3-NEXT:  entry:
1472 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1473 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1474 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1475 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1476 // CHECK3-NEXT:    ret void
1477 //
1478 //
1479 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
1480 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1481 // CHECK3-NEXT:  entry:
1482 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1483 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1484 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1485 // CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1486 // CHECK3-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1487 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1488 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1489 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1490 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1491 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1492 // CHECK3-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
1493 // CHECK3-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
1494 // CHECK3-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
1495 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
1496 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
1497 // CHECK3-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
1498 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
1499 // CHECK3-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
1500 // CHECK3-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1501 // CHECK3-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
1502 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
1503 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
1504 // CHECK3-NEXT:    ret void
1505 //
1506 //
1507 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
1508 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
1509 // CHECK3-NEXT:  entry:
1510 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1511 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1512 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1513 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1514 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1515 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1516 // CHECK3-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1517 // CHECK3-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1518 // CHECK3-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1519 // CHECK3-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
1520 // CHECK3-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
1521 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
1522 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
1523 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
1524 // CHECK3-NEXT:    ret void
1525 //
1526 //
1527 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1528 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
1529 // CHECK3-NEXT:  entry:
1530 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1531 // CHECK3-NEXT:    ret void
1532 //
1533 //
1534 // CHECK4-LABEL: define {{[^@]+}}@_Z3bari
1535 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1536 // CHECK4-NEXT:  entry:
1537 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1538 // CHECK4-NEXT:    [[A:%.*]] = alloca i32, align 4
1539 // CHECK4-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
1540 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1541 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
1542 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1543 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
1544 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
1545 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
1546 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
1547 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1548 // CHECK4-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
1549 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1550 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
1551 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
1552 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1553 // CHECK4-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
1554 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
1555 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
1556 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
1557 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
1558 // CHECK4-NEXT:    ret i32 [[TMP6]]
1559 //
1560 //
1561 // CHECK4-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
1562 // CHECK4-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
1563 // CHECK4-NEXT:  entry:
1564 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1565 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1566 // CHECK4-NEXT:    [[B:%.*]] = alloca i32, align 4
1567 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1568 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1569 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1570 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1571 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1572 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1573 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1574 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1575 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1576 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1577 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1578 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1579 // CHECK4-NEXT:    store i32 1, i32* [[B]], align 4
1580 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1581 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
1582 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
1583 // CHECK4-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
1584 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
1585 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
1586 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
1587 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1588 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1589 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1590 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
1591 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1592 // CHECK4-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
1593 // CHECK4-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 4
1594 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1595 // CHECK4-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
1596 // CHECK4-NEXT:    store double* [[A]], double** [[TMP9]], align 4
1597 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1598 // CHECK4-NEXT:    store i8* null, i8** [[TMP10]], align 4
1599 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1600 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1601 // CHECK4-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
1602 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1603 // CHECK4-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
1604 // CHECK4-NEXT:    store i32 [[TMP3]], i32* [[TMP14]], align 4
1605 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1606 // CHECK4-NEXT:    store i8* null, i8** [[TMP15]], align 4
1607 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1608 // CHECK4-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1609 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[TMP17]], align 4
1610 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1611 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
1612 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[TMP19]], align 4
1613 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1614 // CHECK4-NEXT:    store i8* null, i8** [[TMP20]], align 4
1615 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1616 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1617 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1618 // CHECK4-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
1619 // CHECK4-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1620 // CHECK4-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1621 // CHECK4:       omp_offload.failed:
1622 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR2:[0-9]+]]
1623 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1624 // CHECK4:       omp_offload.cont:
1625 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1626 // CHECK4-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1627 // CHECK4-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
1628 // CHECK4-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 4
1629 // CHECK4-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1630 // CHECK4-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
1631 // CHECK4-NEXT:    store double* [[A2]], double** [[TMP29]], align 4
1632 // CHECK4-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1633 // CHECK4-NEXT:    store i8* null, i8** [[TMP30]], align 4
1634 // CHECK4-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1635 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1636 // CHECK4-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
1637 // CHECK4-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1638 // CHECK4-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1639 // CHECK4:       omp_offload.failed6:
1640 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
1641 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1642 // CHECK4:       omp_offload.cont7:
1643 // CHECK4-NEXT:    [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
1644 // CHECK4-NEXT:    [[TMP35:%.*]] = load double, double* [[A8]], align 4
1645 // CHECK4-NEXT:    [[CONV:%.*]] = fptosi double [[TMP35]] to i32
1646 // CHECK4-NEXT:    ret i32 [[CONV]]
1647 //
1648 //
1649 // CHECK4-LABEL: define {{[^@]+}}@_ZL7fstatici
1650 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
1651 // CHECK4-NEXT:  entry:
1652 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1653 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1654 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1655 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1656 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1657 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1658 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1659 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
1660 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1661 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1662 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1663 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1664 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1665 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
1666 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1667 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1668 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1669 // CHECK4-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1670 // CHECK4-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1671 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP4]], align 4
1672 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1673 // CHECK4-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1674 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[TMP6]], align 4
1675 // CHECK4-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1676 // CHECK4-NEXT:    store i8* null, i8** [[TMP7]], align 4
1677 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1678 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1679 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1680 // CHECK4-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
1681 // CHECK4-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1682 // CHECK4-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1683 // CHECK4:       omp_offload.failed:
1684 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]]
1685 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1686 // CHECK4:       omp_offload.cont:
1687 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
1688 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
1689 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1690 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1691 // CHECK4-NEXT:    store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1692 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1693 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1694 // CHECK4-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1695 // CHECK4-NEXT:    store i32 [[TMP15]], i32* [[TMP17]], align 4
1696 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1697 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
1698 // CHECK4-NEXT:    store i32 [[TMP15]], i32* [[TMP19]], align 4
1699 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1700 // CHECK4-NEXT:    store i8* null, i8** [[TMP20]], align 4
1701 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1702 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1703 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1704 // CHECK4-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
1705 // CHECK4-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1706 // CHECK4-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1707 // CHECK4:       omp_offload.failed6:
1708 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i32 [[TMP15]]) #[[ATTR2]]
1709 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
1710 // CHECK4:       omp_offload.cont7:
1711 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
1712 // CHECK4-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1
1713 // CHECK4-NEXT:    ret i32 [[ADD8]]
1714 //
1715 //
1716 // CHECK4-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
1717 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
1718 // CHECK4-NEXT:  entry:
1719 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1720 // CHECK4-NEXT:    [[A:%.*]] = alloca i32, align 4
1721 // CHECK4-NEXT:    [[B:%.*]] = alloca i16, align 2
1722 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
1723 // CHECK4-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1724 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1725 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1726 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1727 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1728 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1729 // CHECK4-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
1730 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
1731 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
1732 // CHECK4-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1733 // CHECK4-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1734 // CHECK4:       omp_offload.failed:
1735 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
1736 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1737 // CHECK4:       omp_offload.cont:
1738 // CHECK4-NEXT:    store i16 1, i16* [[B]], align 2
1739 // CHECK4-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
1740 // CHECK4-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
1741 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1742 // CHECK4-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
1743 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
1744 // CHECK4-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
1745 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1746 // CHECK4-NEXT:    store i16 [[TMP5]], i16* [[CONV]], align 2
1747 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
1748 // CHECK4-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
1749 // CHECK4-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i16*
1750 // CHECK4-NEXT:    store i16 [[TMP7]], i16* [[CONV1]], align 2
1751 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1752 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1753 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1754 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[TMP10]], align 4
1755 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1756 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1757 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[TMP12]], align 4
1758 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1759 // CHECK4-NEXT:    store i8* null, i8** [[TMP13]], align 4
1760 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1761 // CHECK4-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1762 // CHECK4-NEXT:    store i32 [[TMP6]], i32* [[TMP15]], align 4
1763 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1764 // CHECK4-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1765 // CHECK4-NEXT:    store i32 [[TMP6]], i32* [[TMP17]], align 4
1766 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1767 // CHECK4-NEXT:    store i8* null, i8** [[TMP18]], align 4
1768 // CHECK4-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1769 // CHECK4-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1770 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[TMP20]], align 4
1771 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1772 // CHECK4-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
1773 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[TMP22]], align 4
1774 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1775 // CHECK4-NEXT:    store i8* null, i8** [[TMP23]], align 4
1776 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1777 // CHECK4-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1778 // CHECK4-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
1779 // CHECK4-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
1780 // CHECK4-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
1781 // CHECK4-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1782 // CHECK4-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1783 // CHECK4:       omp_offload.failed2:
1784 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2]]
1785 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
1786 // CHECK4:       omp_offload.cont3:
1787 // CHECK4-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
1788 // CHECK4-NEXT:    ret i32 [[TMP30]]
1789 //
1790 //
1791 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
1792 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
1793 // CHECK4-NEXT:  entry:
1794 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1795 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1796 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1797 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1798 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1799 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1800 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1801 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1802 // CHECK4-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1803 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1804 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
1805 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
1806 // CHECK4-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
1807 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
1808 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
1809 // CHECK4-NEXT:    ret void
1810 //
1811 //
1812 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1813 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
1814 // CHECK4-NEXT:  entry:
1815 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1816 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1817 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1818 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1819 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1820 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1821 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1822 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1823 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1824 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
1825 // CHECK4-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
1826 // CHECK4-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
1827 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1828 // CHECK4-NEXT:    store double [[ADD]], double* [[A]], align 4
1829 // CHECK4-NEXT:    ret void
1830 //
1831 //
1832 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
1833 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
1834 // CHECK4-NEXT:  entry:
1835 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1836 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1837 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1838 // CHECK4-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1839 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
1840 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
1841 // CHECK4-NEXT:    ret void
1842 //
1843 //
1844 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1845 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
1846 // CHECK4-NEXT:  entry:
1847 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1848 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1849 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
1850 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1851 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1852 // CHECK4-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
1853 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
1854 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1855 // CHECK4-NEXT:    store double 2.500000e+00, double* [[A]], align 4
1856 // CHECK4-NEXT:    ret void
1857 //
1858 //
1859 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
1860 // CHECK4-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1861 // CHECK4-NEXT:  entry:
1862 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1863 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1864 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1865 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1866 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1867 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1868 // CHECK4-NEXT:    ret void
1869 //
1870 //
1871 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
1872 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1873 // CHECK4-NEXT:  entry:
1874 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1875 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1876 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1877 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1878 // CHECK4-NEXT:    ret void
1879 //
1880 //
1881 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
1882 // CHECK4-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1883 // CHECK4-NEXT:  entry:
1884 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1885 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1886 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1887 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1888 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1889 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
1890 // CHECK4-NEXT:    ret void
1891 //
1892 //
1893 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
1894 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1895 // CHECK4-NEXT:  entry:
1896 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1897 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1898 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1899 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1900 // CHECK4-NEXT:    ret void
1901 //
1902 //
1903 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
1904 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
1905 // CHECK4-NEXT:  entry:
1906 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1907 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
1908 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1909 // CHECK4-NEXT:    ret void
1910 //
1911 //
1912 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
1913 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1914 // CHECK4-NEXT:  entry:
1915 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1916 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1917 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1918 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1919 // CHECK4-NEXT:    ret void
1920 //
1921 //
1922 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
1923 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1924 // CHECK4-NEXT:  entry:
1925 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1926 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1927 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1928 // CHECK4-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
1929 // CHECK4-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
1930 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
1931 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1932 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1933 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1934 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1935 // CHECK4-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
1936 // CHECK4-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
1937 // CHECK4-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
1938 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
1939 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
1940 // CHECK4-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
1941 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
1942 // CHECK4-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
1943 // CHECK4-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
1944 // CHECK4-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
1945 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
1946 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
1947 // CHECK4-NEXT:    ret void
1948 //
1949 //
1950 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
1951 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
1952 // CHECK4-NEXT:  entry:
1953 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1954 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1955 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1956 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
1957 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1958 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1959 // CHECK4-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1960 // CHECK4-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
1961 // CHECK4-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
1962 // CHECK4-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
1963 // CHECK4-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
1964 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
1965 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
1966 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
1967 // CHECK4-NEXT:    ret void
1968 //
1969 //
1970 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1971 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] {
1972 // CHECK4-NEXT:  entry:
1973 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
1974 // CHECK4-NEXT:    ret void
1975 //
1976 //
1977 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
1978 // CHECK9-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
1979 // CHECK9-NEXT:  entry:
1980 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1981 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
1982 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1983 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1984 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1985 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
1986 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1987 // CHECK9-NEXT:    ret void
1988 //
1989 //
1990 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1991 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
1992 // CHECK9-NEXT:  entry:
1993 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1994 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1995 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1996 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1997 // CHECK9-NEXT:    ret void
1998 //
1999 //
2000 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2001 // CHECK9-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2002 // CHECK9-NEXT:  entry:
2003 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2004 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2005 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2006 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2007 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2008 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2009 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2010 // CHECK9-NEXT:    ret void
2011 //
2012 //
2013 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2014 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2015 // CHECK9-NEXT:  entry:
2016 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2017 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2018 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2019 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2020 // CHECK9-NEXT:    ret void
2021 //
2022 //
2023 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2024 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2025 // CHECK9-NEXT:  entry:
2026 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2027 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2028 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2029 // CHECK9-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2030 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2031 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2032 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2033 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2034 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2035 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2036 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2037 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
2038 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2039 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
2040 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2041 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
2042 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
2043 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
2044 // CHECK9-NEXT:    ret void
2045 //
2046 //
2047 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
2048 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2049 // CHECK9-NEXT:  entry:
2050 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2051 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2052 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2053 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2054 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2055 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2056 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2057 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2058 // CHECK9-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2059 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2060 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2061 // CHECK9-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
2062 // CHECK9-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
2063 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2064 // CHECK9-NEXT:    store double [[ADD]], double* [[A]], align 8
2065 // CHECK9-NEXT:    ret void
2066 //
2067 //
2068 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2069 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
2070 // CHECK9-NEXT:  entry:
2071 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2072 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2073 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2074 // CHECK9-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2075 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
2076 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2077 // CHECK9-NEXT:    ret void
2078 //
2079 //
2080 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2081 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
2082 // CHECK9-NEXT:  entry:
2083 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2084 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2085 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2086 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2087 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2088 // CHECK9-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2089 // CHECK9-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2090 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2091 // CHECK9-NEXT:    store double 2.500000e+00, double* [[A]], align 8
2092 // CHECK9-NEXT:    ret void
2093 //
2094 //
2095 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
2096 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
2097 // CHECK9-NEXT:  entry:
2098 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2099 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
2100 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2101 // CHECK9-NEXT:    ret void
2102 //
2103 //
2104 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
2105 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2106 // CHECK9-NEXT:  entry:
2107 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2108 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2109 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2110 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2111 // CHECK9-NEXT:    ret void
2112 //
2113 //
2114 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2115 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2116 // CHECK9-NEXT:  entry:
2117 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2118 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2119 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2120 // CHECK9-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2121 // CHECK9-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2122 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2123 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2124 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2125 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2126 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2127 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2128 // CHECK9-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
2129 // CHECK9-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
2130 // CHECK9-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
2131 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2132 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
2133 // CHECK9-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2134 // CHECK9-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
2135 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
2136 // CHECK9-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
2137 // CHECK9-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
2138 // CHECK9-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
2139 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
2140 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
2141 // CHECK9-NEXT:    ret void
2142 //
2143 //
2144 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
2145 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2146 // CHECK9-NEXT:  entry:
2147 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2148 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2149 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2150 // CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2151 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2152 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2153 // CHECK9-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2154 // CHECK9-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2155 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2156 // CHECK9-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2157 // CHECK9-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
2158 // CHECK9-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
2159 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2160 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
2161 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2162 // CHECK9-NEXT:    ret void
2163 //
2164 //
2165 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2166 // CHECK10-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2167 // CHECK10-NEXT:  entry:
2168 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2169 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2170 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2171 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2172 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2173 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2174 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2175 // CHECK10-NEXT:    ret void
2176 //
2177 //
2178 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2179 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2180 // CHECK10-NEXT:  entry:
2181 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2182 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2183 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2184 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2185 // CHECK10-NEXT:    ret void
2186 //
2187 //
2188 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2189 // CHECK10-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2190 // CHECK10-NEXT:  entry:
2191 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2192 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2193 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2194 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2195 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2196 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2197 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2198 // CHECK10-NEXT:    ret void
2199 //
2200 //
2201 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2202 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2203 // CHECK10-NEXT:  entry:
2204 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2205 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2206 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2207 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2208 // CHECK10-NEXT:    ret void
2209 //
2210 //
2211 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2212 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2213 // CHECK10-NEXT:  entry:
2214 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2215 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2216 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2217 // CHECK10-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2218 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2219 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2220 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2221 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2222 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2223 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2224 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2225 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
2226 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2227 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
2228 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2229 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
2230 // CHECK10-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
2231 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
2232 // CHECK10-NEXT:    ret void
2233 //
2234 //
2235 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2236 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2237 // CHECK10-NEXT:  entry:
2238 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2239 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2240 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2241 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2242 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2243 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2244 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2245 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2246 // CHECK10-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2247 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2248 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2249 // CHECK10-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
2250 // CHECK10-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
2251 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2252 // CHECK10-NEXT:    store double [[ADD]], double* [[A]], align 8
2253 // CHECK10-NEXT:    ret void
2254 //
2255 //
2256 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2257 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
2258 // CHECK10-NEXT:  entry:
2259 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2260 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2261 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2262 // CHECK10-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2263 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
2264 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2265 // CHECK10-NEXT:    ret void
2266 //
2267 //
2268 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2269 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
2270 // CHECK10-NEXT:  entry:
2271 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2272 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2273 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2274 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2275 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2276 // CHECK10-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2277 // CHECK10-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2278 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2279 // CHECK10-NEXT:    store double 2.500000e+00, double* [[A]], align 8
2280 // CHECK10-NEXT:    ret void
2281 //
2282 //
2283 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
2284 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
2285 // CHECK10-NEXT:  entry:
2286 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2287 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
2288 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2289 // CHECK10-NEXT:    ret void
2290 //
2291 //
2292 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
2293 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2294 // CHECK10-NEXT:  entry:
2295 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2296 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2297 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2298 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2299 // CHECK10-NEXT:    ret void
2300 //
2301 //
2302 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2303 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2304 // CHECK10-NEXT:  entry:
2305 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2306 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2307 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2308 // CHECK10-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2309 // CHECK10-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2310 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2311 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2312 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2313 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2314 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2315 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2316 // CHECK10-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
2317 // CHECK10-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
2318 // CHECK10-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
2319 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2320 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
2321 // CHECK10-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2322 // CHECK10-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
2323 // CHECK10-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
2324 // CHECK10-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
2325 // CHECK10-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
2326 // CHECK10-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
2327 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
2328 // CHECK10-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
2329 // CHECK10-NEXT:    ret void
2330 //
2331 //
2332 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
2333 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
2334 // CHECK10-NEXT:  entry:
2335 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2336 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2337 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2338 // CHECK10-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2339 // CHECK10-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2340 // CHECK10-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2341 // CHECK10-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
2342 // CHECK10-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2343 // CHECK10-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2344 // CHECK10-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
2345 // CHECK10-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
2346 // CHECK10-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
2347 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
2348 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
2349 // CHECK10-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
2350 // CHECK10-NEXT:    ret void
2351 //
2352 //
2353 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2354 // CHECK11-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2355 // CHECK11-NEXT:  entry:
2356 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2357 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2358 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2359 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2360 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2361 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2362 // CHECK11-NEXT:    ret void
2363 //
2364 //
2365 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2366 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2367 // CHECK11-NEXT:  entry:
2368 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2369 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2370 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2371 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2372 // CHECK11-NEXT:    ret void
2373 //
2374 //
2375 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2376 // CHECK11-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2377 // CHECK11-NEXT:  entry:
2378 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2379 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2380 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2381 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2382 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2383 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2384 // CHECK11-NEXT:    ret void
2385 //
2386 //
2387 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2388 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2389 // CHECK11-NEXT:  entry:
2390 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2391 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2392 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2393 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2394 // CHECK11-NEXT:    ret void
2395 //
2396 //
2397 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2398 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2399 // CHECK11-NEXT:  entry:
2400 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2401 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2402 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2403 // CHECK11-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2404 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2405 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2406 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2407 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2408 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2409 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2410 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2411 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
2412 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
2413 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
2414 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
2415 // CHECK11-NEXT:    ret void
2416 //
2417 //
2418 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2419 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
2420 // CHECK11-NEXT:  entry:
2421 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2422 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2423 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2424 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2425 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2426 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2427 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2428 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2429 // CHECK11-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2430 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
2431 // CHECK11-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
2432 // CHECK11-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
2433 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2434 // CHECK11-NEXT:    store double [[ADD]], double* [[A]], align 4
2435 // CHECK11-NEXT:    ret void
2436 //
2437 //
2438 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2439 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
2440 // CHECK11-NEXT:  entry:
2441 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2442 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2443 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2444 // CHECK11-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2445 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
2446 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2447 // CHECK11-NEXT:    ret void
2448 //
2449 //
2450 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2451 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
2452 // CHECK11-NEXT:  entry:
2453 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2454 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2455 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2456 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2457 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2458 // CHECK11-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2459 // CHECK11-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2460 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2461 // CHECK11-NEXT:    store double 2.500000e+00, double* [[A]], align 4
2462 // CHECK11-NEXT:    ret void
2463 //
2464 //
2465 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
2466 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
2467 // CHECK11-NEXT:  entry:
2468 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2469 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
2470 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2471 // CHECK11-NEXT:    ret void
2472 //
2473 //
2474 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
2475 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2476 // CHECK11-NEXT:  entry:
2477 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2478 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2479 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2480 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2481 // CHECK11-NEXT:    ret void
2482 //
2483 //
2484 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2485 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2486 // CHECK11-NEXT:  entry:
2487 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2488 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2489 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2490 // CHECK11-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2491 // CHECK11-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2492 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2493 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2494 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2495 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2496 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2497 // CHECK11-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
2498 // CHECK11-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
2499 // CHECK11-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
2500 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2501 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
2502 // CHECK11-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
2503 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
2504 // CHECK11-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
2505 // CHECK11-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
2506 // CHECK11-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
2507 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
2508 // CHECK11-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
2509 // CHECK11-NEXT:    ret void
2510 //
2511 //
2512 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
2513 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
2514 // CHECK11-NEXT:  entry:
2515 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2516 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2517 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2518 // CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2519 // CHECK11-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2520 // CHECK11-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2521 // CHECK11-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2522 // CHECK11-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2523 // CHECK11-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2524 // CHECK11-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
2525 // CHECK11-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
2526 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
2527 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
2528 // CHECK11-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
2529 // CHECK11-NEXT:    ret void
2530 //
2531 //
2532 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
2533 // CHECK12-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
2534 // CHECK12-NEXT:  entry:
2535 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2536 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
2537 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2538 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2539 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2540 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2541 // CHECK12-NEXT:    ret void
2542 //
2543 //
2544 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
2545 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2546 // CHECK12-NEXT:  entry:
2547 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2548 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2549 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2550 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2551 // CHECK12-NEXT:    ret void
2552 //
2553 //
2554 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
2555 // CHECK12-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2556 // CHECK12-NEXT:  entry:
2557 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2558 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2559 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2560 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2561 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
2562 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2563 // CHECK12-NEXT:    ret void
2564 //
2565 //
2566 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
2567 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2568 // CHECK12-NEXT:  entry:
2569 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2570 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2571 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2572 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2573 // CHECK12-NEXT:    ret void
2574 //
2575 //
2576 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2577 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2578 // CHECK12-NEXT:  entry:
2579 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2580 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2581 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2582 // CHECK12-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2583 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2584 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2585 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2586 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2587 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2588 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2589 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2590 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
2591 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
2592 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
2593 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
2594 // CHECK12-NEXT:    ret void
2595 //
2596 //
2597 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
2598 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
2599 // CHECK12-NEXT:  entry:
2600 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2601 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2602 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2603 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2604 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2605 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2606 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2607 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2608 // CHECK12-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2609 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
2610 // CHECK12-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
2611 // CHECK12-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
2612 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2613 // CHECK12-NEXT:    store double [[ADD]], double* [[A]], align 4
2614 // CHECK12-NEXT:    ret void
2615 //
2616 //
2617 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
2618 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
2619 // CHECK12-NEXT:  entry:
2620 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2621 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2622 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2623 // CHECK12-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2624 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
2625 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
2626 // CHECK12-NEXT:    ret void
2627 //
2628 //
2629 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
2630 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
2631 // CHECK12-NEXT:  entry:
2632 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2633 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2634 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
2635 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2636 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2637 // CHECK12-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
2638 // CHECK12-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
2639 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
2640 // CHECK12-NEXT:    store double 2.500000e+00, double* [[A]], align 4
2641 // CHECK12-NEXT:    ret void
2642 //
2643 //
2644 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
2645 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] {
2646 // CHECK12-NEXT:  entry:
2647 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2648 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
2649 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2650 // CHECK12-NEXT:    ret void
2651 //
2652 //
2653 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4
2654 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
2655 // CHECK12-NEXT:  entry:
2656 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2657 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2658 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2659 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2660 // CHECK12-NEXT:    ret void
2661 //
2662 //
2663 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
2664 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
2665 // CHECK12-NEXT:  entry:
2666 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2667 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2668 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2669 // CHECK12-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
2670 // CHECK12-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
2671 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2672 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2673 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2674 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2675 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2676 // CHECK12-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
2677 // CHECK12-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
2678 // CHECK12-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
2679 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2680 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
2681 // CHECK12-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
2682 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
2683 // CHECK12-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
2684 // CHECK12-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
2685 // CHECK12-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
2686 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
2687 // CHECK12-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
2688 // CHECK12-NEXT:    ret void
2689 //
2690 //
2691 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
2692 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
2693 // CHECK12-NEXT:  entry:
2694 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2695 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2696 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2697 // CHECK12-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
2698 // CHECK12-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2699 // CHECK12-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2700 // CHECK12-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2701 // CHECK12-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
2702 // CHECK12-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
2703 // CHECK12-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
2704 // CHECK12-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
2705 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
2706 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
2707 // CHECK12-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
2708 // CHECK12-NEXT:    ret void
2709 //
2710 //
2711 // CHECK17-LABEL: define {{[^@]+}}@_Z3bari
2712 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2713 // CHECK17-NEXT:  entry:
2714 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2715 // CHECK17-NEXT:    [[A:%.*]] = alloca i32, align 4
2716 // CHECK17-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
2717 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
2718 // CHECK17-NEXT:    store i32 0, i32* [[A]], align 4
2719 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2720 // CHECK17-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
2721 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
2722 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
2723 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
2724 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2725 // CHECK17-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
2726 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
2727 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
2728 // CHECK17-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
2729 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
2730 // CHECK17-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
2731 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
2732 // CHECK17-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
2733 // CHECK17-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
2734 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
2735 // CHECK17-NEXT:    ret i32 [[TMP6]]
2736 //
2737 //
2738 // CHECK17-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
2739 // CHECK17-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
2740 // CHECK17-NEXT:  entry:
2741 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2742 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2743 // CHECK17-NEXT:    [[B:%.*]] = alloca i32, align 4
2744 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2745 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2746 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2747 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2748 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2749 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2750 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
2751 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
2752 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
2753 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2754 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
2755 // CHECK17-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2756 // CHECK17-NEXT:    store i32 1, i32* [[B]], align 4
2757 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2758 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
2759 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
2760 // CHECK17-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
2761 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
2762 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2763 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
2764 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
2765 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2766 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2767 // CHECK17-NEXT:    store i32 [[TMP4]], i32* [[CONV2]], align 4
2768 // CHECK17-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2769 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
2770 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2771 // CHECK17-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
2772 // CHECK17-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 8
2773 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2774 // CHECK17-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
2775 // CHECK17-NEXT:    store double* [[A]], double** [[TMP9]], align 8
2776 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2777 // CHECK17-NEXT:    store i8* null, i8** [[TMP10]], align 8
2778 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2779 // CHECK17-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
2780 // CHECK17-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
2781 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2782 // CHECK17-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
2783 // CHECK17-NEXT:    store i64 [[TMP3]], i64* [[TMP14]], align 8
2784 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2785 // CHECK17-NEXT:    store i8* null, i8** [[TMP15]], align 8
2786 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2787 // CHECK17-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
2788 // CHECK17-NEXT:    store i64 [[TMP5]], i64* [[TMP17]], align 8
2789 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2790 // CHECK17-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
2791 // CHECK17-NEXT:    store i64 [[TMP5]], i64* [[TMP19]], align 8
2792 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2793 // CHECK17-NEXT:    store i8* null, i8** [[TMP20]], align 8
2794 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2795 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2796 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2797 // CHECK17-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
2798 // CHECK17-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2799 // CHECK17-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2800 // CHECK17:       omp_offload.failed:
2801 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP3]], i64 [[TMP5]]) #[[ATTR2:[0-9]+]]
2802 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2803 // CHECK17:       omp_offload.cont:
2804 // CHECK17-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
2805 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2806 // CHECK17-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
2807 // CHECK17-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 8
2808 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2809 // CHECK17-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
2810 // CHECK17-NEXT:    store double* [[A3]], double** [[TMP29]], align 8
2811 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
2812 // CHECK17-NEXT:    store i8* null, i8** [[TMP30]], align 8
2813 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2814 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2815 // CHECK17-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
2816 // CHECK17-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
2817 // CHECK17-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2818 // CHECK17:       omp_offload.failed7:
2819 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
2820 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2821 // CHECK17:       omp_offload.cont8:
2822 // CHECK17-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
2823 // CHECK17-NEXT:    [[TMP35:%.*]] = load double, double* [[A9]], align 8
2824 // CHECK17-NEXT:    [[CONV10:%.*]] = fptosi double [[TMP35]] to i32
2825 // CHECK17-NEXT:    ret i32 [[CONV10]]
2826 //
2827 //
2828 // CHECK17-LABEL: define {{[^@]+}}@_ZL7fstatici
2829 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
2830 // CHECK17-NEXT:  entry:
2831 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2832 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2833 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2834 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2835 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2836 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2837 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2838 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
2839 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
2840 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
2841 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
2842 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
2843 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2844 // CHECK17-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
2845 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2846 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2847 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
2848 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2849 // CHECK17-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2850 // CHECK17-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
2851 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP4]], align 8
2852 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2853 // CHECK17-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
2854 // CHECK17-NEXT:    store i64 [[TMP2]], i64* [[TMP6]], align 8
2855 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2856 // CHECK17-NEXT:    store i8* null, i8** [[TMP7]], align 8
2857 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2858 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2859 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2860 // CHECK17-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
2861 // CHECK17-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2862 // CHECK17-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2863 // CHECK17:       omp_offload.failed:
2864 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]]
2865 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2866 // CHECK17:       omp_offload.cont:
2867 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
2868 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
2869 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2870 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2871 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32*
2872 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[CONV3]], align 4
2873 // CHECK17-NEXT:    [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8
2874 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2875 // CHECK17-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
2876 // CHECK17-NEXT:    store i64 [[TMP15]], i64* [[TMP17]], align 8
2877 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2878 // CHECK17-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
2879 // CHECK17-NEXT:    store i64 [[TMP15]], i64* [[TMP19]], align 8
2880 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
2881 // CHECK17-NEXT:    store i8* null, i8** [[TMP20]], align 8
2882 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2883 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2884 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2885 // CHECK17-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
2886 // CHECK17-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2887 // CHECK17-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2888 // CHECK17:       omp_offload.failed7:
2889 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i64 [[TMP15]]) #[[ATTR2]]
2890 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2891 // CHECK17:       omp_offload.cont8:
2892 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
2893 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1
2894 // CHECK17-NEXT:    ret i32 [[ADD9]]
2895 //
2896 //
2897 // CHECK17-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
2898 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
2899 // CHECK17-NEXT:  entry:
2900 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2901 // CHECK17-NEXT:    [[A:%.*]] = alloca i32, align 4
2902 // CHECK17-NEXT:    [[B:%.*]] = alloca i16, align 2
2903 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
2904 // CHECK17-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2905 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2906 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2907 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2908 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2909 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2910 // CHECK17-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
2911 // CHECK17-NEXT:    store i32 0, i32* [[A]], align 4
2912 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
2913 // CHECK17-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2914 // CHECK17-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2915 // CHECK17:       omp_offload.failed:
2916 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
2917 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2918 // CHECK17:       omp_offload.cont:
2919 // CHECK17-NEXT:    store i16 1, i16* [[B]], align 2
2920 // CHECK17-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
2921 // CHECK17-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
2922 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
2923 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2924 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
2925 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
2926 // CHECK17-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
2927 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_CASTED]] to i16*
2928 // CHECK17-NEXT:    store i16 [[TMP5]], i16* [[CONV1]], align 2
2929 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
2930 // CHECK17-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
2931 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i16*
2932 // CHECK17-NEXT:    store i16 [[TMP7]], i16* [[CONV2]], align 2
2933 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2934 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2935 // CHECK17-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2936 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP10]], align 8
2937 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2938 // CHECK17-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
2939 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP12]], align 8
2940 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2941 // CHECK17-NEXT:    store i8* null, i8** [[TMP13]], align 8
2942 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2943 // CHECK17-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2944 // CHECK17-NEXT:    store i64 [[TMP6]], i64* [[TMP15]], align 8
2945 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2946 // CHECK17-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
2947 // CHECK17-NEXT:    store i64 [[TMP6]], i64* [[TMP17]], align 8
2948 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2949 // CHECK17-NEXT:    store i8* null, i8** [[TMP18]], align 8
2950 // CHECK17-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2951 // CHECK17-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
2952 // CHECK17-NEXT:    store i64 [[TMP8]], i64* [[TMP20]], align 8
2953 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2954 // CHECK17-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
2955 // CHECK17-NEXT:    store i64 [[TMP8]], i64* [[TMP22]], align 8
2956 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2957 // CHECK17-NEXT:    store i8* null, i8** [[TMP23]], align 8
2958 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2959 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2960 // CHECK17-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
2961 // CHECK17-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
2962 // CHECK17-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
2963 // CHECK17-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2964 // CHECK17-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2965 // CHECK17:       omp_offload.failed3:
2966 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2]]
2967 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
2968 // CHECK17:       omp_offload.cont4:
2969 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
2970 // CHECK17-NEXT:    ret i32 [[TMP30]]
2971 //
2972 //
2973 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
2974 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
2975 // CHECK17-NEXT:  entry:
2976 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
2977 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
2978 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2979 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
2980 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
2981 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
2982 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
2983 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2984 // CHECK17-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
2985 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
2986 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2987 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
2988 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
2989 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
2990 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
2991 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
2992 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
2993 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
2994 // CHECK17-NEXT:    ret void
2995 //
2996 //
2997 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
2998 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
2999 // CHECK17-NEXT:  entry:
3000 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3001 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3002 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3003 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3004 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3005 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3006 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3007 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3008 // CHECK17-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3009 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3010 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3011 // CHECK17-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
3012 // CHECK17-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
3013 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3014 // CHECK17-NEXT:    store double [[ADD]], double* [[A]], align 8
3015 // CHECK17-NEXT:    ret void
3016 //
3017 //
3018 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
3019 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
3020 // CHECK17-NEXT:  entry:
3021 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3022 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3023 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3024 // CHECK17-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3025 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
3026 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
3027 // CHECK17-NEXT:    ret void
3028 //
3029 //
3030 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
3031 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
3032 // CHECK17-NEXT:  entry:
3033 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3034 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3035 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3036 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3037 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3038 // CHECK17-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3039 // CHECK17-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3040 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3041 // CHECK17-NEXT:    store double 2.500000e+00, double* [[A]], align 8
3042 // CHECK17-NEXT:    ret void
3043 //
3044 //
3045 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
3046 // CHECK17-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3047 // CHECK17-NEXT:  entry:
3048 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3049 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3050 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3051 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3052 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3053 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3054 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3055 // CHECK17-NEXT:    ret void
3056 //
3057 //
3058 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..4
3059 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3060 // CHECK17-NEXT:  entry:
3061 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3062 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3063 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3064 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3065 // CHECK17-NEXT:    ret void
3066 //
3067 //
3068 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
3069 // CHECK17-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3070 // CHECK17-NEXT:  entry:
3071 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3072 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3073 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3074 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3075 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3076 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3077 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
3078 // CHECK17-NEXT:    ret void
3079 //
3080 //
3081 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7
3082 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3083 // CHECK17-NEXT:  entry:
3084 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3085 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3086 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3087 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3088 // CHECK17-NEXT:    ret void
3089 //
3090 //
3091 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
3092 // CHECK17-SAME: () #[[ATTR4:[0-9]+]] {
3093 // CHECK17-NEXT:  entry:
3094 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3095 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
3096 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
3097 // CHECK17-NEXT:    ret void
3098 //
3099 //
3100 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10
3101 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3102 // CHECK17-NEXT:  entry:
3103 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3104 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3105 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3106 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3107 // CHECK17-NEXT:    ret void
3108 //
3109 //
3110 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
3111 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3112 // CHECK17-NEXT:  entry:
3113 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3114 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3115 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3116 // CHECK17-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3117 // CHECK17-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3118 // CHECK17-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3119 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3120 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3121 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3122 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3123 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3124 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
3125 // CHECK17-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
3126 // CHECK17-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
3127 // CHECK17-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
3128 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
3129 // CHECK17-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3130 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
3131 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
3132 // CHECK17-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
3133 // CHECK17-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
3134 // CHECK17-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
3135 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
3136 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
3137 // CHECK17-NEXT:    ret void
3138 //
3139 //
3140 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
3141 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
3142 // CHECK17-NEXT:  entry:
3143 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3144 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3145 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3146 // CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3147 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3148 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3149 // CHECK17-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3150 // CHECK17-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3151 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3152 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3153 // CHECK17-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
3154 // CHECK17-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
3155 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3156 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
3157 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
3158 // CHECK17-NEXT:    ret void
3159 //
3160 //
3161 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3162 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
3163 // CHECK17-NEXT:  entry:
3164 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
3165 // CHECK17-NEXT:    ret void
3166 //
3167 //
3168 // CHECK18-LABEL: define {{[^@]+}}@_Z3bari
3169 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3170 // CHECK18-NEXT:  entry:
3171 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3172 // CHECK18-NEXT:    [[A:%.*]] = alloca i32, align 4
3173 // CHECK18-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
3174 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3175 // CHECK18-NEXT:    store i32 0, i32* [[A]], align 4
3176 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3177 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP0]])
3178 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
3179 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
3180 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
3181 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3182 // CHECK18-NEXT:    [[CALL1:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP2]])
3183 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3184 // CHECK18-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
3185 // CHECK18-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
3186 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3187 // CHECK18-NEXT:    [[CALL3:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP4]])
3188 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3189 // CHECK18-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
3190 // CHECK18-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
3191 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
3192 // CHECK18-NEXT:    ret i32 [[TMP6]]
3193 //
3194 //
3195 // CHECK18-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
3196 // CHECK18-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
3197 // CHECK18-NEXT:  entry:
3198 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3199 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3200 // CHECK18-NEXT:    [[B:%.*]] = alloca i32, align 4
3201 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3202 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3203 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3204 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3205 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3206 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3207 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
3208 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
3209 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
3210 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3211 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3212 // CHECK18-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3213 // CHECK18-NEXT:    store i32 1, i32* [[B]], align 4
3214 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3215 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
3216 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
3217 // CHECK18-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
3218 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
3219 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3220 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV]], align 4
3221 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[B_CASTED]], align 8
3222 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3223 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
3224 // CHECK18-NEXT:    store i32 [[TMP4]], i32* [[CONV2]], align 4
3225 // CHECK18-NEXT:    [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3226 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
3227 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3228 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
3229 // CHECK18-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 8
3230 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3231 // CHECK18-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
3232 // CHECK18-NEXT:    store double* [[A]], double** [[TMP9]], align 8
3233 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3234 // CHECK18-NEXT:    store i8* null, i8** [[TMP10]], align 8
3235 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3236 // CHECK18-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
3237 // CHECK18-NEXT:    store i64 [[TMP3]], i64* [[TMP12]], align 8
3238 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3239 // CHECK18-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
3240 // CHECK18-NEXT:    store i64 [[TMP3]], i64* [[TMP14]], align 8
3241 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3242 // CHECK18-NEXT:    store i8* null, i8** [[TMP15]], align 8
3243 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3244 // CHECK18-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3245 // CHECK18-NEXT:    store i64 [[TMP5]], i64* [[TMP17]], align 8
3246 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3247 // CHECK18-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
3248 // CHECK18-NEXT:    store i64 [[TMP5]], i64* [[TMP19]], align 8
3249 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3250 // CHECK18-NEXT:    store i8* null, i8** [[TMP20]], align 8
3251 // CHECK18-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3252 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3253 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3254 // CHECK18-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
3255 // CHECK18-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3256 // CHECK18-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3257 // CHECK18:       omp_offload.failed:
3258 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i64 [[TMP3]], i64 [[TMP5]]) #[[ATTR2:[0-9]+]]
3259 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3260 // CHECK18:       omp_offload.cont:
3261 // CHECK18-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3262 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3263 // CHECK18-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
3264 // CHECK18-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 8
3265 // CHECK18-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3266 // CHECK18-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
3267 // CHECK18-NEXT:    store double* [[A3]], double** [[TMP29]], align 8
3268 // CHECK18-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
3269 // CHECK18-NEXT:    store i8* null, i8** [[TMP30]], align 8
3270 // CHECK18-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3271 // CHECK18-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3272 // CHECK18-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
3273 // CHECK18-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
3274 // CHECK18-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3275 // CHECK18:       omp_offload.failed7:
3276 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
3277 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3278 // CHECK18:       omp_offload.cont8:
3279 // CHECK18-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3280 // CHECK18-NEXT:    [[TMP35:%.*]] = load double, double* [[A9]], align 8
3281 // CHECK18-NEXT:    [[CONV10:%.*]] = fptosi double [[TMP35]] to i32
3282 // CHECK18-NEXT:    ret i32 [[CONV10]]
3283 //
3284 //
3285 // CHECK18-LABEL: define {{[^@]+}}@_ZL7fstatici
3286 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
3287 // CHECK18-NEXT:  entry:
3288 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3289 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3290 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3291 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3292 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3293 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3294 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3295 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
3296 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [1 x i8*], align 8
3297 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [1 x i8*], align 8
3298 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [1 x i8*], align 8
3299 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3300 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3301 // CHECK18-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
3302 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3303 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
3304 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
3305 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3306 // CHECK18-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3307 // CHECK18-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
3308 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP4]], align 8
3309 // CHECK18-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3310 // CHECK18-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
3311 // CHECK18-NEXT:    store i64 [[TMP2]], i64* [[TMP6]], align 8
3312 // CHECK18-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3313 // CHECK18-NEXT:    store i8* null, i8** [[TMP7]], align 8
3314 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3315 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3316 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3317 // CHECK18-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
3318 // CHECK18-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3319 // CHECK18-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3320 // CHECK18:       omp_offload.failed:
3321 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]]
3322 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3323 // CHECK18:       omp_offload.cont:
3324 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
3325 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
3326 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3327 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3328 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32*
3329 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[CONV3]], align 4
3330 // CHECK18-NEXT:    [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8
3331 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3332 // CHECK18-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3333 // CHECK18-NEXT:    store i64 [[TMP15]], i64* [[TMP17]], align 8
3334 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3335 // CHECK18-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
3336 // CHECK18-NEXT:    store i64 [[TMP15]], i64* [[TMP19]], align 8
3337 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
3338 // CHECK18-NEXT:    store i8* null, i8** [[TMP20]], align 8
3339 // CHECK18-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3340 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3341 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3342 // CHECK18-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
3343 // CHECK18-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3344 // CHECK18-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3345 // CHECK18:       omp_offload.failed7:
3346 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i64 [[TMP15]]) #[[ATTR2]]
3347 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3348 // CHECK18:       omp_offload.cont8:
3349 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
3350 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1
3351 // CHECK18-NEXT:    ret i32 [[ADD9]]
3352 //
3353 //
3354 // CHECK18-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
3355 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
3356 // CHECK18-NEXT:  entry:
3357 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3358 // CHECK18-NEXT:    [[A:%.*]] = alloca i32, align 4
3359 // CHECK18-NEXT:    [[B:%.*]] = alloca i16, align 2
3360 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
3361 // CHECK18-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3362 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3363 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3364 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3365 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3366 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3367 // CHECK18-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3368 // CHECK18-NEXT:    store i32 0, i32* [[A]], align 4
3369 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
3370 // CHECK18-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3371 // CHECK18-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3372 // CHECK18:       omp_offload.failed:
3373 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
3374 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3375 // CHECK18:       omp_offload.cont:
3376 // CHECK18-NEXT:    store i16 1, i16* [[B]], align 2
3377 // CHECK18-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
3378 // CHECK18-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
3379 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3380 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3381 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
3382 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
3383 // CHECK18-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
3384 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_CASTED]] to i16*
3385 // CHECK18-NEXT:    store i16 [[TMP5]], i16* [[CONV1]], align 2
3386 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
3387 // CHECK18-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
3388 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i16*
3389 // CHECK18-NEXT:    store i16 [[TMP7]], i16* [[CONV2]], align 2
3390 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3391 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3392 // CHECK18-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
3393 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP10]], align 8
3394 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3395 // CHECK18-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
3396 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP12]], align 8
3397 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3398 // CHECK18-NEXT:    store i8* null, i8** [[TMP13]], align 8
3399 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3400 // CHECK18-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
3401 // CHECK18-NEXT:    store i64 [[TMP6]], i64* [[TMP15]], align 8
3402 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3403 // CHECK18-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3404 // CHECK18-NEXT:    store i64 [[TMP6]], i64* [[TMP17]], align 8
3405 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3406 // CHECK18-NEXT:    store i8* null, i8** [[TMP18]], align 8
3407 // CHECK18-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3408 // CHECK18-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
3409 // CHECK18-NEXT:    store i64 [[TMP8]], i64* [[TMP20]], align 8
3410 // CHECK18-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3411 // CHECK18-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
3412 // CHECK18-NEXT:    store i64 [[TMP8]], i64* [[TMP22]], align 8
3413 // CHECK18-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3414 // CHECK18-NEXT:    store i8* null, i8** [[TMP23]], align 8
3415 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3416 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3417 // CHECK18-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
3418 // CHECK18-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
3419 // CHECK18-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
3420 // CHECK18-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3421 // CHECK18-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3422 // CHECK18:       omp_offload.failed3:
3423 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2]]
3424 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3425 // CHECK18:       omp_offload.cont4:
3426 // CHECK18-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
3427 // CHECK18-NEXT:    ret i32 [[TMP30]]
3428 //
3429 //
3430 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
3431 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
3432 // CHECK18-NEXT:  entry:
3433 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3434 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3435 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3436 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3437 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3438 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3439 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3440 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3441 // CHECK18-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3442 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3443 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3444 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
3445 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
3446 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
3447 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3448 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
3449 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
3450 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
3451 // CHECK18-NEXT:    ret void
3452 //
3453 //
3454 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
3455 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
3456 // CHECK18-NEXT:  entry:
3457 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3458 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3459 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3460 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3461 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3462 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3463 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3464 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3465 // CHECK18-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3466 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3467 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3468 // CHECK18-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
3469 // CHECK18-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
3470 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3471 // CHECK18-NEXT:    store double [[ADD]], double* [[A]], align 8
3472 // CHECK18-NEXT:    ret void
3473 //
3474 //
3475 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
3476 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
3477 // CHECK18-NEXT:  entry:
3478 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3479 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3480 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3481 // CHECK18-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3482 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
3483 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
3484 // CHECK18-NEXT:    ret void
3485 //
3486 //
3487 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
3488 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
3489 // CHECK18-NEXT:  entry:
3490 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3491 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3492 // CHECK18-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3493 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3494 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3495 // CHECK18-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3496 // CHECK18-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3497 // CHECK18-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3498 // CHECK18-NEXT:    store double 2.500000e+00, double* [[A]], align 8
3499 // CHECK18-NEXT:    ret void
3500 //
3501 //
3502 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
3503 // CHECK18-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3504 // CHECK18-NEXT:  entry:
3505 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3506 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3507 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3508 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3509 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3510 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3511 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3512 // CHECK18-NEXT:    ret void
3513 //
3514 //
3515 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..4
3516 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3517 // CHECK18-NEXT:  entry:
3518 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3519 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3520 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3521 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3522 // CHECK18-NEXT:    ret void
3523 //
3524 //
3525 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
3526 // CHECK18-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3527 // CHECK18-NEXT:  entry:
3528 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3529 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3530 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3531 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3532 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3533 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3534 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
3535 // CHECK18-NEXT:    ret void
3536 //
3537 //
3538 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..7
3539 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3540 // CHECK18-NEXT:  entry:
3541 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3542 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3543 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3544 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3545 // CHECK18-NEXT:    ret void
3546 //
3547 //
3548 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
3549 // CHECK18-SAME: () #[[ATTR4:[0-9]+]] {
3550 // CHECK18-NEXT:  entry:
3551 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3552 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
3553 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
3554 // CHECK18-NEXT:    ret void
3555 //
3556 //
3557 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..10
3558 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3559 // CHECK18-NEXT:  entry:
3560 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3561 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3562 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3563 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3564 // CHECK18-NEXT:    ret void
3565 //
3566 //
3567 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
3568 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3569 // CHECK18-NEXT:  entry:
3570 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3571 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3572 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3573 // CHECK18-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3574 // CHECK18-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
3575 // CHECK18-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3576 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3577 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3578 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3579 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3580 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3581 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
3582 // CHECK18-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
3583 // CHECK18-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
3584 // CHECK18-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
3585 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
3586 // CHECK18-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3587 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
3588 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
3589 // CHECK18-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
3590 // CHECK18-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
3591 // CHECK18-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
3592 // CHECK18-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
3593 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
3594 // CHECK18-NEXT:    ret void
3595 //
3596 //
3597 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
3598 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR1]] {
3599 // CHECK18-NEXT:  entry:
3600 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3601 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3602 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3603 // CHECK18-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
3604 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3605 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3606 // CHECK18-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
3607 // CHECK18-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
3608 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3609 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
3610 // CHECK18-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
3611 // CHECK18-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
3612 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3613 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
3614 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
3615 // CHECK18-NEXT:    ret void
3616 //
3617 //
3618 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3619 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
3620 // CHECK18-NEXT:  entry:
3621 // CHECK18-NEXT:    call void @__tgt_register_requires(i64 1)
3622 // CHECK18-NEXT:    ret void
3623 //
3624 //
3625 // CHECK19-LABEL: define {{[^@]+}}@_Z3bari
3626 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3627 // CHECK19-NEXT:  entry:
3628 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3629 // CHECK19-NEXT:    [[A:%.*]] = alloca i32, align 4
3630 // CHECK19-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
3631 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3632 // CHECK19-NEXT:    store i32 0, i32* [[A]], align 4
3633 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3634 // CHECK19-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
3635 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
3636 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
3637 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
3638 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3639 // CHECK19-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
3640 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3641 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
3642 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
3643 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3644 // CHECK19-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
3645 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3646 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
3647 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
3648 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
3649 // CHECK19-NEXT:    ret i32 [[TMP6]]
3650 //
3651 //
3652 // CHECK19-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
3653 // CHECK19-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
3654 // CHECK19-NEXT:  entry:
3655 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3656 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3657 // CHECK19-NEXT:    [[B:%.*]] = alloca i32, align 4
3658 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3659 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3660 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3661 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3662 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3663 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3664 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
3665 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
3666 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
3667 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3668 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3669 // CHECK19-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3670 // CHECK19-NEXT:    store i32 1, i32* [[B]], align 4
3671 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3672 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
3673 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
3674 // CHECK19-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
3675 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
3676 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
3677 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
3678 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3679 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3680 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3681 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
3682 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3683 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
3684 // CHECK19-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 4
3685 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3686 // CHECK19-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
3687 // CHECK19-NEXT:    store double* [[A]], double** [[TMP9]], align 4
3688 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3689 // CHECK19-NEXT:    store i8* null, i8** [[TMP10]], align 4
3690 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3691 // CHECK19-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3692 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
3693 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3694 // CHECK19-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
3695 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP14]], align 4
3696 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3697 // CHECK19-NEXT:    store i8* null, i8** [[TMP15]], align 4
3698 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3699 // CHECK19-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
3700 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[TMP17]], align 4
3701 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3702 // CHECK19-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
3703 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[TMP19]], align 4
3704 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3705 // CHECK19-NEXT:    store i8* null, i8** [[TMP20]], align 4
3706 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3707 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3708 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3709 // CHECK19-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
3710 // CHECK19-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3711 // CHECK19-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3712 // CHECK19:       omp_offload.failed:
3713 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR2:[0-9]+]]
3714 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3715 // CHECK19:       omp_offload.cont:
3716 // CHECK19-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3717 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3718 // CHECK19-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
3719 // CHECK19-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 4
3720 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3721 // CHECK19-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
3722 // CHECK19-NEXT:    store double* [[A2]], double** [[TMP29]], align 4
3723 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3724 // CHECK19-NEXT:    store i8* null, i8** [[TMP30]], align 4
3725 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3726 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3727 // CHECK19-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
3728 // CHECK19-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
3729 // CHECK19-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3730 // CHECK19:       omp_offload.failed6:
3731 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
3732 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3733 // CHECK19:       omp_offload.cont7:
3734 // CHECK19-NEXT:    [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
3735 // CHECK19-NEXT:    [[TMP35:%.*]] = load double, double* [[A8]], align 4
3736 // CHECK19-NEXT:    [[CONV:%.*]] = fptosi double [[TMP35]] to i32
3737 // CHECK19-NEXT:    ret i32 [[CONV]]
3738 //
3739 //
3740 // CHECK19-LABEL: define {{[^@]+}}@_ZL7fstatici
3741 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
3742 // CHECK19-NEXT:  entry:
3743 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3744 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3745 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3746 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3747 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3748 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3749 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3750 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
3751 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
3752 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
3753 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
3754 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3755 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3756 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
3757 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3758 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3759 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3760 // CHECK19-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3761 // CHECK19-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
3762 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP4]], align 4
3763 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3764 // CHECK19-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
3765 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[TMP6]], align 4
3766 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3767 // CHECK19-NEXT:    store i8* null, i8** [[TMP7]], align 4
3768 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3769 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3770 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3771 // CHECK19-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
3772 // CHECK19-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3773 // CHECK19-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3774 // CHECK19:       omp_offload.failed:
3775 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]]
3776 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3777 // CHECK19:       omp_offload.cont:
3778 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
3779 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
3780 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3781 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3782 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
3783 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
3784 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3785 // CHECK19-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
3786 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[TMP17]], align 4
3787 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3788 // CHECK19-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
3789 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[TMP19]], align 4
3790 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3791 // CHECK19-NEXT:    store i8* null, i8** [[TMP20]], align 4
3792 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3793 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3794 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3795 // CHECK19-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
3796 // CHECK19-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3797 // CHECK19-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3798 // CHECK19:       omp_offload.failed6:
3799 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i32 [[TMP15]]) #[[ATTR2]]
3800 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3801 // CHECK19:       omp_offload.cont7:
3802 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
3803 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1
3804 // CHECK19-NEXT:    ret i32 [[ADD8]]
3805 //
3806 //
3807 // CHECK19-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
3808 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
3809 // CHECK19-NEXT:  entry:
3810 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3811 // CHECK19-NEXT:    [[A:%.*]] = alloca i32, align 4
3812 // CHECK19-NEXT:    [[B:%.*]] = alloca i16, align 2
3813 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
3814 // CHECK19-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
3815 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3816 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3817 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3818 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3819 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3820 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
3821 // CHECK19-NEXT:    store i32 0, i32* [[A]], align 4
3822 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
3823 // CHECK19-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3824 // CHECK19-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3825 // CHECK19:       omp_offload.failed:
3826 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
3827 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3828 // CHECK19:       omp_offload.cont:
3829 // CHECK19-NEXT:    store i16 1, i16* [[B]], align 2
3830 // CHECK19-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
3831 // CHECK19-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
3832 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3833 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
3834 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
3835 // CHECK19-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
3836 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
3837 // CHECK19-NEXT:    store i16 [[TMP5]], i16* [[CONV]], align 2
3838 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
3839 // CHECK19-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
3840 // CHECK19-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i16*
3841 // CHECK19-NEXT:    store i16 [[TMP7]], i16* [[CONV1]], align 2
3842 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3843 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3844 // CHECK19-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3845 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[TMP10]], align 4
3846 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3847 // CHECK19-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3848 // CHECK19-NEXT:    store i32 [[TMP4]], i32* [[TMP12]], align 4
3849 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3850 // CHECK19-NEXT:    store i8* null, i8** [[TMP13]], align 4
3851 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3852 // CHECK19-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
3853 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[TMP15]], align 4
3854 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3855 // CHECK19-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
3856 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[TMP17]], align 4
3857 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3858 // CHECK19-NEXT:    store i8* null, i8** [[TMP18]], align 4
3859 // CHECK19-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3860 // CHECK19-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
3861 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[TMP20]], align 4
3862 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3863 // CHECK19-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
3864 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[TMP22]], align 4
3865 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3866 // CHECK19-NEXT:    store i8* null, i8** [[TMP23]], align 4
3867 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3868 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3869 // CHECK19-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
3870 // CHECK19-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
3871 // CHECK19-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
3872 // CHECK19-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3873 // CHECK19-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3874 // CHECK19:       omp_offload.failed2:
3875 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2]]
3876 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
3877 // CHECK19:       omp_offload.cont3:
3878 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
3879 // CHECK19-NEXT:    ret i32 [[TMP30]]
3880 //
3881 //
3882 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
3883 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
3884 // CHECK19-NEXT:  entry:
3885 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3886 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3887 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3888 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
3889 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3890 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3891 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3892 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3893 // CHECK19-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3894 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3895 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
3896 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
3897 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
3898 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
3899 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
3900 // CHECK19-NEXT:    ret void
3901 //
3902 //
3903 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
3904 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
3905 // CHECK19-NEXT:  entry:
3906 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3907 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3908 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3909 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
3910 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3911 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3912 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3913 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
3914 // CHECK19-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3915 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
3916 // CHECK19-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
3917 // CHECK19-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
3918 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3919 // CHECK19-NEXT:    store double [[ADD]], double* [[A]], align 4
3920 // CHECK19-NEXT:    ret void
3921 //
3922 //
3923 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
3924 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
3925 // CHECK19-NEXT:  entry:
3926 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3927 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3928 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3929 // CHECK19-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3930 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
3931 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
3932 // CHECK19-NEXT:    ret void
3933 //
3934 //
3935 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
3936 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
3937 // CHECK19-NEXT:  entry:
3938 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3939 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3940 // CHECK19-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
3941 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3942 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3943 // CHECK19-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
3944 // CHECK19-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
3945 // CHECK19-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3946 // CHECK19-NEXT:    store double 2.500000e+00, double* [[A]], align 4
3947 // CHECK19-NEXT:    ret void
3948 //
3949 //
3950 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
3951 // CHECK19-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3952 // CHECK19-NEXT:  entry:
3953 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3954 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3955 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3956 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3957 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3958 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3959 // CHECK19-NEXT:    ret void
3960 //
3961 //
3962 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..4
3963 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3964 // CHECK19-NEXT:  entry:
3965 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3966 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3967 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3968 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3969 // CHECK19-NEXT:    ret void
3970 //
3971 //
3972 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
3973 // CHECK19-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3974 // CHECK19-NEXT:  entry:
3975 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3976 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3977 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3978 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3979 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
3980 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
3981 // CHECK19-NEXT:    ret void
3982 //
3983 //
3984 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7
3985 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3986 // CHECK19-NEXT:  entry:
3987 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3988 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3989 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3990 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3991 // CHECK19-NEXT:    ret void
3992 //
3993 //
3994 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
3995 // CHECK19-SAME: () #[[ATTR4:[0-9]+]] {
3996 // CHECK19-NEXT:  entry:
3997 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
3998 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
3999 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
4000 // CHECK19-NEXT:    ret void
4001 //
4002 //
4003 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10
4004 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4005 // CHECK19-NEXT:  entry:
4006 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4007 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4008 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4009 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4010 // CHECK19-NEXT:    ret void
4011 //
4012 //
4013 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4014 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4015 // CHECK19-NEXT:  entry:
4016 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4017 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4018 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4019 // CHECK19-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4020 // CHECK19-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4021 // CHECK19-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4022 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4023 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4024 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4025 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4026 // CHECK19-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
4027 // CHECK19-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
4028 // CHECK19-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
4029 // CHECK19-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4030 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
4031 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
4032 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
4033 // CHECK19-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
4034 // CHECK19-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
4035 // CHECK19-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
4036 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
4037 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
4038 // CHECK19-NEXT:    ret void
4039 //
4040 //
4041 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
4042 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
4043 // CHECK19-NEXT:  entry:
4044 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4045 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4046 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4047 // CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4048 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4049 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4050 // CHECK19-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4051 // CHECK19-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4052 // CHECK19-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4053 // CHECK19-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
4054 // CHECK19-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
4055 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
4056 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
4057 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
4058 // CHECK19-NEXT:    ret void
4059 //
4060 //
4061 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4062 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
4063 // CHECK19-NEXT:  entry:
4064 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
4065 // CHECK19-NEXT:    ret void
4066 //
4067 //
4068 // CHECK20-LABEL: define {{[^@]+}}@_Z3bari
4069 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
4070 // CHECK20-NEXT:  entry:
4071 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4072 // CHECK20-NEXT:    [[A:%.*]] = alloca i32, align 4
4073 // CHECK20-NEXT:    [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
4074 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4075 // CHECK20-NEXT:    store i32 0, i32* [[A]], align 4
4076 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4077 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP0]])
4078 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A]], align 4
4079 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
4080 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[A]], align 4
4081 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4082 // CHECK20-NEXT:    [[CALL1:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP2]])
4083 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
4084 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
4085 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[A]], align 4
4086 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
4087 // CHECK20-NEXT:    [[CALL3:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP4]])
4088 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[A]], align 4
4089 // CHECK20-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
4090 // CHECK20-NEXT:    store i32 [[ADD4]], i32* [[A]], align 4
4091 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[A]], align 4
4092 // CHECK20-NEXT:    ret i32 [[TMP6]]
4093 //
4094 //
4095 // CHECK20-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
4096 // CHECK20-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
4097 // CHECK20-NEXT:  entry:
4098 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4099 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4100 // CHECK20-NEXT:    [[B:%.*]] = alloca i32, align 4
4101 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4102 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4103 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4104 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4105 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4106 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4107 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
4108 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
4109 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
4110 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4111 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4112 // CHECK20-NEXT:    [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4113 // CHECK20-NEXT:    store i32 1, i32* [[B]], align 4
4114 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4115 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B]], align 4
4116 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
4117 // CHECK20-NEXT:    store i32 [[SUB]], i32* [[DOTCAPTURE_EXPR_]], align 4
4118 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[B]], align 4
4119 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[B_CASTED]], align 4
4120 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_CASTED]], align 4
4121 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4122 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4123 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4124 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
4125 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4126 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to %struct.S1**
4127 // CHECK20-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP7]], align 4
4128 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4129 // CHECK20-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to double**
4130 // CHECK20-NEXT:    store double* [[A]], double** [[TMP9]], align 4
4131 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4132 // CHECK20-NEXT:    store i8* null, i8** [[TMP10]], align 4
4133 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4134 // CHECK20-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
4135 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP12]], align 4
4136 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4137 // CHECK20-NEXT:    [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
4138 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP14]], align 4
4139 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4140 // CHECK20-NEXT:    store i8* null, i8** [[TMP15]], align 4
4141 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4142 // CHECK20-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
4143 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[TMP17]], align 4
4144 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4145 // CHECK20-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
4146 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[TMP19]], align 4
4147 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4148 // CHECK20-NEXT:    store i8* null, i8** [[TMP20]], align 4
4149 // CHECK20-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4150 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4151 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4152 // CHECK20-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, i32 3, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
4153 // CHECK20-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4154 // CHECK20-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4155 // CHECK20:       omp_offload.failed:
4156 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(%struct.S1* [[THIS1]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR2:[0-9]+]]
4157 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4158 // CHECK20:       omp_offload.cont:
4159 // CHECK20-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
4160 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4161 // CHECK20-NEXT:    [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S1**
4162 // CHECK20-NEXT:    store %struct.S1* [[THIS1]], %struct.S1** [[TMP27]], align 4
4163 // CHECK20-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4164 // CHECK20-NEXT:    [[TMP29:%.*]] = bitcast i8** [[TMP28]] to double**
4165 // CHECK20-NEXT:    store double* [[A2]], double** [[TMP29]], align 4
4166 // CHECK20-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
4167 // CHECK20-NEXT:    store i8* null, i8** [[TMP30]], align 4
4168 // CHECK20-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4169 // CHECK20-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4170 // CHECK20-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, i32 1, i8** [[TMP31]], i8** [[TMP32]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 1024, i32 0)
4171 // CHECK20-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
4172 // CHECK20-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4173 // CHECK20:       omp_offload.failed6:
4174 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(%struct.S1* [[THIS1]]) #[[ATTR2]]
4175 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
4176 // CHECK20:       omp_offload.cont7:
4177 // CHECK20-NEXT:    [[A8:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[THIS1]], i32 0, i32 0
4178 // CHECK20-NEXT:    [[TMP35:%.*]] = load double, double* [[A8]], align 4
4179 // CHECK20-NEXT:    [[CONV:%.*]] = fptosi double [[TMP35]] to i32
4180 // CHECK20-NEXT:    ret i32 [[CONV]]
4181 //
4182 //
4183 // CHECK20-LABEL: define {{[^@]+}}@_ZL7fstatici
4184 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
4185 // CHECK20-NEXT:  entry:
4186 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4187 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4188 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4189 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4190 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4191 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4192 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4193 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
4194 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
4195 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
4196 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
4197 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4198 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4199 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4
4200 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4201 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4202 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4203 // CHECK20-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4204 // CHECK20-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
4205 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP4]], align 4
4206 // CHECK20-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4207 // CHECK20-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
4208 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[TMP6]], align 4
4209 // CHECK20-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4210 // CHECK20-NEXT:    store i8* null, i8** [[TMP7]], align 4
4211 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4212 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4213 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4214 // CHECK20-NEXT:    [[TMP11:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 [[TMP10]], i32 0)
4215 // CHECK20-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4216 // CHECK20-NEXT:    br i1 [[TMP12]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4217 // CHECK20:       omp_offload.failed:
4218 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]]
4219 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4220 // CHECK20:       omp_offload.cont:
4221 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
4222 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 32, [[TMP13]]
4223 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4224 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4225 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
4226 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
4227 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4228 // CHECK20-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
4229 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[TMP17]], align 4
4230 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4231 // CHECK20-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
4232 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[TMP19]], align 4
4233 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
4234 // CHECK20-NEXT:    store i8* null, i8** [[TMP20]], align 4
4235 // CHECK20-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4236 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4237 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4238 // CHECK20-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, i32 1, i8** [[TMP21]], i8** [[TMP22]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 [[TMP23]], i32 0)
4239 // CHECK20-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4240 // CHECK20-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4241 // CHECK20:       omp_offload.failed6:
4242 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108(i32 [[TMP15]]) #[[ATTR2]]
4243 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
4244 // CHECK20:       omp_offload.cont7:
4245 // CHECK20-NEXT:    [[TMP26:%.*]] = load i32, i32* [[N_ADDR]], align 4
4246 // CHECK20-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], 1
4247 // CHECK20-NEXT:    ret i32 [[ADD8]]
4248 //
4249 //
4250 // CHECK20-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
4251 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
4252 // CHECK20-NEXT:  entry:
4253 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
4254 // CHECK20-NEXT:    [[A:%.*]] = alloca i32, align 4
4255 // CHECK20-NEXT:    [[B:%.*]] = alloca i16, align 2
4256 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i16, align 2
4257 // CHECK20-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4258 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4259 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4260 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4261 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4262 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4263 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
4264 // CHECK20-NEXT:    store i32 0, i32* [[A]], align 4
4265 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 20, i32 0)
4266 // CHECK20-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4267 // CHECK20-NEXT:    br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4268 // CHECK20:       omp_offload.failed:
4269 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88() #[[ATTR2]]
4270 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4271 // CHECK20:       omp_offload.cont:
4272 // CHECK20-NEXT:    store i16 1, i16* [[B]], align 2
4273 // CHECK20-NEXT:    [[TMP2:%.*]] = load i16, i16* [[B]], align 2
4274 // CHECK20-NEXT:    store i16 [[TMP2]], i16* [[DOTCAPTURE_EXPR_]], align 2
4275 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A]], align 4
4276 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
4277 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
4278 // CHECK20-NEXT:    [[TMP5:%.*]] = load i16, i16* [[B]], align 2
4279 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_CASTED]] to i16*
4280 // CHECK20-NEXT:    store i16 [[TMP5]], i16* [[CONV]], align 2
4281 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
4282 // CHECK20-NEXT:    [[TMP7:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
4283 // CHECK20-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i16*
4284 // CHECK20-NEXT:    store i16 [[TMP7]], i16* [[CONV1]], align 2
4285 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4286 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4287 // CHECK20-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4288 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[TMP10]], align 4
4289 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4290 // CHECK20-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
4291 // CHECK20-NEXT:    store i32 [[TMP4]], i32* [[TMP12]], align 4
4292 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4293 // CHECK20-NEXT:    store i8* null, i8** [[TMP13]], align 4
4294 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4295 // CHECK20-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
4296 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[TMP15]], align 4
4297 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4298 // CHECK20-NEXT:    [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
4299 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[TMP17]], align 4
4300 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4301 // CHECK20-NEXT:    store i8* null, i8** [[TMP18]], align 4
4302 // CHECK20-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4303 // CHECK20-NEXT:    [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
4304 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[TMP20]], align 4
4305 // CHECK20-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4306 // CHECK20-NEXT:    [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
4307 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[TMP22]], align 4
4308 // CHECK20-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4309 // CHECK20-NEXT:    store i8* null, i8** [[TMP23]], align 4
4310 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4311 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4312 // CHECK20-NEXT:    [[TMP26:%.*]] = load i16, i16* [[DOTCAPTURE_EXPR_]], align 2
4313 // CHECK20-NEXT:    [[TMP27:%.*]] = sext i16 [[TMP26]] to i32
4314 // CHECK20-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB1]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 [[TMP27]], i32 0)
4315 // CHECK20-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4316 // CHECK20-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4317 // CHECK20:       omp_offload.failed2:
4318 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2]]
4319 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT3]]
4320 // CHECK20:       omp_offload.cont3:
4321 // CHECK20-NEXT:    [[TMP30:%.*]] = load i32, i32* [[A]], align 4
4322 // CHECK20-NEXT:    ret i32 [[TMP30]]
4323 //
4324 //
4325 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4326 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {
4327 // CHECK20-NEXT:  entry:
4328 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4329 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4330 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4331 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4332 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4333 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4334 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4335 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4336 // CHECK20-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4337 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4338 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4339 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
4340 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
4341 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
4342 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
4343 // CHECK20-NEXT:    ret void
4344 //
4345 //
4346 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
4347 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
4348 // CHECK20-NEXT:  entry:
4349 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4350 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4351 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4352 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4353 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4354 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4355 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4356 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4357 // CHECK20-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4358 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
4359 // CHECK20-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
4360 // CHECK20-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
4361 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4362 // CHECK20-NEXT:    store double [[ADD]], double* [[A]], align 4
4363 // CHECK20-NEXT:    ret void
4364 //
4365 //
4366 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4367 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
4368 // CHECK20-NEXT:  entry:
4369 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4370 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4371 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4372 // CHECK20-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4373 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
4374 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4375 // CHECK20-NEXT:    ret void
4376 //
4377 //
4378 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
4379 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR1]] {
4380 // CHECK20-NEXT:  entry:
4381 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4382 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4383 // CHECK20-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4384 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4385 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4386 // CHECK20-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4387 // CHECK20-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4388 // CHECK20-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4389 // CHECK20-NEXT:    store double 2.500000e+00, double* [[A]], align 4
4390 // CHECK20-NEXT:    ret void
4391 //
4392 //
4393 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4394 // CHECK20-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4395 // CHECK20-NEXT:  entry:
4396 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4397 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4398 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4399 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4400 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4401 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4402 // CHECK20-NEXT:    ret void
4403 //
4404 //
4405 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..4
4406 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4407 // CHECK20-NEXT:  entry:
4408 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4409 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4410 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4411 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4412 // CHECK20-NEXT:    ret void
4413 //
4414 //
4415 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4416 // CHECK20-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4417 // CHECK20-NEXT:  entry:
4418 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4419 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4420 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4421 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4422 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4423 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*))
4424 // CHECK20-NEXT:    ret void
4425 //
4426 //
4427 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..7
4428 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4429 // CHECK20-NEXT:  entry:
4430 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4431 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4432 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4433 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4434 // CHECK20-NEXT:    ret void
4435 //
4436 //
4437 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
4438 // CHECK20-SAME: () #[[ATTR4:[0-9]+]] {
4439 // CHECK20-NEXT:  entry:
4440 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4441 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
4442 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
4443 // CHECK20-NEXT:    ret void
4444 //
4445 //
4446 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..10
4447 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4448 // CHECK20-NEXT:  entry:
4449 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4450 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4451 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4452 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4453 // CHECK20-NEXT:    ret void
4454 //
4455 //
4456 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4457 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4458 // CHECK20-NEXT:  entry:
4459 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4460 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4461 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4462 // CHECK20-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4463 // CHECK20-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4464 // CHECK20-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4465 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4466 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4467 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4468 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4469 // CHECK20-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
4470 // CHECK20-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
4471 // CHECK20-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
4472 // CHECK20-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4473 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
4474 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
4475 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
4476 // CHECK20-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
4477 // CHECK20-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
4478 // CHECK20-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
4479 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
4480 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
4481 // CHECK20-NEXT:    ret void
4482 //
4483 //
4484 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
4485 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR1]] {
4486 // CHECK20-NEXT:  entry:
4487 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4488 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4489 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4490 // CHECK20-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4491 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4492 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4493 // CHECK20-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4494 // CHECK20-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4495 // CHECK20-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
4496 // CHECK20-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
4497 // CHECK20-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
4498 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
4499 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
4500 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
4501 // CHECK20-NEXT:    ret void
4502 //
4503 //
4504 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4505 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
4506 // CHECK20-NEXT:  entry:
4507 // CHECK20-NEXT:    call void @__tgt_register_requires(i64 1)
4508 // CHECK20-NEXT:    ret void
4509 //
4510 //
4511 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4512 // CHECK25-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
4513 // CHECK25-NEXT:  entry:
4514 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4515 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
4516 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4517 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4518 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4519 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4520 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4521 // CHECK25-NEXT:    ret void
4522 //
4523 //
4524 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.
4525 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4526 // CHECK25-NEXT:  entry:
4527 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4528 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4529 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4530 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4531 // CHECK25-NEXT:    ret void
4532 //
4533 //
4534 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4535 // CHECK25-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4536 // CHECK25-NEXT:  entry:
4537 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4538 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4539 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4540 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4541 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4542 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4543 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
4544 // CHECK25-NEXT:    ret void
4545 //
4546 //
4547 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1
4548 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4549 // CHECK25-NEXT:  entry:
4550 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4551 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4552 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4553 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4554 // CHECK25-NEXT:    ret void
4555 //
4556 //
4557 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4558 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4559 // CHECK25-NEXT:  entry:
4560 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4561 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4562 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4563 // CHECK25-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4564 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4565 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4566 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4567 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4568 // CHECK25-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4569 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4570 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4571 // CHECK25-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
4572 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4573 // CHECK25-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
4574 // CHECK25-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
4575 // CHECK25-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
4576 // CHECK25-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
4577 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
4578 // CHECK25-NEXT:    ret void
4579 //
4580 //
4581 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2
4582 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
4583 // CHECK25-NEXT:  entry:
4584 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4585 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4586 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4587 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4588 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4589 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4590 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4591 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4592 // CHECK25-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4593 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4594 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4595 // CHECK25-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
4596 // CHECK25-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
4597 // CHECK25-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4598 // CHECK25-NEXT:    store double [[ADD]], double* [[A]], align 8
4599 // CHECK25-NEXT:    ret void
4600 //
4601 //
4602 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4603 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
4604 // CHECK25-NEXT:  entry:
4605 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4606 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4607 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4608 // CHECK25-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4609 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
4610 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4611 // CHECK25-NEXT:    ret void
4612 //
4613 //
4614 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3
4615 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
4616 // CHECK25-NEXT:  entry:
4617 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4618 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4619 // CHECK25-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4620 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4621 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4622 // CHECK25-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4623 // CHECK25-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4624 // CHECK25-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4625 // CHECK25-NEXT:    store double 2.500000e+00, double* [[A]], align 8
4626 // CHECK25-NEXT:    ret void
4627 //
4628 //
4629 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
4630 // CHECK25-SAME: () #[[ATTR3:[0-9]+]] {
4631 // CHECK25-NEXT:  entry:
4632 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4633 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
4634 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4635 // CHECK25-NEXT:    ret void
4636 //
4637 //
4638 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..4
4639 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4640 // CHECK25-NEXT:  entry:
4641 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4642 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4643 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4644 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4645 // CHECK25-NEXT:    ret void
4646 //
4647 //
4648 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4649 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4650 // CHECK25-NEXT:  entry:
4651 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4652 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4653 // CHECK25-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4654 // CHECK25-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4655 // CHECK25-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4656 // CHECK25-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4657 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4658 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4659 // CHECK25-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4660 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4661 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4662 // CHECK25-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
4663 // CHECK25-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
4664 // CHECK25-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
4665 // CHECK25-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4666 // CHECK25-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
4667 // CHECK25-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
4668 // CHECK25-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
4669 // CHECK25-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
4670 // CHECK25-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
4671 // CHECK25-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
4672 // CHECK25-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
4673 // CHECK25-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
4674 // CHECK25-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
4675 // CHECK25-NEXT:    ret void
4676 //
4677 //
4678 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..5
4679 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
4680 // CHECK25-NEXT:  entry:
4681 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4682 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4683 // CHECK25-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4684 // CHECK25-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4685 // CHECK25-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4686 // CHECK25-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4687 // CHECK25-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4688 // CHECK25-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4689 // CHECK25-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4690 // CHECK25-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4691 // CHECK25-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
4692 // CHECK25-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
4693 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4694 // CHECK25-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
4695 // CHECK25-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
4696 // CHECK25-NEXT:    ret void
4697 //
4698 //
4699 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4700 // CHECK26-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
4701 // CHECK26-NEXT:  entry:
4702 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4703 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
4704 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4705 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4706 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4707 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4708 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4709 // CHECK26-NEXT:    ret void
4710 //
4711 //
4712 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined.
4713 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4714 // CHECK26-NEXT:  entry:
4715 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4716 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4717 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4718 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4719 // CHECK26-NEXT:    ret void
4720 //
4721 //
4722 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4723 // CHECK26-SAME: (i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4724 // CHECK26-NEXT:  entry:
4725 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4726 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4727 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4728 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4729 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4730 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4731 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
4732 // CHECK26-NEXT:    ret void
4733 //
4734 //
4735 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1
4736 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4737 // CHECK26-NEXT:  entry:
4738 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4739 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4740 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4741 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4742 // CHECK26-NEXT:    ret void
4743 //
4744 //
4745 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4746 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4747 // CHECK26-NEXT:  entry:
4748 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4749 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4750 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4751 // CHECK26-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4752 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4753 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4754 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4755 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4756 // CHECK26-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4757 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4758 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4759 // CHECK26-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 8
4760 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4761 // CHECK26-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
4762 // CHECK26-NEXT:    [[CONV2:%.*]] = bitcast i64* [[B_CASTED]] to i32*
4763 // CHECK26-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
4764 // CHECK26-NEXT:    [[TMP4:%.*]] = load i64, i64* [[B_CASTED]], align 8
4765 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i64 [[TMP4]])
4766 // CHECK26-NEXT:    ret void
4767 //
4768 //
4769 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2
4770 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
4771 // CHECK26-NEXT:  entry:
4772 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4773 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4774 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4775 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4776 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4777 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4778 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4779 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4780 // CHECK26-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4781 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
4782 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4783 // CHECK26-NEXT:    [[CONV1:%.*]] = sitofp i32 [[TMP1]] to double
4784 // CHECK26-NEXT:    [[ADD:%.*]] = fadd double [[CONV1]], 1.500000e+00
4785 // CHECK26-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4786 // CHECK26-NEXT:    store double [[ADD]], double* [[A]], align 8
4787 // CHECK26-NEXT:    ret void
4788 //
4789 //
4790 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4791 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
4792 // CHECK26-NEXT:  entry:
4793 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4794 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4795 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4796 // CHECK26-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4797 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
4798 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4799 // CHECK26-NEXT:    ret void
4800 //
4801 //
4802 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3
4803 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
4804 // CHECK26-NEXT:  entry:
4805 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4806 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4807 // CHECK26-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
4808 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4809 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4810 // CHECK26-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
4811 // CHECK26-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
4812 // CHECK26-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4813 // CHECK26-NEXT:    store double 2.500000e+00, double* [[A]], align 8
4814 // CHECK26-NEXT:    ret void
4815 //
4816 //
4817 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
4818 // CHECK26-SAME: () #[[ATTR3:[0-9]+]] {
4819 // CHECK26-NEXT:  entry:
4820 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4821 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
4822 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4823 // CHECK26-NEXT:    ret void
4824 //
4825 //
4826 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..4
4827 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4828 // CHECK26-NEXT:  entry:
4829 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4830 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4831 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4832 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4833 // CHECK26-NEXT:    ret void
4834 //
4835 //
4836 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
4837 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[B:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4838 // CHECK26-NEXT:  entry:
4839 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4840 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4841 // CHECK26-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4842 // CHECK26-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
4843 // CHECK26-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
4844 // CHECK26-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4845 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4846 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4847 // CHECK26-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4848 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4849 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4850 // CHECK26-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i16*
4851 // CHECK26-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV2]], align 8
4852 // CHECK26-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
4853 // CHECK26-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4854 // CHECK26-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
4855 // CHECK26-NEXT:    [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32*
4856 // CHECK26-NEXT:    store i32 [[TMP3]], i32* [[CONV3]], align 4
4857 // CHECK26-NEXT:    [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
4858 // CHECK26-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV1]], align 8
4859 // CHECK26-NEXT:    [[CONV4:%.*]] = bitcast i64* [[B_CASTED]] to i16*
4860 // CHECK26-NEXT:    store i16 [[TMP5]], i16* [[CONV4]], align 2
4861 // CHECK26-NEXT:    [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
4862 // CHECK26-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]])
4863 // CHECK26-NEXT:    ret void
4864 //
4865 //
4866 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..5
4867 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
4868 // CHECK26-NEXT:  entry:
4869 // CHECK26-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4870 // CHECK26-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4871 // CHECK26-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4872 // CHECK26-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
4873 // CHECK26-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4874 // CHECK26-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4875 // CHECK26-NEXT:    store i64 [[A]], i64* [[A_ADDR]], align 8
4876 // CHECK26-NEXT:    store i64 [[B]], i64* [[B_ADDR]], align 8
4877 // CHECK26-NEXT:    [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
4878 // CHECK26-NEXT:    [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i16*
4879 // CHECK26-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV1]], align 8
4880 // CHECK26-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP0]] to i32
4881 // CHECK26-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4882 // CHECK26-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV2]]
4883 // CHECK26-NEXT:    store i32 [[ADD]], i32* [[CONV]], align 8
4884 // CHECK26-NEXT:    ret void
4885 //
4886 //
4887 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
4888 // CHECK27-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
4889 // CHECK27-NEXT:  entry:
4890 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4891 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
4892 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4893 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4894 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4895 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4896 // CHECK27-NEXT:    ret void
4897 //
4898 //
4899 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.
4900 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4901 // CHECK27-NEXT:  entry:
4902 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4903 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4904 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4905 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4906 // CHECK27-NEXT:    ret void
4907 //
4908 //
4909 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
4910 // CHECK27-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4911 // CHECK27-NEXT:  entry:
4912 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4913 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4914 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4915 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4916 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
4917 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
4918 // CHECK27-NEXT:    ret void
4919 //
4920 //
4921 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1
4922 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
4923 // CHECK27-NEXT:  entry:
4924 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4925 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4926 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4927 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4928 // CHECK27-NEXT:    ret void
4929 //
4930 //
4931 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
4932 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
4933 // CHECK27-NEXT:  entry:
4934 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4935 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4936 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4937 // CHECK27-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
4938 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4939 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4940 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4941 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4942 // CHECK27-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4943 // CHECK27-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4944 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
4945 // CHECK27-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
4946 // CHECK27-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
4947 // CHECK27-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
4948 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
4949 // CHECK27-NEXT:    ret void
4950 //
4951 //
4952 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2
4953 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
4954 // CHECK27-NEXT:  entry:
4955 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4956 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4957 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4958 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
4959 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4960 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4961 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4962 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
4963 // CHECK27-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4964 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
4965 // CHECK27-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
4966 // CHECK27-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
4967 // CHECK27-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4968 // CHECK27-NEXT:    store double [[ADD]], double* [[A]], align 4
4969 // CHECK27-NEXT:    ret void
4970 //
4971 //
4972 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
4973 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
4974 // CHECK27-NEXT:  entry:
4975 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4976 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
4977 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4978 // CHECK27-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4979 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
4980 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
4981 // CHECK27-NEXT:    ret void
4982 //
4983 //
4984 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3
4985 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
4986 // CHECK27-NEXT:  entry:
4987 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4988 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4989 // CHECK27-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4990 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4991 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4992 // CHECK27-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4993 // CHECK27-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4994 // CHECK27-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
4995 // CHECK27-NEXT:    store double 2.500000e+00, double* [[A]], align 4
4996 // CHECK27-NEXT:    ret void
4997 //
4998 //
4999 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
5000 // CHECK27-SAME: () #[[ATTR3:[0-9]+]] {
5001 // CHECK27-NEXT:  entry:
5002 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5003 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
5004 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5005 // CHECK27-NEXT:    ret void
5006 //
5007 //
5008 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..4
5009 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5010 // CHECK27-NEXT:  entry:
5011 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5012 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5013 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5014 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5015 // CHECK27-NEXT:    ret void
5016 //
5017 //
5018 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
5019 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5020 // CHECK27-NEXT:  entry:
5021 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5022 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5023 // CHECK27-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5024 // CHECK27-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5025 // CHECK27-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5026 // CHECK27-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5027 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5028 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5029 // CHECK27-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5030 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5031 // CHECK27-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
5032 // CHECK27-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
5033 // CHECK27-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
5034 // CHECK27-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
5035 // CHECK27-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
5036 // CHECK27-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
5037 // CHECK27-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
5038 // CHECK27-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
5039 // CHECK27-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
5040 // CHECK27-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
5041 // CHECK27-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
5042 // CHECK27-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
5043 // CHECK27-NEXT:    ret void
5044 //
5045 //
5046 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..5
5047 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
5048 // CHECK27-NEXT:  entry:
5049 // CHECK27-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5050 // CHECK27-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5051 // CHECK27-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5052 // CHECK27-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5053 // CHECK27-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5054 // CHECK27-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5055 // CHECK27-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5056 // CHECK27-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5057 // CHECK27-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5058 // CHECK27-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
5059 // CHECK27-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
5060 // CHECK27-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5061 // CHECK27-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
5062 // CHECK27-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
5063 // CHECK27-NEXT:    ret void
5064 //
5065 //
5066 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104
5067 // CHECK28-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] {
5068 // CHECK28-NEXT:  entry:
5069 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5070 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
5071 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5072 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5073 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
5074 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5075 // CHECK28-NEXT:    ret void
5076 //
5077 //
5078 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined.
5079 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5080 // CHECK28-NEXT:  entry:
5081 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5082 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5083 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5084 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5085 // CHECK28-NEXT:    ret void
5086 //
5087 //
5088 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108
5089 // CHECK28-SAME: (i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5090 // CHECK28-NEXT:  entry:
5091 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5092 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5093 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5094 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5095 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
5096 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
5097 // CHECK28-NEXT:    ret void
5098 //
5099 //
5100 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1
5101 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5102 // CHECK28-NEXT:  entry:
5103 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5104 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5105 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5106 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5107 // CHECK28-NEXT:    ret void
5108 //
5109 //
5110 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121
5111 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5112 // CHECK28-NEXT:  entry:
5113 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5114 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5115 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5116 // CHECK28-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5117 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5118 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5119 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5120 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5121 // CHECK28-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5122 // CHECK28-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5123 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
5124 // CHECK28-NEXT:    [[TMP3:%.*]] = load i32, i32* [[B_ADDR]], align 4
5125 // CHECK28-NEXT:    store i32 [[TMP3]], i32* [[B_CASTED]], align 4
5126 // CHECK28-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B_CASTED]], align 4
5127 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]], i32 [[TMP4]])
5128 // CHECK28-NEXT:    ret void
5129 //
5130 //
5131 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2
5132 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
5133 // CHECK28-NEXT:  entry:
5134 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5135 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5136 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5137 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5138 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5139 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5140 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5141 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5142 // CHECK28-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5143 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[B_ADDR]], align 4
5144 // CHECK28-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
5145 // CHECK28-NEXT:    [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00
5146 // CHECK28-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5147 // CHECK28-NEXT:    store double [[ADD]], double* [[A]], align 4
5148 // CHECK28-NEXT:    ret void
5149 //
5150 //
5151 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126
5152 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
5153 // CHECK28-NEXT:  entry:
5154 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5155 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5156 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5157 // CHECK28-NEXT:    [[TMP1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5158 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1024, i32 0)
5159 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.S1* [[TMP1]])
5160 // CHECK28-NEXT:    ret void
5161 //
5162 //
5163 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3
5164 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]]) #[[ATTR0]] {
5165 // CHECK28-NEXT:  entry:
5166 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5167 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5168 // CHECK28-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5169 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5170 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5171 // CHECK28-NEXT:    store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5172 // CHECK28-NEXT:    [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5173 // CHECK28-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5174 // CHECK28-NEXT:    store double 2.500000e+00, double* [[A]], align 4
5175 // CHECK28-NEXT:    ret void
5176 //
5177 //
5178 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l88
5179 // CHECK28-SAME: () #[[ATTR3:[0-9]+]] {
5180 // CHECK28-NEXT:  entry:
5181 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5182 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 20, i32 0)
5183 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5184 // CHECK28-NEXT:    ret void
5185 //
5186 //
5187 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..4
5188 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
5189 // CHECK28-NEXT:  entry:
5190 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5191 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5192 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5193 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5194 // CHECK28-NEXT:    ret void
5195 //
5196 //
5197 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93
5198 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
5199 // CHECK28-NEXT:  entry:
5200 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5201 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5202 // CHECK28-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5203 // CHECK28-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5204 // CHECK28-NEXT:    [[B_CASTED:%.*]] = alloca i32, align 4
5205 // CHECK28-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
5206 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5207 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5208 // CHECK28-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5209 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5210 // CHECK28-NEXT:    [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i16*
5211 // CHECK28-NEXT:    [[TMP1:%.*]] = load i16, i16* [[CONV1]], align 4
5212 // CHECK28-NEXT:    [[TMP2:%.*]] = sext i16 [[TMP1]] to i32
5213 // CHECK28-NEXT:    call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 0)
5214 // CHECK28-NEXT:    [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
5215 // CHECK28-NEXT:    store i32 [[TMP3]], i32* [[A_CASTED]], align 4
5216 // CHECK28-NEXT:    [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
5217 // CHECK28-NEXT:    [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
5218 // CHECK28-NEXT:    [[CONV2:%.*]] = bitcast i32* [[B_CASTED]] to i16*
5219 // CHECK28-NEXT:    store i16 [[TMP5]], i16* [[CONV2]], align 2
5220 // CHECK28-NEXT:    [[TMP6:%.*]] = load i32, i32* [[B_CASTED]], align 4
5221 // CHECK28-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]])
5222 // CHECK28-NEXT:    ret void
5223 //
5224 //
5225 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..5
5226 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
5227 // CHECK28-NEXT:  entry:
5228 // CHECK28-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5229 // CHECK28-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5230 // CHECK28-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5231 // CHECK28-NEXT:    [[B_ADDR:%.*]] = alloca i32, align 4
5232 // CHECK28-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5233 // CHECK28-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5234 // CHECK28-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5235 // CHECK28-NEXT:    store i32 [[B]], i32* [[B_ADDR]], align 4
5236 // CHECK28-NEXT:    [[CONV:%.*]] = bitcast i32* [[B_ADDR]] to i16*
5237 // CHECK28-NEXT:    [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
5238 // CHECK28-NEXT:    [[CONV1:%.*]] = sext i16 [[TMP0]] to i32
5239 // CHECK28-NEXT:    [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5240 // CHECK28-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV1]]
5241 // CHECK28-NEXT:    store i32 [[ADD]], i32* [[A_ADDR]], align 4
5242 // CHECK28-NEXT:    ret void
5243 //
5244 //