1 //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file declares the machine register scavenger class. It can provide
11 /// information such as unused register at any point in a machine basic block.
12 /// It also provides a mechanism to make registers available by evicting them
13 /// to spill slots.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
19 
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/CodeGen/LiveRegUnits.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/MC/LaneBitmask.h"
26 
27 namespace llvm {
28 
29 class MachineInstr;
30 class TargetInstrInfo;
31 class TargetRegisterClass;
32 class TargetRegisterInfo;
33 
34 class RegScavenger {
35   const TargetRegisterInfo *TRI;
36   const TargetInstrInfo *TII;
37   MachineRegisterInfo* MRI;
38   MachineBasicBlock *MBB = nullptr;
39   MachineBasicBlock::iterator MBBI;
40   unsigned NumRegUnits = 0;
41 
42   /// True if RegScavenger is currently tracking the liveness of registers.
43   bool Tracking = false;
44 
45   /// Information on scavenged registers (held in a spill slot).
46   struct ScavengedInfo {
FrameIndexScavengedInfo47     ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
48 
49     /// A spill slot used for scavenging a register post register allocation.
50     int FrameIndex;
51 
52     /// If non-zero, the specific register is currently being
53     /// scavenged. That is, it is spilled to this scavenging stack slot.
54     Register Reg;
55 
56     /// The instruction that restores the scavenged register from stack.
57     const MachineInstr *Restore = nullptr;
58   };
59 
60   /// A vector of information on scavenged registers.
61   SmallVector<ScavengedInfo, 2> Scavenged;
62 
63   LiveRegUnits LiveUnits;
64 
65   // These BitVectors are only used internally to forward(). They are members
66   // to avoid frequent reallocations.
67   BitVector KillRegUnits, DefRegUnits;
68   BitVector TmpRegUnits;
69 
70 public:
71   RegScavenger() = default;
72 
73   /// Start tracking liveness from the begin of basic block \p MBB.
74   void enterBasicBlock(MachineBasicBlock &MBB);
75 
76   /// Start tracking liveness from the end of basic block \p MBB.
77   /// Use backward() to move towards the beginning of the block. This is
78   /// preferred to enterBasicBlock() and forward() because it does not depend
79   /// on the presence of kill flags.
80   void enterBasicBlockEnd(MachineBasicBlock &MBB);
81 
82   /// Move the internal MBB iterator and update register states.
83   void forward();
84 
85   /// Move the internal MBB iterator and update register states until
86   /// it has processed the specific iterator.
forward(MachineBasicBlock::iterator I)87   void forward(MachineBasicBlock::iterator I) {
88     if (!Tracking && MBB->begin() != I) forward();
89     while (MBBI != I) forward();
90   }
91 
92   /// Update internal register state and move MBB iterator backwards.
93   /// Contrary to unprocess() this method gives precise results even in the
94   /// absence of kill flags.
95   void backward();
96 
97   /// Call backward() as long as the internal iterator does not point to \p I.
backward(MachineBasicBlock::iterator I)98   void backward(MachineBasicBlock::iterator I) {
99     while (MBBI != I)
100       backward();
101   }
102 
103   /// Move the internal MBB iterator but do not update register states.
skipTo(MachineBasicBlock::iterator I)104   void skipTo(MachineBasicBlock::iterator I) {
105     if (I == MachineBasicBlock::iterator(nullptr))
106       Tracking = false;
107     MBBI = I;
108   }
109 
getCurrentPosition()110   MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
111 
112   /// Return if a specific register is currently used.
113   bool isRegUsed(Register Reg, bool includeReserved = true) const;
114 
115   /// Return all available registers in the register class in Mask.
116   BitVector getRegsAvailable(const TargetRegisterClass *RC);
117 
118   /// Find an unused register of the specified register class.
119   /// Return 0 if none is found.
120   Register FindUnusedReg(const TargetRegisterClass *RC) const;
121 
122   /// Add a scavenging frame index.
addScavengingFrameIndex(int FI)123   void addScavengingFrameIndex(int FI) {
124     Scavenged.push_back(ScavengedInfo(FI));
125   }
126 
127   /// Query whether a frame index is a scavenging frame index.
isScavengingFrameIndex(int FI)128   bool isScavengingFrameIndex(int FI) const {
129     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
130          IE = Scavenged.end(); I != IE; ++I)
131       if (I->FrameIndex == FI)
132         return true;
133 
134     return false;
135   }
136 
137   /// Get an array of scavenging frame indices.
getScavengingFrameIndices(SmallVectorImpl<int> & A)138   void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
139     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
140          IE = Scavenged.end(); I != IE; ++I)
141       if (I->FrameIndex >= 0)
142         A.push_back(I->FrameIndex);
143   }
144 
145   /// Make a register of the specific register class
146   /// available and do the appropriate bookkeeping. SPAdj is the stack
147   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
148   /// Returns the scavenged register.
149   /// This is deprecated as it depends on the quality of the kill flags being
150   /// present; Use scavengeRegisterBackwards() instead!
151   ///
152   /// If \p AllowSpill is false, fail if a spill is required to make the
153   /// register available, and return NoRegister.
154   Register scavengeRegister(const TargetRegisterClass *RC,
155                             MachineBasicBlock::iterator I, int SPAdj,
156                             bool AllowSpill = true);
157   Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
158                             bool AllowSpill = true) {
159     return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
160   }
161 
162   /// Make a register of the specific register class available from the current
163   /// position backwards to the place before \p To. If \p RestoreAfter is true
164   /// this includes the instruction following the current position.
165   /// SPAdj is the stack adjustment due to call frame, it's passed along to
166   /// eliminateFrameIndex().
167   /// Returns the scavenged register.
168   ///
169   /// If \p AllowSpill is false, fail if a spill is required to make the
170   /// register available, and return NoRegister.
171   Register scavengeRegisterBackwards(const TargetRegisterClass &RC,
172                                      MachineBasicBlock::iterator To,
173                                      bool RestoreAfter, int SPAdj,
174                                      bool AllowSpill = true);
175 
176   /// Tell the scavenger a register is used.
177   void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
178 
179 private:
180   /// Returns true if a register is reserved. It is never "unused".
isReserved(Register Reg)181   bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
182 
183   /// setUsed / setUnused - Mark the state of one or a number of register units.
184   ///
setUsed(const BitVector & RegUnits)185   void setUsed(const BitVector &RegUnits) {
186     LiveUnits.addUnits(RegUnits);
187   }
setUnused(const BitVector & RegUnits)188   void setUnused(const BitVector &RegUnits) {
189     LiveUnits.removeUnits(RegUnits);
190   }
191 
192   /// Processes the current instruction and fill the KillRegUnits and
193   /// DefRegUnits bit vectors.
194   void determineKillsAndDefs();
195 
196   /// Add all Reg Units that Reg contains to BV.
197   void addRegUnits(BitVector &BV, MCRegister Reg);
198 
199   /// Remove all Reg Units that \p Reg contains from \p BV.
200   void removeRegUnits(BitVector &BV, MCRegister Reg);
201 
202   /// Return the candidate register that is unused for the longest after
203   /// StartMI. UseMI is set to the instruction where the search stopped.
204   ///
205   /// No more than InstrLimit instructions are inspected.
206   Register findSurvivorReg(MachineBasicBlock::iterator StartMI,
207                            BitVector &Candidates,
208                            unsigned InstrLimit,
209                            MachineBasicBlock::iterator &UseMI);
210 
211   /// Initialize RegisterScavenger.
212   void init(MachineBasicBlock &MBB);
213 
214   /// Spill a register after position \p After and reload it before position
215   /// \p UseMI.
216   ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
217                        MachineBasicBlock::iterator Before,
218                        MachineBasicBlock::iterator &UseMI);
219 };
220 
221 /// Replaces all frame index virtual registers with physical registers. Uses the
222 /// register scavenger to find an appropriate register to use.
223 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
224 
225 } // end namespace llvm
226 
227 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
228