1//===-- ARM.td - Describe the ARM Target Machine -----------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12//===----------------------------------------------------------------------===//
13// Target-independent interfaces which we are implementing
14//===----------------------------------------------------------------------===//
15
16include "llvm/Target/Target.td"
17
18//===----------------------------------------------------------------------===//
19// ARM Subtarget state.
20//
21
22def ModeThumb             : SubtargetFeature<"thumb-mode", "InThumbMode",
23                                             "true", "Thumb mode">;
24
25def ModeSoftFloat         : SubtargetFeature<"soft-float","UseSoftFloat",
26                                             "true", "Use software floating "
27                                             "point features.">;
28
29
30//===----------------------------------------------------------------------===//
31// ARM Subtarget features.
32//
33
34// Floating Point, HW Division and Neon Support
35
36// FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
37// version).
38def FeatureFPRegs         : SubtargetFeature<"fpregs", "HasFPRegs", "true",
39                                             "Enable FP registers">;
40
41// 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
42// extension) and MVE (even in the integer-only version).
43def FeatureFPRegs16       : SubtargetFeature<"fpregs16", "HasFPRegs16", "true",
44                                             "Enable 16-bit FP registers",
45                                             [FeatureFPRegs]>;
46
47def FeatureFPRegs64       : SubtargetFeature<"fpregs64", "HasFPRegs64", "true",
48                                             "Enable 64-bit FP registers",
49                                             [FeatureFPRegs]>;
50
51def FeatureFP64           : SubtargetFeature<"fp64", "HasFP64", "true",
52                                             "Floating point unit supports "
53                                             "double precision",
54                                             [FeatureFPRegs64]>;
55
56def FeatureD32            : SubtargetFeature<"d32", "HasD32", "true",
57                                             "Extend FP to 32 double registers">;
58
59multiclass VFPver<string name, string query, string description,
60                  list<SubtargetFeature> prev,
61                  list<SubtargetFeature> otherimplies,
62                  list<SubtargetFeature> vfp2prev = []> {
63  def _D16_SP: SubtargetFeature<
64    name#"d16sp", query#"D16SP", "true",
65    description#" with only 16 d-registers and no double precision",
66    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16_SP")) #
67      !foreach(v, vfp2prev, !cast<SubtargetFeature>(v # "_SP")) #
68      otherimplies>;
69  def _SP: SubtargetFeature<
70    name#"sp", query#"SP", "true",
71    description#" with no double precision",
72    !foreach(v, prev, !cast<SubtargetFeature>(v # "_SP")) #
73      otherimplies # [FeatureD32, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
74  def _D16: SubtargetFeature<
75    name#"d16", query#"D16", "true",
76    description#" with only 16 d-registers",
77    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16")) #
78      vfp2prev #
79      otherimplies # [FeatureFP64, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
80  def "": SubtargetFeature<
81    name, query, "true", description,
82    prev # otherimplies # [
83        !cast<SubtargetFeature>(NAME # "_D16"),
84        !cast<SubtargetFeature>(NAME # "_SP")]>;
85}
86
87def FeatureVFP2_SP        : SubtargetFeature<"vfp2sp", "HasVFPv2SP", "true",
88                                             "Enable VFP2 instructions with "
89                                             "no double precision",
90                                             [FeatureFPRegs]>;
91
92def FeatureVFP2           : SubtargetFeature<"vfp2", "HasVFPv2", "true",
93                                             "Enable VFP2 instructions",
94                                             [FeatureFP64, FeatureVFP2_SP]>;
95
96defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions",
97                         [], [], [FeatureVFP2]>;
98
99def FeatureNEON           : SubtargetFeature<"neon", "HasNEON", "true",
100                                             "Enable NEON instructions",
101                                             [FeatureVFP3]>;
102
103def FeatureFP16           : SubtargetFeature<"fp16", "HasFP16", "true",
104                                             "Enable half-precision "
105                                             "floating point">;
106
107defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions",
108                         [FeatureVFP3], [FeatureFP16]>;
109
110defm FeatureFPARMv8: VFPver<"fp-armv8", "HasFPARMv8", "Enable ARMv8 FP",
111                         [FeatureVFP4], []>;
112
113def FeatureFullFP16       : SubtargetFeature<"fullfp16", "HasFullFP16", "true",
114                                             "Enable full half-precision "
115                                             "floating point",
116                                             [FeatureFPARMv8_D16_SP, FeatureFPRegs16]>;
117
118def FeatureFP16FML        : SubtargetFeature<"fp16fml", "HasFP16FML", "true",
119                                             "Enable full half-precision "
120                                             "floating point fml instructions",
121                                             [FeatureFullFP16]>;
122
123def FeatureHWDivThumb     : SubtargetFeature<"hwdiv",
124                                             "HasHardwareDivideInThumb", "true",
125                                             "Enable divide instructions in Thumb">;
126
127def FeatureHWDivARM       : SubtargetFeature<"hwdiv-arm",
128                                             "HasHardwareDivideInARM", "true",
129                                             "Enable divide instructions in ARM mode">;
130
131// Atomic Support
132def FeatureDB             : SubtargetFeature<"db", "HasDataBarrier", "true",
133                                             "Has data barrier (dmb/dsb) instructions">;
134
135def FeatureV7Clrex        : SubtargetFeature<"v7clrex", "HasV7Clrex", "true",
136                                             "Has v7 clrex instruction">;
137
138def FeatureDFB  : SubtargetFeature<"dfb", "HasFullDataBarrier", "true",
139                                   "Has full data barrier (dfb) instruction">;
140
141def FeatureAcquireRelease : SubtargetFeature<"acquire-release",
142                                             "HasAcquireRelease", "true",
143                                             "Has v8 acquire/release (lda/ldaex "
144                                             " etc) instructions">;
145
146
147def FeatureSlowFPBrcc     : SubtargetFeature<"slow-fp-brcc", "SlowFPBrcc", "true",
148                                             "FP compare + branch is slow">;
149
150def FeaturePerfMon        : SubtargetFeature<"perfmon", "HasPerfMon", "true",
151                                             "Enable support for Performance "
152                                             "Monitor extensions">;
153
154
155// TrustZone Security Extensions
156def FeatureTrustZone      : SubtargetFeature<"trustzone", "HasTrustZone", "true",
157                                             "Enable support for TrustZone "
158                                             "security extensions">;
159
160def Feature8MSecExt       : SubtargetFeature<"8msecext", "Has8MSecExt", "true",
161                                             "Enable support for ARMv8-M "
162                                             "Security Extensions">;
163
164def FeatureSHA2           : SubtargetFeature<"sha2", "HasSHA2", "true",
165                                             "Enable SHA1 and SHA256 support", [FeatureNEON]>;
166
167def FeatureAES            : SubtargetFeature<"aes", "HasAES", "true",
168                                             "Enable AES support", [FeatureNEON]>;
169
170def FeatureCrypto         : SubtargetFeature<"crypto", "HasCrypto", "true",
171                                             "Enable support for "
172                                             "Cryptography extensions",
173                                             [FeatureNEON, FeatureSHA2, FeatureAES]>;
174
175def FeatureCRC            : SubtargetFeature<"crc", "HasCRC", "true",
176                                             "Enable support for CRC instructions">;
177
178def FeatureDotProd        : SubtargetFeature<"dotprod", "HasDotProd", "true",
179                                             "Enable support for dot product instructions",
180                                             [FeatureNEON]>;
181
182// Not to be confused with FeatureHasRetAddrStack (return address stack)
183def FeatureRAS            : SubtargetFeature<"ras", "HasRAS", "true",
184                                             "Enable Reliability, Availability "
185                                             "and Serviceability extensions">;
186
187// Fast computation of non-negative address offsets
188def FeatureFPAO           : SubtargetFeature<"fpao", "HasFPAO", "true",
189                                             "Enable fast computation of "
190                                             "positive address offsets">;
191
192// Fast execution of AES crypto operations
193def FeatureFuseAES        : SubtargetFeature<"fuse-aes", "HasFuseAES", "true",
194                                             "CPU fuses AES crypto operations">;
195
196// Fast execution of bottom and top halves of literal generation
197def FeatureFuseLiterals   : SubtargetFeature<"fuse-literals", "HasFuseLiterals", "true",
198                                             "CPU fuses literal generation operations">;
199
200// The way of reading thread pointer
201def FeatureReadTp :  SubtargetFeature<"read-tp-hard", "ReadTPHard", "true",
202                                      "Reading thread pointer from register">;
203
204// Cyclone can zero VFP registers in 0 cycles.
205def FeatureZCZeroing      : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",
206                                             "Has zero-cycle zeroing instructions">;
207
208// Whether it is profitable to unpredicate certain instructions during if-conversion
209def FeatureProfUnpredicate : SubtargetFeature<"prof-unpr",
210                                              "IsProfitableToUnpredicate", "true",
211                                              "Is profitable to unpredicate">;
212
213// Some targets (e.g. Swift) have microcoded VGETLNi32.
214def FeatureSlowVGETLNi32  : SubtargetFeature<"slow-vgetlni32",
215                                             "HasSlowVGETLNi32", "true",
216                                             "Has slow VGETLNi32 - prefer VMOV">;
217
218// Some targets (e.g. Swift) have microcoded VDUP32.
219def FeatureSlowVDUP32     : SubtargetFeature<"slow-vdup32", "HasSlowVDUP32",
220                                             "true",
221                                             "Has slow VDUP32 - prefer VMOV">;
222
223// Some targets (e.g. Cortex-A9) prefer VMOVSR to VMOVDRR even when using NEON
224// for scalar FP, as this allows more effective execution domain optimization.
225def FeaturePreferVMOVSR   : SubtargetFeature<"prefer-vmovsr", "PreferVMOVSR",
226                                             "true", "Prefer VMOVSR">;
227
228// Swift has ISHST barriers compatible with Atomic Release semantics but weaker
229// than ISH
230def FeaturePrefISHSTBarrier : SubtargetFeature<"prefer-ishst", "PreferISHST",
231                                               "true", "Prefer ISHST barriers">;
232
233// Some targets (e.g. Cortex-A9) have muxed AGU and NEON/FPU.
234def FeatureMuxedUnits     : SubtargetFeature<"muxed-units", "HasMuxedUnits",
235                                             "true",
236                                             "Has muxed AGU and NEON/FPU">;
237
238// Whether VLDM/VSTM starting with odd register number need more microops
239// than single VLDRS
240def FeatureSlowOddRegister : SubtargetFeature<"slow-odd-reg", "SlowOddRegister",
241                                              "true", "VLDM/VSTM starting "
242                                              "with an odd register is slow">;
243
244// Some targets have a renaming dependency when loading into D subregisters.
245def FeatureSlowLoadDSubreg : SubtargetFeature<"slow-load-D-subreg",
246                                              "SlowLoadDSubregister", "true",
247                                              "Loading into D subregs is slow">;
248
249def FeatureUseWideStrideVFP : SubtargetFeature<"wide-stride-vfp",
250                                               "UseWideStrideVFP", "true",
251                                               "Use a wide stride when allocating VFP registers">;
252
253// Some targets (e.g. Cortex-A15) never want VMOVS to be widened to VMOVD.
254def FeatureDontWidenVMOVS : SubtargetFeature<"dont-widen-vmovs",
255                                             "DontWidenVMOVS", "true",
256                                             "Don't widen VMOVS to VMOVD">;
257
258// Some targets (e.g. Cortex-A15) prefer to avoid mixing operations on different
259// VFP register widths.
260def FeatureSplatVFPToNeon : SubtargetFeature<"splat-vfp-neon",
261                                             "SplatVFPToNeon", "true",
262                                             "Splat register from VFP to NEON",
263                                             [FeatureDontWidenVMOVS]>;
264
265// Whether or not it is profitable to expand VFP/NEON MLA/MLS instructions.
266def FeatureExpandMLx      : SubtargetFeature<"expand-fp-mlx",
267                                             "ExpandMLx", "true",
268                                             "Expand VFP/NEON MLA/MLS instructions">;
269
270// Some targets have special RAW hazards for VFP/NEON VMLA/VMLS.
271def FeatureHasVMLxHazards : SubtargetFeature<"vmlx-hazards", "HasVMLxHazards",
272                                             "true", "Has VMLx hazards">;
273
274// Some targets (e.g. Cortex-A9) want to convert VMOVRS, VMOVSR and VMOVS from
275// VFP to NEON, as an execution domain optimization.
276def FeatureNEONForFPMovs  : SubtargetFeature<"neon-fpmovs",
277                                             "UseNEONForFPMovs", "true",
278                                             "Convert VMOVSR, VMOVRS, "
279                                             "VMOVS to NEON">;
280
281// Some processors benefit from using NEON instructions for scalar
282// single-precision FP operations. This affects instruction selection and should
283// only be enabled if the handling of denormals is not important.
284def FeatureNEONForFP      : SubtargetFeature<"neonfp",
285                                             "UseNEONForSinglePrecisionFP",
286                                             "true",
287                                             "Use NEON for single precision FP">;
288
289// On some processors, VLDn instructions that access unaligned data take one
290// extra cycle. Take that into account when computing operand latencies.
291def FeatureCheckVLDnAlign : SubtargetFeature<"vldn-align", "CheckVLDnAlign",
292                                             "true",
293                                             "Check for VLDn unaligned access">;
294
295// Some processors have a nonpipelined VFP coprocessor.
296def FeatureNonpipelinedVFP : SubtargetFeature<"nonpipelined-vfp",
297                                              "NonpipelinedVFP", "true",
298                                              "VFP instructions are not pipelined">;
299
300// Some processors have FP multiply-accumulate instructions that don't
301// play nicely with other VFP / NEON instructions, and it's generally better
302// to just not use them.
303def FeatureHasSlowFPVMLx  : SubtargetFeature<"slowfpvmlx", "SlowFPVMLx", "true",
304                                             "Disable VFP / NEON MAC instructions">;
305
306// VFPv4 added VFMA instructions that can similar be fast or slow.
307def FeatureHasSlowFPVFMx  : SubtargetFeature<"slowfpvfmx", "SlowFPVFMx", "true",
308                                             "Disable VFP / NEON FMA instructions">;
309
310// Cortex-A8 / A9 Advanced SIMD has multiplier accumulator forwarding.
311def FeatureVMLxForwarding : SubtargetFeature<"vmlx-forwarding",
312                                             "HasVMLxForwarding", "true",
313                                             "Has multiplier accumulator forwarding">;
314
315// Disable 32-bit to 16-bit narrowing for experimentation.
316def FeaturePref32BitThumb : SubtargetFeature<"32bit", "Pref32BitThumb", "true",
317                                             "Prefer 32-bit Thumb instrs">;
318
319def FeaturePrefLoopAlign32 : SubtargetFeature<"loop-align", "PrefLoopLogAlignment","2",
320                                              "Prefer 32-bit alignment for loops">;
321
322def FeatureMVEVectorCostFactor1 : SubtargetFeature<"mve1beat", "MVEVectorCostFactor", "1",
323                        "Model MVE instructions as a 1 beat per tick architecture">;
324
325def FeatureMVEVectorCostFactor2 : SubtargetFeature<"mve2beat", "MVEVectorCostFactor", "2",
326                        "Model MVE instructions as a 2 beats per tick architecture">;
327
328def FeatureMVEVectorCostFactor4 : SubtargetFeature<"mve4beat", "MVEVectorCostFactor", "4",
329                        "Model MVE instructions as a 4 beats per tick architecture">;
330
331/// Some instructions update CPSR partially, which can add false dependency for
332/// out-of-order implementation, e.g. Cortex-A9, unless each individual bit is
333/// mapped to a separate physical register. Avoid partial CPSR update for these
334/// processors.
335def FeatureAvoidPartialCPSR : SubtargetFeature<"avoid-partial-cpsr",
336                                               "AvoidCPSRPartialUpdate", "true",
337                                 "Avoid CPSR partial update for OOO execution">;
338
339/// Disable +1 predication cost for instructions updating CPSR.
340/// Enabled for Cortex-A57.
341def FeatureCheapPredicableCPSR : SubtargetFeature<"cheap-predicable-cpsr",
342                                                  "CheapPredicableCPSRDef",
343                                                  "true",
344                  "Disable +1 predication cost for instructions updating CPSR">;
345
346def FeatureAvoidMOVsShOp  : SubtargetFeature<"avoid-movs-shop",
347                                             "AvoidMOVsShifterOperand", "true",
348                                             "Avoid movs instructions with "
349                                             "shifter operand">;
350
351// Some processors perform return stack prediction. CodeGen should avoid issue
352// "normal" call instructions to callees which do not return.
353def FeatureHasRetAddrStack : SubtargetFeature<"ret-addr-stack",
354                                              "HasRetAddrStack", "true",
355                                              "Has return address stack">;
356
357// Some processors have no branch predictor, which changes the expected cost of
358// taking a branch which affects the choice of whether to use predicated
359// instructions.
360def FeatureHasNoBranchPredictor : SubtargetFeature<"no-branch-predictor",
361                                                   "HasBranchPredictor", "false",
362                                                   "Has no branch predictor">;
363
364/// DSP extension.
365def FeatureDSP            : SubtargetFeature<"dsp", "HasDSP", "true",
366                                             "Supports DSP instructions in "
367                                             "ARM and/or Thumb2">;
368
369// Multiprocessing extension.
370def FeatureMP             : SubtargetFeature<"mp", "HasMPExtension", "true",
371                                        "Supports Multiprocessing extension">;
372
373// Virtualization extension - requires HW divide (ARMv7-AR ARMARM - 4.4.8).
374def FeatureVirtualization : SubtargetFeature<"virtualization",
375                                             "HasVirtualization", "true",
376                                             "Supports Virtualization extension",
377                                             [FeatureHWDivThumb, FeatureHWDivARM]>;
378
379// Special TRAP encoding for NaCl, which looks like a TRAP in Thumb too.
380// See ARMInstrInfo.td for details.
381def FeatureNaClTrap       : SubtargetFeature<"nacl-trap", "UseNaClTrap", "true",
382                                             "NaCl trap">;
383
384def FeatureStrictAlign    : SubtargetFeature<"strict-align",
385                                             "StrictAlign", "true",
386                                             "Disallow all unaligned memory "
387                                             "access">;
388
389def FeatureLongCalls      : SubtargetFeature<"long-calls", "GenLongCalls", "true",
390                                             "Generate calls via indirect call "
391                                             "instructions">;
392
393def FeatureExecuteOnly    : SubtargetFeature<"execute-only",
394                                             "GenExecuteOnly", "true",
395                                             "Enable the generation of "
396                                             "execute only code.">;
397
398def FeatureReserveR9      : SubtargetFeature<"reserve-r9", "ReserveR9", "true",
399                                             "Reserve R9, making it unavailable"
400                                             " as GPR">;
401
402def FeatureNoMovt         : SubtargetFeature<"no-movt", "NoMovt", "true",
403                                             "Don't use movt/movw pairs for "
404                                             "32-bit imms">;
405
406def FeatureNoNegativeImmediates
407                          : SubtargetFeature<"no-neg-immediates",
408                                             "NegativeImmediates", "false",
409                                             "Convert immediates and instructions "
410                                             "to their negated or complemented "
411                                             "equivalent when the immediate does "
412                                             "not fit in the encoding.">;
413
414// Use the MachineScheduler for instruction scheduling for the subtarget.
415def FeatureUseMISched: SubtargetFeature<"use-misched", "UseMISched", "true",
416                                        "Use the MachineScheduler">;
417
418def FeatureNoPostRASched : SubtargetFeature<"disable-postra-scheduler",
419    "DisablePostRAScheduler", "true",
420    "Don't schedule again after register allocation">;
421
422// Armv8.5-A extensions
423
424def FeatureSB       : SubtargetFeature<"sb", "HasSB", "true",
425  "Enable v8.5a Speculation Barrier" >;
426
427// Armv8.6-A extensions
428def FeatureBF16     : SubtargetFeature<"bf16", "HasBF16", "true",
429  "Enable support for BFloat16 instructions",  [FeatureNEON]>;
430
431def FeatureMatMulInt8 : SubtargetFeature<"i8mm", "HasMatMulInt8",
432    "true", "Enable Matrix Multiply Int8 Extension", [FeatureNEON]>;
433
434// Armv8.1-M extensions
435
436def FeatureLOB            : SubtargetFeature<"lob", "HasLOB", "true",
437                                             "Enable Low Overhead Branch "
438                                             "extensions">;
439
440def FeatureFixCMSE_CVE_2021_35465 : SubtargetFeature<"fix-cmse-cve-2021-35465",
441                                        "FixCMSE_CVE_2021_35465", "true",
442                                        "Mitigate against the cve-2021-35465 "
443                                        "security vulnurability">;
444
445//===----------------------------------------------------------------------===//
446// ARM architecture class
447//
448
449// A-series ISA
450def FeatureAClass : SubtargetFeature<"aclass", "ARMProcClass", "AClass",
451                                     "Is application profile ('A' series)">;
452
453// R-series ISA
454def FeatureRClass : SubtargetFeature<"rclass", "ARMProcClass", "RClass",
455                                     "Is realtime profile ('R' series)">;
456
457// M-series ISA
458def FeatureMClass : SubtargetFeature<"mclass", "ARMProcClass", "MClass",
459                                     "Is microcontroller profile ('M' series)">;
460
461
462def FeatureThumb2 : SubtargetFeature<"thumb2", "HasThumb2", "true",
463                                     "Enable Thumb2 instructions">;
464
465def FeatureNoARM  : SubtargetFeature<"noarm", "NoARM", "true",
466                                     "Does not support ARM mode execution">;
467
468//===----------------------------------------------------------------------===//
469// ARM ISAa.
470//
471
472def HasV4TOps   : SubtargetFeature<"v4t", "HasV4TOps", "true",
473                                   "Support ARM v4T instructions">;
474
475def HasV5TOps   : SubtargetFeature<"v5t", "HasV5TOps", "true",
476                                   "Support ARM v5T instructions",
477                                   [HasV4TOps]>;
478
479def HasV5TEOps  : SubtargetFeature<"v5te", "HasV5TEOps", "true",
480                                   "Support ARM v5TE, v5TEj, and "
481                                   "v5TExp instructions",
482                                   [HasV5TOps]>;
483
484def HasV6Ops    : SubtargetFeature<"v6", "HasV6Ops", "true",
485                                   "Support ARM v6 instructions",
486                                   [HasV5TEOps]>;
487
488def HasV6MOps   : SubtargetFeature<"v6m", "HasV6MOps", "true",
489                                   "Support ARM v6M instructions",
490                                   [HasV6Ops]>;
491
492def HasV8MBaselineOps : SubtargetFeature<"v8m", "HasV8MBaselineOps", "true",
493                                         "Support ARM v8M Baseline instructions",
494                                         [HasV6MOps]>;
495
496def HasV6KOps   : SubtargetFeature<"v6k", "HasV6KOps", "true",
497                                   "Support ARM v6k instructions",
498                                   [HasV6Ops]>;
499
500def HasV6T2Ops  : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
501                                   "Support ARM v6t2 instructions",
502                                   [HasV8MBaselineOps, HasV6KOps, FeatureThumb2]>;
503
504def HasV7Ops    : SubtargetFeature<"v7", "HasV7Ops", "true",
505                                   "Support ARM v7 instructions",
506                                   [HasV6T2Ops, FeaturePerfMon,
507                                    FeatureV7Clrex]>;
508
509def HasV8MMainlineOps :
510                  SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
511                                   "Support ARM v8M Mainline instructions",
512                                   [HasV7Ops]>;
513
514def HasV8Ops    : SubtargetFeature<"v8", "HasV8Ops", "true",
515                                   "Support ARM v8 instructions",
516                                   [HasV7Ops, FeatureAcquireRelease]>;
517
518def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
519                                   "Support ARM v8.1a instructions",
520                                   [HasV8Ops]>;
521
522def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
523                                   "Support ARM v8.2a instructions",
524                                   [HasV8_1aOps]>;
525
526def HasV8_3aOps   : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
527                                   "Support ARM v8.3a instructions",
528                                   [HasV8_2aOps]>;
529
530def HasV8_4aOps   : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
531                                   "Support ARM v8.4a instructions",
532                                   [HasV8_3aOps, FeatureDotProd]>;
533
534def HasV8_5aOps   : SubtargetFeature<"v8.5a", "HasV8_5aOps", "true",
535                                   "Support ARM v8.5a instructions",
536                                   [HasV8_4aOps, FeatureSB]>;
537
538def HasV8_6aOps   : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true",
539                                   "Support ARM v8.6a instructions",
540                                   [HasV8_5aOps, FeatureBF16,
541                                    FeatureMatMulInt8]>;
542
543def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
544                                   "Support ARM v8.7a instructions",
545                                   [HasV8_6aOps]>;
546
547def HasV9_0aOps   : SubtargetFeature<"v9a", "HasV9_0aOps", "true",
548                                   "Support ARM v9a instructions",
549                                   [HasV8_5aOps]>;
550
551def HasV9_1aOps   : SubtargetFeature<"v9.1a", "HasV9_1aOps", "true",
552                                   "Support ARM v9.1a instructions",
553                                   [HasV8_6aOps, HasV9_0aOps]>;
554
555def HasV9_2aOps   : SubtargetFeature<"v9.2a", "HasV9_2aOps", "true",
556                                   "Support ARM v9.2a instructions",
557                                   [HasV8_7aOps, HasV9_1aOps]>;
558
559def HasV8_1MMainlineOps : SubtargetFeature<
560               "v8.1m.main", "HasV8_1MMainlineOps", "true",
561               "Support ARM v8-1M Mainline instructions",
562               [HasV8MMainlineOps]>;
563def HasMVEIntegerOps : SubtargetFeature<
564               "mve", "HasMVEIntegerOps", "true",
565               "Support M-Class Vector Extension with integer ops",
566               [HasV8_1MMainlineOps, FeatureDSP, FeatureFPRegs16, FeatureFPRegs64]>;
567def HasMVEFloatOps : SubtargetFeature<
568               "mve.fp", "HasMVEFloatOps", "true",
569               "Support M-Class Vector Extension with integer and floating ops",
570               [HasMVEIntegerOps, FeatureFPARMv8_D16_SP, FeatureFullFP16]>;
571
572def HasCDEOps : SubtargetFeature<"cde", "HasCDEOps", "true",
573                                 "Support CDE instructions",
574                                 [HasV8MMainlineOps]>;
575
576foreach i = {0-7} in
577    def FeatureCoprocCDE#i : SubtargetFeature<"cdecp"#i,
578                                              "CoprocCDE["#i#"]", "true",
579                                              "Coprocessor "#i#" ISA is CDEv1",
580                                              [HasCDEOps]>;
581
582//===----------------------------------------------------------------------===//
583// Control codegen mitigation against Straight Line Speculation vulnerability.
584//===----------------------------------------------------------------------===//
585
586def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr",
587  "HardenSlsRetBr", "true",
588  "Harden against straight line speculation across RETurn and BranchRegister "
589  "instructions">;
590def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr",
591  "HardenSlsBlr", "true",
592  "Harden against straight line speculation across indirect calls">;
593def FeatureHardenSlsNoComdat : SubtargetFeature<"harden-sls-nocomdat",
594  "HardenSlsNoComdat", "true",
595  "Generate thunk code for SLS mitigation in the normal text section">;
596
597//===----------------------------------------------------------------------===//
598// ARM Processor subtarget features.
599//
600
601def ProcA5      : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
602                                   "Cortex-A5 ARM processors", []>;
603def ProcA7      : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
604                                   "Cortex-A7 ARM processors", []>;
605def ProcA8      : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
606                                   "Cortex-A8 ARM processors", []>;
607def ProcA9      : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9",
608                                   "Cortex-A9 ARM processors", []>;
609def ProcA12     : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
610                                   "Cortex-A12 ARM processors", []>;
611def ProcA15     : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
612                                   "Cortex-A15 ARM processors", []>;
613def ProcA17     : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
614                                   "Cortex-A17 ARM processors", []>;
615def ProcA32     : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
616                                   "Cortex-A32 ARM processors", []>;
617def ProcA35     : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
618                                   "Cortex-A35 ARM processors", []>;
619def ProcA53     : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
620                                   "Cortex-A53 ARM processors", []>;
621def ProcA55     : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
622                                   "Cortex-A55 ARM processors", []>;
623def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
624                                   "Cortex-A57 ARM processors", []>;
625def ProcA72     : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
626                                   "Cortex-A72 ARM processors", []>;
627def ProcA73     : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
628                                   "Cortex-A73 ARM processors", []>;
629def ProcA75     : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
630                                   "Cortex-A75 ARM processors", []>;
631def ProcA76     : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
632                                   "Cortex-A76 ARM processors", []>;
633def ProcA77     : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
634                                   "Cortex-A77 ARM processors", []>;
635def ProcA78     : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
636                                   "Cortex-A78 ARM processors", []>;
637def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
638                                   "Cortex-A78C ARM processors", []>;
639def ProcX1      : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
640                                   "Cortex-X1 ARM processors", []>;
641
642def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
643                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>;
644
645def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
646                                   "Qualcomm Krait processors", []>;
647def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
648                                   "Qualcomm Kryo processors", []>;
649def ProcSwift   : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
650                                   "Swift ARM processors", []>;
651
652def ProcExynos  : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos",
653                                   "Samsung Exynos processors",
654                                   [FeatureZCZeroing,
655                                    FeatureUseWideStrideVFP,
656                                    FeatureSplatVFPToNeon,
657                                    FeatureSlowVGETLNi32,
658                                    FeatureSlowVDUP32,
659                                    FeatureSlowFPBrcc,
660                                    FeatureProfUnpredicate,
661                                    FeatureHWDivThumb,
662                                    FeatureHWDivARM,
663                                    FeatureHasSlowFPVMLx,
664                                    FeatureHasSlowFPVFMx,
665                                    FeatureHasRetAddrStack,
666                                    FeatureFuseLiterals,
667                                    FeatureFuseAES,
668                                    FeatureExpandMLx,
669                                    FeatureCrypto,
670                                    FeatureCRC]>;
671
672def ProcR4      : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
673                                   "Cortex-R4 ARM processors", []>;
674def ProcR5      : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
675                                   "Cortex-R5 ARM processors", []>;
676def ProcR7      : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
677                                   "Cortex-R7 ARM processors", []>;
678def ProcR52     : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
679                                   "Cortex-R52 ARM processors", []>;
680
681def ProcM3      : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
682                                   "Cortex-M3 ARM processors", []>;
683def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
684                                   "Cortex-M7 ARM processors", []>;
685
686//===----------------------------------------------------------------------===//
687// ARM Helper classes.
688//
689
690class Architecture<string fname, string aname, list<SubtargetFeature> features>
691  : SubtargetFeature<fname, "ARMArch", aname,
692                     !strconcat(aname, " architecture"), features>;
693
694class ProcNoItin<string Name, list<SubtargetFeature> Features>
695  : Processor<Name, NoItineraries, Features>;
696
697
698//===----------------------------------------------------------------------===//
699// ARM architectures
700//
701
702def ARMv2     : Architecture<"armv2",     "ARMv2",    []>;
703
704def ARMv2a    : Architecture<"armv2a",    "ARMv2a",   []>;
705
706def ARMv3     : Architecture<"armv3",     "ARMv3",    []>;
707
708def ARMv3m    : Architecture<"armv3m",    "ARMv3m",   []>;
709
710def ARMv4     : Architecture<"armv4",     "ARMv4",    []>;
711
712def ARMv4t    : Architecture<"armv4t",    "ARMv4t",   [HasV4TOps]>;
713
714def ARMv5t    : Architecture<"armv5t",    "ARMv5t",   [HasV5TOps]>;
715
716def ARMv5te   : Architecture<"armv5te",   "ARMv5te",  [HasV5TEOps]>;
717
718def ARMv5tej  : Architecture<"armv5tej",  "ARMv5tej", [HasV5TEOps]>;
719
720def ARMv6     : Architecture<"armv6",     "ARMv6",    [HasV6Ops,
721                                                       FeatureDSP]>;
722
723def ARMv6t2   : Architecture<"armv6t2",   "ARMv6t2",  [HasV6T2Ops,
724                                                       FeatureDSP]>;
725
726def ARMv6k    : Architecture<"armv6k",    "ARMv6k",   [HasV6KOps]>;
727
728def ARMv6kz   : Architecture<"armv6kz",   "ARMv6kz",  [HasV6KOps,
729                                                       FeatureTrustZone]>;
730
731def ARMv6m    : Architecture<"armv6-m",   "ARMv6m",   [HasV6MOps,
732                                                       FeatureNoARM,
733                                                       ModeThumb,
734                                                       FeatureDB,
735                                                       FeatureMClass,
736                                                       FeatureStrictAlign]>;
737
738def ARMv6sm   : Architecture<"armv6s-m",  "ARMv6sm",  [HasV6MOps,
739                                                       FeatureNoARM,
740                                                       ModeThumb,
741                                                       FeatureDB,
742                                                       FeatureMClass,
743                                                       FeatureStrictAlign]>;
744
745def ARMv7a    : Architecture<"armv7-a",   "ARMv7a",   [HasV7Ops,
746                                                       FeatureNEON,
747                                                       FeatureDB,
748                                                       FeatureDSP,
749                                                       FeatureAClass]>;
750
751def ARMv7ve   : Architecture<"armv7ve",   "ARMv7ve",  [HasV7Ops,
752                                                       FeatureNEON,
753                                                       FeatureDB,
754                                                       FeatureDSP,
755                                                       FeatureTrustZone,
756                                                       FeatureMP,
757                                                       FeatureVirtualization,
758                                                       FeatureAClass]>;
759
760def ARMv7r    : Architecture<"armv7-r",   "ARMv7r",   [HasV7Ops,
761                                                       FeatureDB,
762                                                       FeatureDSP,
763                                                       FeatureHWDivThumb,
764                                                       FeatureRClass]>;
765
766def ARMv7m    : Architecture<"armv7-m",   "ARMv7m",   [HasV7Ops,
767                                                       FeatureThumb2,
768                                                       FeatureNoARM,
769                                                       ModeThumb,
770                                                       FeatureDB,
771                                                       FeatureHWDivThumb,
772                                                       FeatureMClass]>;
773
774def ARMv7em   : Architecture<"armv7e-m",  "ARMv7em",  [HasV7Ops,
775                                                       FeatureThumb2,
776                                                       FeatureNoARM,
777                                                       ModeThumb,
778                                                       FeatureDB,
779                                                       FeatureHWDivThumb,
780                                                       FeatureMClass,
781                                                       FeatureDSP]>;
782
783def ARMv8a    : Architecture<"armv8-a",   "ARMv8a",   [HasV8Ops,
784                                                       FeatureAClass,
785                                                       FeatureDB,
786                                                       FeatureFPARMv8,
787                                                       FeatureNEON,
788                                                       FeatureDSP,
789                                                       FeatureTrustZone,
790                                                       FeatureMP,
791                                                       FeatureVirtualization,
792                                                       FeatureCrypto,
793                                                       FeatureCRC]>;
794
795def ARMv81a   : Architecture<"armv8.1-a", "ARMv81a",  [HasV8_1aOps,
796                                                       FeatureAClass,
797                                                       FeatureDB,
798                                                       FeatureFPARMv8,
799                                                       FeatureNEON,
800                                                       FeatureDSP,
801                                                       FeatureTrustZone,
802                                                       FeatureMP,
803                                                       FeatureVirtualization,
804                                                       FeatureCrypto,
805                                                       FeatureCRC]>;
806
807def ARMv82a   : Architecture<"armv8.2-a", "ARMv82a",  [HasV8_2aOps,
808                                                       FeatureAClass,
809                                                       FeatureDB,
810                                                       FeatureFPARMv8,
811                                                       FeatureNEON,
812                                                       FeatureDSP,
813                                                       FeatureTrustZone,
814                                                       FeatureMP,
815                                                       FeatureVirtualization,
816                                                       FeatureCrypto,
817                                                       FeatureCRC,
818                                                       FeatureRAS]>;
819
820def ARMv83a   : Architecture<"armv8.3-a", "ARMv83a",  [HasV8_3aOps,
821                                                       FeatureAClass,
822                                                       FeatureDB,
823                                                       FeatureFPARMv8,
824                                                       FeatureNEON,
825                                                       FeatureDSP,
826                                                       FeatureTrustZone,
827                                                       FeatureMP,
828                                                       FeatureVirtualization,
829                                                       FeatureCrypto,
830                                                       FeatureCRC,
831                                                       FeatureRAS]>;
832
833def ARMv84a   : Architecture<"armv8.4-a", "ARMv84a",  [HasV8_4aOps,
834                                                       FeatureAClass,
835                                                       FeatureDB,
836                                                       FeatureFPARMv8,
837                                                       FeatureNEON,
838                                                       FeatureDSP,
839                                                       FeatureTrustZone,
840                                                       FeatureMP,
841                                                       FeatureVirtualization,
842                                                       FeatureCrypto,
843                                                       FeatureCRC,
844                                                       FeatureRAS,
845                                                       FeatureDotProd]>;
846
847def ARMv85a   : Architecture<"armv8.5-a", "ARMv85a",  [HasV8_5aOps,
848                                                       FeatureAClass,
849                                                       FeatureDB,
850                                                       FeatureFPARMv8,
851                                                       FeatureNEON,
852                                                       FeatureDSP,
853                                                       FeatureTrustZone,
854                                                       FeatureMP,
855                                                       FeatureVirtualization,
856                                                       FeatureCrypto,
857                                                       FeatureCRC,
858                                                       FeatureRAS,
859                                                       FeatureDotProd]>;
860def ARMv86a   : Architecture<"armv8.6-a", "ARMv86a",  [HasV8_6aOps,
861                                                       FeatureAClass,
862                                                       FeatureDB,
863                                                       FeatureFPARMv8,
864                                                       FeatureNEON,
865                                                       FeatureDSP,
866                                                       FeatureTrustZone,
867                                                       FeatureMP,
868                                                       FeatureVirtualization,
869                                                       FeatureCrypto,
870                                                       FeatureCRC,
871                                                       FeatureRAS,
872                                                       FeatureDotProd]>;
873def ARMv87a   : Architecture<"armv8.7-a", "ARMv87a",  [HasV8_7aOps,
874                                                       FeatureAClass,
875                                                       FeatureDB,
876                                                       FeatureFPARMv8,
877                                                       FeatureNEON,
878                                                       FeatureDSP,
879                                                       FeatureTrustZone,
880                                                       FeatureMP,
881                                                       FeatureVirtualization,
882                                                       FeatureCrypto,
883                                                       FeatureCRC,
884                                                       FeatureRAS,
885                                                       FeatureDotProd]>;
886
887def ARMv9a   : Architecture<"armv9-a", "ARMv9a",       [HasV9_0aOps,
888                                                       FeatureAClass,
889                                                       FeatureDB,
890                                                       FeatureFPARMv8,
891                                                       FeatureNEON,
892                                                       FeatureDSP,
893                                                       FeatureTrustZone,
894                                                       FeatureMP,
895                                                       FeatureVirtualization,
896                                                       FeatureCRC,
897                                                       FeatureRAS,
898                                                       FeatureDotProd]>;
899def ARMv91a   : Architecture<"armv9.1-a", "ARMv91a",   [HasV9_1aOps,
900                                                       FeatureAClass,
901                                                       FeatureDB,
902                                                       FeatureFPARMv8,
903                                                       FeatureNEON,
904                                                       FeatureDSP,
905                                                       FeatureTrustZone,
906                                                       FeatureMP,
907                                                       FeatureVirtualization,
908                                                       FeatureCRC,
909                                                       FeatureRAS,
910                                                       FeatureDotProd]>;
911def ARMv92a   : Architecture<"armv9.2-a", "ARMv92a",  [HasV9_2aOps,
912                                                       FeatureAClass,
913                                                       FeatureDB,
914                                                       FeatureFPARMv8,
915                                                       FeatureNEON,
916                                                       FeatureDSP,
917                                                       FeatureTrustZone,
918                                                       FeatureMP,
919                                                       FeatureVirtualization,
920                                                       FeatureCRC,
921                                                       FeatureRAS,
922                                                       FeatureDotProd]>;
923
924def ARMv8r    : Architecture<"armv8-r",   "ARMv8r",   [HasV8Ops,
925                                                       FeatureRClass,
926                                                       FeatureDB,
927                                                       FeatureDFB,
928                                                       FeatureDSP,
929                                                       FeatureCRC,
930                                                       FeatureMP,
931                                                       FeatureVirtualization,
932                                                       FeatureFPARMv8,
933                                                       FeatureNEON]>;
934
935def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
936                                                      [HasV8MBaselineOps,
937                                                       FeatureNoARM,
938                                                       ModeThumb,
939                                                       FeatureDB,
940                                                       FeatureHWDivThumb,
941                                                       FeatureV7Clrex,
942                                                       Feature8MSecExt,
943                                                       FeatureAcquireRelease,
944                                                       FeatureMClass,
945                                                       FeatureStrictAlign]>;
946
947def ARMv8mMainline : Architecture<"armv8-m.main", "ARMv8mMainline",
948                                                      [HasV8MMainlineOps,
949                                                       FeatureNoARM,
950                                                       ModeThumb,
951                                                       FeatureDB,
952                                                       FeatureHWDivThumb,
953                                                       Feature8MSecExt,
954                                                       FeatureAcquireRelease,
955                                                       FeatureMClass]>;
956
957def ARMv81mMainline : Architecture<"armv8.1-m.main", "ARMv81mMainline",
958                                                      [HasV8_1MMainlineOps,
959                                                       FeatureNoARM,
960                                                       ModeThumb,
961                                                       FeatureDB,
962                                                       FeatureHWDivThumb,
963                                                       Feature8MSecExt,
964                                                       FeatureAcquireRelease,
965                                                       FeatureMClass,
966                                                       FeatureRAS,
967                                                       FeatureLOB]>;
968
969// Aliases
970def IWMMXT   : Architecture<"iwmmxt",      "ARMv5te",  [ARMv5te]>;
971def IWMMXT2  : Architecture<"iwmmxt2",     "ARMv5te",  [ARMv5te]>;
972def XScale   : Architecture<"xscale",      "ARMv5te",  [ARMv5te]>;
973def ARMv6j   : Architecture<"armv6j",      "ARMv7a",   [ARMv6]>;
974def ARMv7k   : Architecture<"armv7k",      "ARMv7a",   [ARMv7a]>;
975def ARMv7s   : Architecture<"armv7s",      "ARMv7a",   [ARMv7a]>;
976
977//===----------------------------------------------------------------------===//
978// Register File Description
979//===----------------------------------------------------------------------===//
980
981include "ARMRegisterInfo.td"
982include "ARMRegisterBanks.td"
983include "ARMCallingConv.td"
984
985//===----------------------------------------------------------------------===//
986// ARM schedules.
987//===----------------------------------------------------------------------===//
988//
989include "ARMPredicates.td"
990include "ARMSchedule.td"
991
992//===----------------------------------------------------------------------===//
993// Instruction Descriptions
994//===----------------------------------------------------------------------===//
995
996include "ARMInstrInfo.td"
997def ARMInstrInfo : InstrInfo;
998
999//===----------------------------------------------------------------------===//
1000// ARM schedules
1001//
1002include "ARMScheduleV6.td"
1003include "ARMScheduleA8.td"
1004include "ARMScheduleA9.td"
1005include "ARMScheduleSwift.td"
1006include "ARMScheduleR52.td"
1007include "ARMScheduleA57.td"
1008include "ARMScheduleM4.td"
1009include "ARMScheduleM7.td"
1010
1011//===----------------------------------------------------------------------===//
1012// ARM processors
1013//
1014// Dummy CPU, used to target architectures
1015def : ProcessorModel<"generic",     CortexA8Model,      []>;
1016
1017// FIXME: Several processors below are not using their own scheduler
1018// model, but one of similar/previous processor. These should be fixed.
1019
1020def : ProcNoItin<"arm8",                                [ARMv4]>;
1021def : ProcNoItin<"arm810",                              [ARMv4]>;
1022def : ProcNoItin<"strongarm",                           [ARMv4]>;
1023def : ProcNoItin<"strongarm110",                        [ARMv4]>;
1024def : ProcNoItin<"strongarm1100",                       [ARMv4]>;
1025def : ProcNoItin<"strongarm1110",                       [ARMv4]>;
1026
1027def : ProcNoItin<"arm7tdmi",                            [ARMv4t]>;
1028def : ProcNoItin<"arm7tdmi-s",                          [ARMv4t]>;
1029def : ProcNoItin<"arm710t",                             [ARMv4t]>;
1030def : ProcNoItin<"arm720t",                             [ARMv4t]>;
1031def : ProcNoItin<"arm9",                                [ARMv4t]>;
1032def : ProcNoItin<"arm9tdmi",                            [ARMv4t]>;
1033def : ProcNoItin<"arm920",                              [ARMv4t]>;
1034def : ProcNoItin<"arm920t",                             [ARMv4t]>;
1035def : ProcNoItin<"arm922t",                             [ARMv4t]>;
1036def : ProcNoItin<"arm940t",                             [ARMv4t]>;
1037def : ProcNoItin<"ep9312",                              [ARMv4t]>;
1038
1039def : ProcNoItin<"arm10tdmi",                           [ARMv5t]>;
1040def : ProcNoItin<"arm1020t",                            [ARMv5t]>;
1041
1042def : ProcNoItin<"arm9e",                               [ARMv5te]>;
1043def : ProcNoItin<"arm926ej-s",                          [ARMv5te]>;
1044def : ProcNoItin<"arm946e-s",                           [ARMv5te]>;
1045def : ProcNoItin<"arm966e-s",                           [ARMv5te]>;
1046def : ProcNoItin<"arm968e-s",                           [ARMv5te]>;
1047def : ProcNoItin<"arm10e",                              [ARMv5te]>;
1048def : ProcNoItin<"arm1020e",                            [ARMv5te]>;
1049def : ProcNoItin<"arm1022e",                            [ARMv5te]>;
1050def : ProcNoItin<"xscale",                              [ARMv5te]>;
1051def : ProcNoItin<"iwmmxt",                              [ARMv5te]>;
1052
1053def : Processor<"arm1136j-s",       ARMV6Itineraries,   [ARMv6]>;
1054def : Processor<"arm1136jf-s",      ARMV6Itineraries,   [ARMv6,
1055                                                         FeatureVFP2,
1056                                                         FeatureHasSlowFPVMLx]>;
1057
1058def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m,
1059                                                         FeatureHasNoBranchPredictor]>;
1060def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m,
1061                                                         FeatureHasNoBranchPredictor]>;
1062def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m,
1063                                                         FeatureHasNoBranchPredictor]>;
1064def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m,
1065                                                         FeatureHasNoBranchPredictor]>;
1066
1067def : Processor<"arm1176jz-s",      ARMV6Itineraries,   [ARMv6kz]>;
1068def : Processor<"arm1176jzf-s",     ARMV6Itineraries,   [ARMv6kz,
1069                                                         FeatureVFP2,
1070                                                         FeatureHasSlowFPVMLx]>;
1071
1072def : Processor<"mpcorenovfp",      ARMV6Itineraries,   [ARMv6k]>;
1073def : Processor<"mpcore",           ARMV6Itineraries,   [ARMv6k,
1074                                                         FeatureVFP2,
1075                                                         FeatureHasSlowFPVMLx]>;
1076
1077def : Processor<"arm1156t2-s",      ARMV6Itineraries,   [ARMv6t2]>;
1078def : Processor<"arm1156t2f-s",     ARMV6Itineraries,   [ARMv6t2,
1079                                                         FeatureVFP2,
1080                                                         FeatureHasSlowFPVMLx]>;
1081
1082def : ProcessorModel<"cortex-a5",   CortexA8Model,      [ARMv7a, ProcA5,
1083                                                         FeatureHasRetAddrStack,
1084                                                         FeatureTrustZone,
1085                                                         FeatureSlowFPBrcc,
1086                                                         FeatureHasSlowFPVMLx,
1087                                                         FeatureHasSlowFPVFMx,
1088                                                         FeatureVMLxForwarding,
1089                                                         FeatureMP,
1090                                                         FeatureVFP4]>;
1091
1092def : ProcessorModel<"cortex-a7",   CortexA8Model,      [ARMv7a, ProcA7,
1093                                                         FeatureHasRetAddrStack,
1094                                                         FeatureTrustZone,
1095                                                         FeatureSlowFPBrcc,
1096                                                         FeatureHasVMLxHazards,
1097                                                         FeatureHasSlowFPVMLx,
1098                                                         FeatureHasSlowFPVFMx,
1099                                                         FeatureVMLxForwarding,
1100                                                         FeatureMP,
1101                                                         FeatureVFP4,
1102                                                         FeatureVirtualization]>;
1103
1104def : ProcessorModel<"cortex-a8",   CortexA8Model,      [ARMv7a, ProcA8,
1105                                                         FeatureHasRetAddrStack,
1106                                                         FeatureNonpipelinedVFP,
1107                                                         FeatureTrustZone,
1108                                                         FeatureSlowFPBrcc,
1109                                                         FeatureHasVMLxHazards,
1110                                                         FeatureHasSlowFPVMLx,
1111                                                         FeatureHasSlowFPVFMx,
1112                                                         FeatureVMLxForwarding]>;
1113
1114def : ProcessorModel<"cortex-a9",   CortexA9Model,      [ARMv7a, ProcA9,
1115                                                         FeatureHasRetAddrStack,
1116                                                         FeatureTrustZone,
1117                                                         FeatureHasVMLxHazards,
1118                                                         FeatureVMLxForwarding,
1119                                                         FeatureFP16,
1120                                                         FeatureAvoidPartialCPSR,
1121                                                         FeatureExpandMLx,
1122                                                         FeaturePreferVMOVSR,
1123                                                         FeatureMuxedUnits,
1124                                                         FeatureNEONForFPMovs,
1125                                                         FeatureCheckVLDnAlign,
1126                                                         FeatureMP]>;
1127
1128def : ProcessorModel<"cortex-a12",  CortexA9Model,      [ARMv7a, ProcA12,
1129                                                         FeatureHasRetAddrStack,
1130                                                         FeatureTrustZone,
1131                                                         FeatureVMLxForwarding,
1132                                                         FeatureVFP4,
1133                                                         FeatureAvoidPartialCPSR,
1134                                                         FeatureVirtualization,
1135                                                         FeatureMP]>;
1136
1137def : ProcessorModel<"cortex-a15",  CortexA9Model,      [ARMv7a, ProcA15,
1138                                                         FeatureDontWidenVMOVS,
1139                                                         FeatureSplatVFPToNeon,
1140                                                         FeatureHasRetAddrStack,
1141                                                         FeatureMuxedUnits,
1142                                                         FeatureTrustZone,
1143                                                         FeatureVFP4,
1144                                                         FeatureMP,
1145                                                         FeatureCheckVLDnAlign,
1146                                                         FeatureAvoidPartialCPSR,
1147                                                         FeatureVirtualization]>;
1148
1149def : ProcessorModel<"cortex-a17",  CortexA9Model,      [ARMv7a, ProcA17,
1150                                                         FeatureHasRetAddrStack,
1151                                                         FeatureTrustZone,
1152                                                         FeatureMP,
1153                                                         FeatureVMLxForwarding,
1154                                                         FeatureVFP4,
1155                                                         FeatureAvoidPartialCPSR,
1156                                                         FeatureVirtualization]>;
1157
1158// FIXME: krait has currently the same features as A9 plus VFP4 and  HWDiv
1159def : ProcessorModel<"krait",       CortexA9Model,      [ARMv7a, ProcKrait,
1160                                                         FeatureHasRetAddrStack,
1161                                                         FeatureMuxedUnits,
1162                                                         FeatureCheckVLDnAlign,
1163                                                         FeatureVMLxForwarding,
1164                                                         FeatureFP16,
1165                                                         FeatureAvoidPartialCPSR,
1166                                                         FeatureVFP4,
1167                                                         FeatureHWDivThumb,
1168                                                         FeatureHWDivARM]>;
1169
1170def : ProcessorModel<"swift",       SwiftModel,         [ARMv7a, ProcSwift,
1171                                                         FeatureHasRetAddrStack,
1172                                                         FeatureNEONForFP,
1173                                                         FeatureVFP4,
1174                                                         FeatureUseWideStrideVFP,
1175                                                         FeatureMP,
1176                                                         FeatureHWDivThumb,
1177                                                         FeatureHWDivARM,
1178                                                         FeatureAvoidPartialCPSR,
1179                                                         FeatureAvoidMOVsShOp,
1180                                                         FeatureHasSlowFPVMLx,
1181                                                         FeatureHasSlowFPVFMx,
1182                                                         FeatureHasVMLxHazards,
1183                                                         FeatureProfUnpredicate,
1184                                                         FeaturePrefISHSTBarrier,
1185                                                         FeatureSlowOddRegister,
1186                                                         FeatureSlowLoadDSubreg,
1187                                                         FeatureSlowVGETLNi32,
1188                                                         FeatureSlowVDUP32,
1189                                                         FeatureUseMISched,
1190                                                         FeatureNoPostRASched]>;
1191
1192def : ProcessorModel<"cortex-r4",   CortexA8Model,      [ARMv7r, ProcR4,
1193                                                         FeatureHasRetAddrStack,
1194                                                         FeatureAvoidPartialCPSR]>;
1195
1196def : ProcessorModel<"cortex-r4f",  CortexA8Model,      [ARMv7r, ProcR4,
1197                                                         FeatureHasRetAddrStack,
1198                                                         FeatureSlowFPBrcc,
1199                                                         FeatureHasSlowFPVMLx,
1200                                                         FeatureHasSlowFPVFMx,
1201                                                         FeatureVFP3_D16,
1202                                                         FeatureAvoidPartialCPSR]>;
1203
1204def : ProcessorModel<"cortex-r5",   CortexA8Model,      [ARMv7r, ProcR5,
1205                                                         FeatureHasRetAddrStack,
1206                                                         FeatureVFP3_D16,
1207                                                         FeatureSlowFPBrcc,
1208                                                         FeatureHWDivARM,
1209                                                         FeatureHasSlowFPVMLx,
1210                                                         FeatureHasSlowFPVFMx,
1211                                                         FeatureAvoidPartialCPSR]>;
1212
1213def : ProcessorModel<"cortex-r7",   CortexA8Model,      [ARMv7r, ProcR7,
1214                                                         FeatureHasRetAddrStack,
1215                                                         FeatureVFP3_D16,
1216                                                         FeatureFP16,
1217                                                         FeatureMP,
1218                                                         FeatureSlowFPBrcc,
1219                                                         FeatureHWDivARM,
1220                                                         FeatureHasSlowFPVMLx,
1221                                                         FeatureHasSlowFPVFMx,
1222                                                         FeatureAvoidPartialCPSR]>;
1223
1224def : ProcessorModel<"cortex-r8",   CortexA8Model,      [ARMv7r,
1225                                                         FeatureHasRetAddrStack,
1226                                                         FeatureVFP3_D16,
1227                                                         FeatureFP16,
1228                                                         FeatureMP,
1229                                                         FeatureSlowFPBrcc,
1230                                                         FeatureHWDivARM,
1231                                                         FeatureHasSlowFPVMLx,
1232                                                         FeatureHasSlowFPVFMx,
1233                                                         FeatureAvoidPartialCPSR]>;
1234
1235def : ProcessorModel<"cortex-m3",   CortexM4Model,      [ARMv7m,
1236                                                         ProcM3,
1237                                                         FeaturePrefLoopAlign32,
1238                                                         FeatureUseMISched,
1239                                                         FeatureHasNoBranchPredictor]>;
1240
1241def : ProcessorModel<"sc300",       CortexM4Model,      [ARMv7m,
1242                                                         ProcM3,
1243                                                         FeatureUseMISched,
1244                                                         FeatureHasNoBranchPredictor]>;
1245
1246def : ProcessorModel<"cortex-m4", CortexM4Model,        [ARMv7em,
1247                                                         FeatureVFP4_D16_SP,
1248                                                         FeaturePrefLoopAlign32,
1249                                                         FeatureHasSlowFPVMLx,
1250                                                         FeatureHasSlowFPVFMx,
1251                                                         FeatureUseMISched,
1252                                                         FeatureHasNoBranchPredictor]>;
1253
1254def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em,
1255                                                         ProcM7,
1256                                                         FeatureFPARMv8_D16,
1257                                                         FeatureUseMISched]>;
1258
1259def : ProcNoItin<"cortex-m23",                          [ARMv8mBaseline,
1260                                                         FeatureNoMovt,
1261                                                         FeatureHasNoBranchPredictor]>;
1262
1263def : ProcessorModel<"cortex-m33", CortexM4Model,       [ARMv8mMainline,
1264                                                         FeatureDSP,
1265                                                         FeatureFPARMv8_D16_SP,
1266                                                         FeaturePrefLoopAlign32,
1267                                                         FeatureHasSlowFPVMLx,
1268                                                         FeatureHasSlowFPVFMx,
1269                                                         FeatureUseMISched,
1270                                                         FeatureHasNoBranchPredictor,
1271                                                         FeatureFixCMSE_CVE_2021_35465]>;
1272
1273def : ProcessorModel<"cortex-m35p", CortexM4Model,      [ARMv8mMainline,
1274                                                         FeatureDSP,
1275                                                         FeatureFPARMv8_D16_SP,
1276                                                         FeaturePrefLoopAlign32,
1277                                                         FeatureHasSlowFPVMLx,
1278                                                         FeatureHasSlowFPVFMx,
1279                                                         FeatureUseMISched,
1280                                                         FeatureHasNoBranchPredictor,
1281                                                         FeatureFixCMSE_CVE_2021_35465]>;
1282
1283def : ProcessorModel<"cortex-m55", CortexM4Model,      [ARMv81mMainline,
1284                                                         FeatureDSP,
1285                                                         FeatureFPARMv8_D16,
1286                                                         FeatureUseMISched,
1287                                                         FeatureHasNoBranchPredictor,
1288                                                         FeaturePrefLoopAlign32,
1289                                                         FeatureHasSlowFPVMLx,
1290                                                         HasMVEFloatOps,
1291                                                         FeatureFixCMSE_CVE_2021_35465]>;
1292
1293def : ProcNoItin<"cortex-a32",                           [ARMv8a,
1294                                                         FeatureHWDivThumb,
1295                                                         FeatureHWDivARM,
1296                                                         FeatureCrypto,
1297                                                         FeatureCRC]>;
1298
1299def : ProcNoItin<"cortex-a35",                          [ARMv8a, ProcA35,
1300                                                         FeatureHWDivThumb,
1301                                                         FeatureHWDivARM,
1302                                                         FeatureCrypto,
1303                                                         FeatureCRC]>;
1304
1305def : ProcNoItin<"cortex-a53",                          [ARMv8a, ProcA53,
1306                                                         FeatureHWDivThumb,
1307                                                         FeatureHWDivARM,
1308                                                         FeatureCrypto,
1309                                                         FeatureCRC,
1310                                                         FeatureFPAO]>;
1311
1312def : ProcNoItin<"cortex-a55",                          [ARMv82a, ProcA55,
1313                                                         FeatureHWDivThumb,
1314                                                         FeatureHWDivARM,
1315                                                         FeatureDotProd]>;
1316
1317def : ProcessorModel<"cortex-a57",  CortexA57Model,     [ARMv8a, ProcA57,
1318                                                         FeatureHWDivThumb,
1319                                                         FeatureHWDivARM,
1320                                                         FeatureCrypto,
1321                                                         FeatureCRC,
1322                                                         FeatureFPAO,
1323                                                         FeatureAvoidPartialCPSR,
1324                                                         FeatureCheapPredicableCPSR]>;
1325
1326def : ProcessorModel<"cortex-a72",  CortexA57Model,     [ARMv8a, ProcA72,
1327                                                         FeatureHWDivThumb,
1328                                                         FeatureHWDivARM,
1329                                                         FeatureCrypto,
1330                                                         FeatureCRC]>;
1331
1332def : ProcNoItin<"cortex-a73",                          [ARMv8a, ProcA73,
1333                                                         FeatureHWDivThumb,
1334                                                         FeatureHWDivARM,
1335                                                         FeatureCrypto,
1336                                                         FeatureCRC]>;
1337
1338def : ProcNoItin<"cortex-a75",                          [ARMv82a, ProcA75,
1339                                                         FeatureHWDivThumb,
1340                                                         FeatureHWDivARM,
1341                                                         FeatureDotProd]>;
1342
1343def : ProcNoItin<"cortex-a76",                          [ARMv82a, ProcA76,
1344                                                         FeatureHWDivThumb,
1345                                                         FeatureHWDivARM,
1346                                                         FeatureCrypto,
1347                                                         FeatureCRC,
1348                                                         FeatureFullFP16,
1349                                                         FeatureDotProd]>;
1350
1351def : ProcNoItin<"cortex-a76ae",                        [ARMv82a, ProcA76,
1352                                                         FeatureHWDivThumb,
1353                                                         FeatureHWDivARM,
1354                                                         FeatureCrypto,
1355                                                         FeatureCRC,
1356                                                         FeatureFullFP16,
1357                                                         FeatureDotProd]>;
1358
1359def : ProcNoItin<"cortex-a77",                          [ARMv82a, ProcA77,
1360                                                         FeatureHWDivThumb,
1361                                                         FeatureHWDivARM,
1362                                                         FeatureCrypto,
1363                                                         FeatureCRC,
1364                                                         FeatureFullFP16,
1365                                                         FeatureDotProd]>;
1366
1367def : ProcNoItin<"cortex-a78",                          [ARMv82a, ProcA78,
1368                                                         FeatureHWDivThumb,
1369                                                         FeatureHWDivARM,
1370                                                         FeatureCrypto,
1371                                                         FeatureCRC,
1372                                                         FeatureFullFP16,
1373                                                         FeatureDotProd]>;
1374
1375def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C,
1376                                                         FeatureHWDivThumb,
1377                                                         FeatureHWDivARM,
1378                                                         FeatureCrypto,
1379                                                         FeatureCRC,
1380                                                         FeatureDotProd,
1381                                                         FeatureFullFP16]>;
1382
1383def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
1384                                                         FeatureHWDivThumb,
1385                                                         FeatureHWDivARM,
1386                                                         FeatureCrypto,
1387                                                         FeatureCRC,
1388                                                         FeatureFullFP16,
1389                                                         FeatureDotProd]>;
1390
1391def : ProcNoItin<"neoverse-v1",                         [ARMv84a,
1392                                                         FeatureHWDivThumb,
1393                                                         FeatureHWDivARM,
1394                                                         FeatureCrypto,
1395                                                         FeatureCRC,
1396                                                         FeatureFullFP16,
1397                                                         FeatureBF16,
1398                                                         FeatureMatMulInt8]>;
1399
1400def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
1401                                                         FeatureHWDivThumb,
1402                                                         FeatureHWDivARM,
1403                                                         FeatureCrypto,
1404                                                         FeatureCRC,
1405                                                         FeatureDotProd]>;
1406
1407def : ProcNoItin<"neoverse-n2",                         [ARMv85a,
1408                                                         FeatureBF16,
1409                                                         FeatureMatMulInt8,
1410                                                         FeaturePerfMon]>;
1411
1412def : ProcessorModel<"cyclone",     SwiftModel,         [ARMv8a, ProcSwift,
1413                                                         FeatureHasRetAddrStack,
1414                                                         FeatureNEONForFP,
1415                                                         FeatureVFP4,
1416                                                         FeatureMP,
1417                                                         FeatureHWDivThumb,
1418                                                         FeatureHWDivARM,
1419                                                         FeatureAvoidPartialCPSR,
1420                                                         FeatureAvoidMOVsShOp,
1421                                                         FeatureHasSlowFPVMLx,
1422                                                         FeatureHasSlowFPVFMx,
1423                                                         FeatureCrypto,
1424                                                         FeatureUseMISched,
1425                                                         FeatureZCZeroing,
1426                                                         FeatureNoPostRASched]>;
1427
1428def : ProcNoItin<"exynos-m3",                           [ARMv8a, ProcExynos]>;
1429def : ProcNoItin<"exynos-m4",                           [ARMv82a, ProcExynos,
1430                                                         FeatureFullFP16,
1431                                                         FeatureDotProd]>;
1432def : ProcNoItin<"exynos-m5",                           [ARMv82a, ProcExynos,
1433                                                         FeatureFullFP16,
1434                                                         FeatureDotProd]>;
1435
1436def : ProcNoItin<"kryo",                                [ARMv8a, ProcKryo,
1437                                                         FeatureHWDivThumb,
1438                                                         FeatureHWDivARM,
1439                                                         FeatureCrypto,
1440                                                         FeatureCRC]>;
1441
1442def : ProcessorModel<"cortex-r52", CortexR52Model,      [ARMv8r, ProcR52,
1443                                                         FeatureUseMISched,
1444                                                         FeatureFPAO]>;
1445
1446//===----------------------------------------------------------------------===//
1447// Declare the target which we are implementing
1448//===----------------------------------------------------------------------===//
1449
1450def ARMAsmWriter : AsmWriter {
1451  string AsmWriterClassName  = "InstPrinter";
1452  int PassSubtarget = 1;
1453  int Variant = 0;
1454  bit isMCAsmWriter = 1;
1455}
1456
1457def ARMAsmParser : AsmParser {
1458  bit ReportMultipleNearMisses = 1;
1459}
1460
1461def ARMAsmParserVariant : AsmParserVariant {
1462  int Variant = 0;
1463  string Name = "ARM";
1464  string BreakCharacters = ".";
1465}
1466
1467def ARM : Target {
1468  // Pull in Instruction Info.
1469  let InstructionSet = ARMInstrInfo;
1470  let AssemblyWriters = [ARMAsmWriter];
1471  let AssemblyParsers = [ARMAsmParser];
1472  let AssemblyParserVariants = [ARMAsmParserVariant];
1473  let AllowRegisterRenaming = 1;
1474}
1475