1# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
2# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
3# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
4# RUN:     | llvm-objdump -d - \
5# RUN:     | FileCheck -check-prefix=CHECK-INST-ALIAS %s
6#
7# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
8# RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
9# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
10# RUN:     | llvm-objdump -d - \
11# RUN:     | FileCheck -check-prefix=CHECK-INST-ALIAS %s
12
13##################################
14# Supervisor Trap Setup
15##################################
16
17# sstatus
18# name
19# CHECK-INST: csrrs t1, sstatus, zero
20# CHECK-ENC: encoding: [0x73,0x23,0x00,0x10]
21# CHECK-INST-ALIAS: csrr t1, sstatus
22# uimm12
23# CHECK-INST: csrrs t2, sstatus, zero
24# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x10]
25# CHECK-INST-ALIAS: csrr t2, sstatus
26# name
27csrrs t1, sstatus, zero
28# uimm12
29csrrs t2, 0x100, zero
30
31# sedeleg
32# name
33# CHECK-INST: csrrs t1, sedeleg, zero
34# CHECK-ENC: encoding: [0x73,0x23,0x20,0x10]
35# CHECK-INST-ALIAS: csrr t1, sedeleg
36# uimm12
37# CHECK-INST: csrrs t2, sedeleg, zero
38# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x10]
39# CHECK-INST-ALIAS: csrr t2, sedeleg
40# name
41csrrs t1, sedeleg, zero
42# uimm12
43csrrs t2, 0x102, zero
44
45# sideleg
46# name
47# CHECK-INST: csrrs t1, sideleg, zero
48# CHECK-ENC: encoding: [0x73,0x23,0x30,0x10]
49# CHECK-INST-ALIAS: csrr t1, sideleg
50# uimm12
51# CHECK-INST: csrrs t2, sideleg, zero
52# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x10]
53# CHECK-INST-ALIAS: csrr t2, sideleg
54# name
55csrrs t1, sideleg, zero
56# uimm12
57csrrs t2, 0x103, zero
58
59# sie
60# name
61# CHECK-INST: csrrs t1, sie, zero
62# CHECK-ENC: [0x73,0x23,0x40,0x10]
63# CHECK-INST-ALIAS: csrr t1, sie
64# uimm12
65# CHECK-INST: csrrs t2, sie, zero
66# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x10]
67# CHECK-INST-ALIAS: csrr t2, sie
68# name
69csrrs t1, sie, zero
70# uimm12
71csrrs t2, 0x104, zero
72
73# stvec
74# name
75# CHECK-INST: csrrs t1, stvec, zero
76# CHECK-ENC: encoding: [0x73,0x23,0x50,0x10]
77# CHECK-INST-ALIAS: csrr t1, stvec
78# uimm12
79# CHECK-INST: csrrs t2, stvec, zero
80# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x10]
81# CHECK-INST-ALIAS: csrr t2, stvec
82# name
83csrrs t1, stvec, zero
84# uimm12
85csrrs t2, 0x105, zero
86
87# scounteren
88# name
89# CHECK-INST: csrrs t1, scounteren, zero
90# CHECK-ENC: encoding: [0x73,0x23,0x60,0x10]
91# CHECK-INST-ALIAS: csrr t1, scounteren
92# uimm12
93# CHECK-INST: csrrs t2, scounteren, zero
94# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x10]
95# CHECK-INST-ALIAS: csrr t2, scounteren
96# name
97csrrs t1, scounteren, zero
98# uimm12
99csrrs t2, 0x106, zero
100
101##################################
102# Supervisor Trap Handling
103##################################
104
105# sscratch
106# name
107# CHECK-INST: csrrs t1, sscratch, zero
108# CHECK-ENC: encoding: [0x73,0x23,0x00,0x14]
109# CHECK-INST-ALIAS: csrr t1, sscratch
110# uimm12
111# CHECK-INST: csrrs t2, sscratch, zero
112# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x14]
113# CHECK-INST-ALIAS: csrr t2, sscratch
114# name
115csrrs t1, sscratch, zero
116# uimm12
117csrrs t2, 0x140, zero
118
119# sepc
120# name
121# CHECK-INST: csrrs t1, sepc, zero
122# CHECK-ENC: encoding: [0x73,0x23,0x10,0x14]
123# CHECK-INST-ALIAS: csrr t1, sepc
124# uimm12
125# CHECK-INST: csrrs t2, sepc, zero
126# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x14]
127# CHECK-INST-ALIAS: csrr t2, sepc
128# name
129csrrs t1, sepc, zero
130# uimm12
131csrrs t2, 0x141, zero
132
133# scause
134# name
135# CHECK-INST: csrrs t1, scause, zero
136# CHECK-ENC: encoding: [0x73,0x23,0x20,0x14]
137# CHECK-INST-ALIAS: csrr t1, scause
138# uimm12
139# CHECK-INST: csrrs t2, scause, zero
140# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x14]
141# CHECK-INST-ALIAS: csrr t2, scause
142# name
143csrrs t1, scause, zero
144# uimm12
145csrrs t2, 0x142, zero
146
147# stval
148# name
149# CHECK-INST: csrrs t1, stval, zero
150# CHECK-ENC: encoding: [0x73,0x23,0x30,0x14]
151# CHECK-INST-ALIAS: csrr t1, stval
152# uimm12
153# CHECK-INST: csrrs t2, stval, zero
154# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x14]
155# CHECK-INST-ALIAS: csrr t2, stval
156# aliases
157# aliases with uimm12
158# name
159csrrs t1, stval, zero
160# uimm12
161csrrs t2, 0x143, zero
162
163# sip
164# name
165# CHECK-INST: csrrs t1, sip, zero
166# CHECK-ENC: encoding: [0x73,0x23,0x40,0x14]
167# CHECK-INST-ALIAS: csrr t1, sip
168# uimm12
169# CHECK-INST: csrrs t2, sip, zero
170# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x14]
171# CHECK-INST-ALIAS: csrr t2, sip
172csrrs t1, sip, zero
173# uimm12
174csrrs t2, 0x144, zero
175
176
177#########################################
178# Supervisor Protection and Translation
179#########################################
180
181# satp
182# name
183# CHECK-INST: csrrs t1, satp, zero
184# CHECK-ENC: encoding: [0x73,0x23,0x00,0x18]
185# CHECK-INST-ALIAS: csrr t1, satp
186# uimm12
187# CHECK-INST: csrrs t2, satp, zero
188# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x18]
189# CHECK-INST-ALIAS: csrr t2, satp
190# name
191csrrs t1, satp, zero
192# uimm12
193csrrs t2, 0x180, zero
194