1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s
3
4prefetch    (%rax)
5prefetchw   (%rax)
6
7# CHECK:      Instruction Info:
8# CHECK-NEXT: [1]: #uOps
9# CHECK-NEXT: [2]: Latency
10# CHECK-NEXT: [3]: RThroughput
11# CHECK-NEXT: [4]: MayLoad
12# CHECK-NEXT: [5]: MayStore
13# CHECK-NEXT: [6]: HasSideEffects (U)
14
15# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
16# CHECK-NEXT:  1      5     0.50    *      *            prefetch	(%rax)
17# CHECK-NEXT:  1      5     0.50    *      *            prefetchw	(%rax)
18
19# CHECK:      Resources:
20# CHECK-NEXT: [0]   - SKLDivider
21# CHECK-NEXT: [1]   - SKLFPDivider
22# CHECK-NEXT: [2]   - SKLPort0
23# CHECK-NEXT: [3]   - SKLPort1
24# CHECK-NEXT: [4]   - SKLPort2
25# CHECK-NEXT: [5]   - SKLPort3
26# CHECK-NEXT: [6]   - SKLPort4
27# CHECK-NEXT: [7]   - SKLPort5
28# CHECK-NEXT: [8]   - SKLPort6
29# CHECK-NEXT: [9]   - SKLPort7
30
31# CHECK:      Resource pressure per iteration:
32# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
33# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -
34
35# CHECK:      Resource pressure by instruction:
36# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
37# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -     prefetch	(%rax)
38# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -     prefetchw	(%rax)
39