1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; CHECK-LABEL: t0
4; CHECK: r0 = add(r1,add(r0,#23))
5define i32 @t0(i32 %a0, i32 %a1) #0 {
6  %v0 = add i32 %a1, 23
7  %v1 = add i32 %a0, %v0
8  ret i32 %v1
9}
10
11; CHECK-LABEL: t1
12; CHECK: r[[R:[0-9]+]] = add(r1,r0)
13; CHECK: r0 = add(r[[R]],#23)
14define i32 @t1(i32 %a0, i32 %a1) #1 {
15  %v0 = add i32 %a1, 23
16  %v1 = add i32 %a0, %v0
17  ret i32 %v1
18}
19
20attributes #0 = { nounwind readnone "target-cpu"="hexagonv62" "target-features"="+compound" }
21attributes #1 = { nounwind readnone "target-cpu"="hexagonv62" "target-features"="-compound" }
22