1; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
2
3; Ensure that the second use of ##grcolor doesn't get replaced with
4; r26 which is an induction variable
5
6; CHECK: r{{[0-9]+}} = ##g4
7; CHECK: r{{[0-9]+}} = {{.*}}##g4
8
9target triple = "hexagon-unknown--elf"
10
11@g0 = external global [450 x i32]
12@g1 = external global [842 x i32]
13@g2 = external global [750 x i32]
14@g3 = external global [750 x i32]
15@g4 = external global [750 x i32]
16@g5 = external global [750 x i32]
17@g6 = external global [750 x i32]
18@g7 = external global [750 x i32]
19@g8 = external global [750 x i32]
20@g9 = external global [750 x i32]
21@g10 = external global i32
22@g11 = external global [0 x i32]
23@g12 = external global [0 x i32]
24
25; Function Attrs: nounwind readonly
26define i32 @f0(i32 %a0) #0 {
27b0:
28  %v0 = load i32, i32* @g10, align 4, !tbaa !0
29  %v1 = icmp sgt i32 %v0, 0
30  br i1 %v1, label %b1, label %b21
31
32b1:                                               ; preds = %b0
33  %v2 = getelementptr inbounds [842 x i32], [842 x i32]* @g1, i32 0, i32 %a0
34  br label %b2
35
36b2:                                               ; preds = %b19, %b1
37  %v3 = phi i32 [ 0, %b1 ], [ %v79, %b19 ]
38  %v4 = phi i32 [ 32767, %b1 ], [ %v78, %b19 ]
39  %v5 = phi i32 [ 0, %b1 ], [ %v77, %b19 ]
40  %v6 = phi i32 [ 0, %b1 ], [ %v76, %b19 ]
41  %v7 = phi i32 [ 0, %b1 ], [ %v80, %b19 ]
42  %v8 = getelementptr inbounds [750 x i32], [750 x i32]* @g5, i32 0, i32 %v7
43  %v9 = load i32, i32* %v8, align 4, !tbaa !0
44  %v10 = icmp eq i32 %v9, 0
45  br i1 %v10, label %b19, label %b3
46
47b3:                                               ; preds = %b2
48  %v11 = getelementptr inbounds [750 x i32], [750 x i32]* @g4, i32 0, i32 %v7
49  %v12 = load i32, i32* %v11, align 4, !tbaa !0
50  %v13 = load i32, i32* %v2, align 4, !tbaa !0
51  %v14 = getelementptr inbounds [750 x i32], [750 x i32]* @g4, i32 0, i32 %v13
52  %v15 = load i32, i32* %v14, align 4, !tbaa !0
53  %v16 = icmp eq i32 %v12, %v15
54  br i1 %v16, label %b4, label %b8
55
56b4:                                               ; preds = %b3
57  %v17 = getelementptr inbounds [750 x i32], [750 x i32]* @g6, i32 0, i32 %v7
58  %v18 = load i32, i32* %v17, align 4, !tbaa !0
59  %v19 = icmp eq i32 %v18, 25
60  br i1 %v19, label %b5, label %b19
61
62b5:                                               ; preds = %b4
63  %v20 = getelementptr inbounds [750 x i32], [750 x i32]* @g2, i32 0, i32 %v7
64  %v21 = load i32, i32* %v20, align 4, !tbaa !0
65  %v22 = icmp slt i32 %v21, 19
66  br i1 %v22, label %b6, label %b19
67
68b6:                                               ; preds = %b5
69  %v23 = getelementptr inbounds [750 x i32], [750 x i32]* @g9, i32 0, i32 %v7
70  %v24 = load i32, i32* %v23, align 4, !tbaa !0
71  %v25 = icmp eq i32 %v24, 0
72  br i1 %v25, label %b19, label %b7
73
74b7:                                               ; preds = %b6
75  %v26 = getelementptr inbounds [750 x i32], [750 x i32]* @g8, i32 0, i32 %v7
76  %v27 = load i32, i32* %v26, align 4, !tbaa !0
77  %v28 = mul nsw i32 %v27, 50
78  %v29 = add nsw i32 %v28, %v3
79  br label %b19
80
81b8:                                               ; preds = %b3
82  %v30 = getelementptr inbounds [750 x i32], [750 x i32]* @g9, i32 0, i32 %v7
83  %v31 = load i32, i32* %v30, align 4, !tbaa !0
84  %v32 = icmp eq i32 %v31, 0
85  br i1 %v32, label %b13, label %b9
86
87b9:                                               ; preds = %b8
88  %v33 = getelementptr inbounds [750 x i32], [750 x i32]* @g7, i32 0, i32 %v7
89  %v34 = load i32, i32* %v33, align 4, !tbaa !0
90  %v35 = icmp eq i32 %v34, 0
91  br i1 %v35, label %b10, label %b13
92
93b10:                                              ; preds = %b9
94  %v36 = getelementptr inbounds [750 x i32], [750 x i32]* @g6, i32 0, i32 %v7
95  %v37 = load i32, i32* %v36, align 4, !tbaa !0
96  %v38 = icmp slt i32 %v37, 18
97  br i1 %v38, label %b11, label %b13
98
99b11:                                              ; preds = %b10
100  %v39 = getelementptr inbounds [0 x i32], [0 x i32]* @g11, i32 0, i32 %v37
101  %v40 = load i32, i32* %v39, align 4, !tbaa !0
102  %v41 = add nsw i32 %v40, 50
103  %v42 = getelementptr inbounds [750 x i32], [750 x i32]* @g8, i32 0, i32 %v7
104  %v43 = load i32, i32* %v42, align 4, !tbaa !0
105  %v44 = mul nsw i32 %v41, %v43
106  %v45 = icmp slt i32 %v44, %v4
107  br i1 %v45, label %b12, label %b19
108
109b12:                                              ; preds = %b11
110  br label %b19
111
112b13:                                              ; preds = %b10, %b9, %b8
113  %v46 = getelementptr inbounds [750 x i32], [750 x i32]* @g2, i32 0, i32 %v7
114  %v47 = load i32, i32* %v46, align 4, !tbaa !0
115  %v48 = and i32 %v47, 31
116  %v49 = getelementptr inbounds [0 x i32], [0 x i32]* @g12, i32 0, i32 %v48
117  %v50 = load i32, i32* %v49, align 4, !tbaa !0
118  %v51 = icmp eq i32 %v50, 0
119  br i1 %v51, label %b19, label %b14
120
121b14:                                              ; preds = %b13
122  %v52 = getelementptr inbounds [750 x i32], [750 x i32]* @g2, i32 0, i32 %v13
123  %v53 = load i32, i32* %v52, align 4, !tbaa !0
124  %v54 = icmp slt i32 %v53, 11
125  br i1 %v54, label %b15, label %b19
126
127b15:                                              ; preds = %b14
128  %v55 = getelementptr inbounds [750 x i32], [750 x i32]* @g6, i32 0, i32 %v7
129  %v56 = load i32, i32* %v55, align 4, !tbaa !0
130  %v57 = icmp slt i32 %v56, 11
131  br i1 %v57, label %b16, label %b19
132
133b16:                                              ; preds = %b15
134  %v58 = getelementptr inbounds [0 x i32], [0 x i32]* @g11, i32 0, i32 %v56
135  %v59 = load i32, i32* %v58, align 4, !tbaa !0
136  %v60 = add nsw i32 %v59, 50
137  %v61 = getelementptr inbounds [750 x i32], [750 x i32]* @g3, i32 0, i32 %v7
138  %v62 = load i32, i32* %v61, align 4, !tbaa !0
139  %v63 = getelementptr inbounds [450 x i32], [450 x i32]* @g0, i32 0, i32 %v62
140  %v64 = load i32, i32* %v63, align 4, !tbaa !0
141  %v65 = mul nsw i32 %v64, %v60
142  %v66 = sdiv i32 %v65, 2
143  %v67 = add nsw i32 %v66, %v6
144  %v68 = getelementptr inbounds [750 x i32], [750 x i32]* @g8, i32 0, i32 %v7
145  %v69 = load i32, i32* %v68, align 4, !tbaa !0
146  %v70 = icmp sgt i32 %v69, 1
147  br i1 %v70, label %b17, label %b18
148
149b17:                                              ; preds = %b16
150  %v71 = mul nsw i32 %v69, 25
151  %v72 = add nsw i32 %v71, %v67
152  br label %b18
153
154b18:                                              ; preds = %b17, %b16
155  %v73 = phi i32 [ %v72, %b17 ], [ %v67, %b16 ]
156  %v74 = tail call i32 @f1(i32 %v7, i32 %a0)
157  %v75 = add nsw i32 %v74, %v5
158  br label %b19
159
160b19:                                              ; preds = %b18, %b15, %b14, %b13, %b12, %b11, %b7, %b6, %b5, %b4, %b2
161  %v76 = phi i32 [ %v6, %b7 ], [ %v6, %b6 ], [ %v6, %b5 ], [ %v6, %b4 ], [ %v73, %b18 ], [ %v6, %b15 ], [ %v6, %b14 ], [ %v6, %b13 ], [ %v6, %b12 ], [ %v6, %b11 ], [ %v6, %b2 ]
162  %v77 = phi i32 [ %v5, %b7 ], [ %v5, %b6 ], [ %v5, %b5 ], [ %v5, %b4 ], [ %v75, %b18 ], [ %v5, %b15 ], [ %v5, %b14 ], [ %v5, %b13 ], [ %v5, %b12 ], [ %v5, %b11 ], [ %v5, %b2 ]
163  %v78 = phi i32 [ %v4, %b7 ], [ %v4, %b6 ], [ %v4, %b5 ], [ %v4, %b4 ], [ %v4, %b18 ], [ %v4, %b15 ], [ %v4, %b14 ], [ %v4, %b13 ], [ %v44, %b12 ], [ %v4, %b11 ], [ %v4, %b2 ]
164  %v79 = phi i32 [ %v29, %b7 ], [ %v3, %b6 ], [ %v3, %b5 ], [ %v3, %b4 ], [ %v3, %b18 ], [ %v3, %b15 ], [ %v3, %b14 ], [ %v3, %b13 ], [ %v3, %b12 ], [ %v3, %b11 ], [ %v3, %b2 ]
165  %v80 = add nsw i32 %v7, 1
166  %v81 = icmp slt i32 %v80, %v0
167  br i1 %v81, label %b2, label %b20
168
169b20:                                              ; preds = %b19
170  br label %b21
171
172b21:                                              ; preds = %b20, %b0
173  %v82 = phi i32 [ 0, %b0 ], [ %v79, %b20 ]
174  %v83 = phi i32 [ 32767, %b0 ], [ %v78, %b20 ]
175  %v84 = phi i32 [ 0, %b0 ], [ %v77, %b20 ]
176  %v85 = phi i32 [ 0, %b0 ], [ %v76, %b20 ]
177  %v86 = icmp eq i32 %v83, 32767
178  %v87 = sdiv i32 %v83, 2
179  %v88 = select i1 %v86, i32 0, i32 %v87
180  %v89 = add i32 %v84, %v85
181  %v90 = add i32 %v89, %v82
182  %v91 = add i32 %v90, %v88
183  ret i32 %v91
184}
185
186; Function Attrs: nounwind readonly
187declare i32 @f1(i32, i32) #0
188
189attributes #0 = { nounwind readonly }
190
191!0 = !{!1, !1, i64 0}
192!1 = !{!"int", !2}
193!2 = !{!"omnipotent char", !3}
194!3 = !{!"Simple C/C++ TBAA"}
195