1; RUN: llc -O3 -march=hexagon < %s | FileCheck %s 2; REQUIRES: asserts 3; 4; Check that IMPLICIT_DEFs are packetized correctly 5; (previously caused an assert). 6; 7; CHECK: f1: 8 9%0 = type { i8 (i8)*, i8 (i8, %1*)*, i8 (i8)* } 10%1 = type { [16384 x i16], [8192 x i16], [8192 x i16], [8192 x i32], i32, i32, i32, %2, %2, i32, i32, i32, i32 } 11%2 = type { i32, i32, i32 } 12%3 = type { %4 } 13%4 = type { i32, i8* } 14%5 = type { i8, i32, i32, i32, i16, i16, i16, i16, i8, i16, %6, %6, i32, i16, i16, i16, i16, i8 } 15%6 = type { i32, i32, i32, i32, i32, i32, i32, i8, i8 } 16%7 = type { i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, %2, %2, %8, i8 } 17%8 = type { %2, %2 } 18 19@g0 = external hidden unnamed_addr constant [7 x %0], align 8 20@g1 = external hidden global %1, align 4 21@g2 = external hidden constant %3, align 4 22@g3 = external hidden constant %3, align 4 23 24declare void @f0(%3*, i32, i32) 25 26define hidden fastcc i32 @f1(%5* %a0, %7* %a1, %2* %a2) { 27b0: 28 br i1 undef, label %b1, label %b2 29 30b1: ; preds = %b0 31 unreachable 32 33b2: ; preds = %b0 34 br i1 undef, label %b3, label %b4 35 36b3: ; preds = %b2 37 br label %b55 38 39b4: ; preds = %b2 40 br i1 undef, label %b6, label %b5 41 42b5: ; preds = %b4 43 %v0 = getelementptr inbounds %5, %5* %a0, i32 0, i32 1 44 br label %b7 45 46b6: ; preds = %b4 47 br label %b55 48 49b7: ; preds = %b52, %b5 50 %v1 = phi i32 [ undef, %b5 ], [ %v43, %b52 ] 51 %v2 = phi i32 [ 5, %b5 ], [ %v45, %b52 ] 52 %v3 = load i32, i32* undef, align 4 53 %v4 = load i32, i32* %v0, align 4 54 %v5 = sext i32 %v4 to i64 55 %v6 = sdiv i64 0, %v5 56 %v7 = trunc i64 %v6 to i32 57 %v8 = icmp slt i32 %v7, 204800 58 br i1 %v8, label %b8, label %b9 59 60b8: ; preds = %b7 61 call void @f0(%3* @g2, i32 %v3, i32 %v4) 62 br label %b54 63 64b9: ; preds = %b7 65 %v9 = load i8, i8* undef, align 1 66 %v10 = zext i8 %v9 to i32 67 br i1 undef, label %b10, label %b11 68 69b10: ; preds = %b9 70 br label %b47 71 72b11: ; preds = %b9 73 br i1 undef, label %b12, label %b47 74 75b12: ; preds = %b11 76 br i1 undef, label %b13, label %b47 77 78b13: ; preds = %b12 79 %v11 = getelementptr inbounds [7 x %0], [7 x %0]* @g0, i32 0, i32 %v10, i32 2 80 %v12 = load i8 (i8)*, i8 (i8)** %v11, align 4 81 %v13 = call zeroext i8 %v12(i8 zeroext %v9) 82 br i1 undef, label %b14, label %b47 83 84b14: ; preds = %b13 85 br i1 undef, label %b15, label %b16 86 87b15: ; preds = %b14 88 br label %b46 89 90b16: ; preds = %b14 91 br i1 false, label %b17, label %b22 92 93b17: ; preds = %b16 94 br i1 undef, label %b18, label %b19 95 96b18: ; preds = %b17 97 unreachable 98 99b19: ; preds = %b17 100 br label %b20 101 102b20: ; preds = %b20, %b19 103 br i1 undef, label %b20, label %b21 104 105b21: ; preds = %b20 106 unreachable 107 108b22: ; preds = %b16 109 br i1 false, label %b23, label %b24 110 111b23: ; preds = %b22 112 br label %b47 113 114b24: ; preds = %b22 115 br i1 false, label %b25, label %b26 116 117b25: ; preds = %b24 118 unreachable 119 120b26: ; preds = %b24 121 br label %b27 122 123b27: ; preds = %b36, %b26 124 %v14 = phi i32 [ 16, %b26 ], [ %v30, %b36 ] 125 %v15 = getelementptr inbounds %1, %1* @g1, i32 0, i32 2, i32 %v14 126 %v16 = load i16, i16* %v15, align 2 127 %v17 = sext i16 %v16 to i32 128 %v18 = select i1 undef, i32 undef, i32 %v17 129 %v19 = sext i32 %v18 to i64 130 %v20 = or i32 %v18, undef 131 br i1 false, label %b28, label %b29 132 133b28: ; preds = %b27 134 unreachable 135 136b29: ; preds = %b27 137 br i1 false, label %b30, label %b31 138 139b30: ; preds = %b29 140 unreachable 141 142b31: ; preds = %b29 143 %v21 = mul nsw i64 undef, %v19 144 %v22 = sdiv i64 0, %v19 145 %v23 = add nsw i64 %v22, 0 146 %v24 = lshr i64 %v23, 5 147 %v25 = trunc i64 %v24 to i32 148 %v26 = sub nsw i32 1608, %v25 149 %v27 = icmp sgt i16 %v16, -1 150 %v28 = and i1 undef, %v27 151 br i1 %v28, label %b32, label %b33 152 153b32: ; preds = %b31 154 store i32 %v26, i32* undef, align 4 155 br label %b36 156 157b33: ; preds = %b31 158 br i1 undef, label %b34, label %b35 159 160b34: ; preds = %b33 161 %v29 = getelementptr inbounds %1, %1* @g1, i32 0, i32 3, i32 %v14 162 store i32 undef, i32* %v29, align 4 163 br label %b36 164 165b35: ; preds = %b33 166 br label %b36 167 168b36: ; preds = %b35, %b34, %b32 169 %v30 = add nuw nsw i32 %v14, 1 170 %v31 = icmp ult i32 %v30, 8192 171 br i1 %v31, label %b27, label %b37 172 173b37: ; preds = %b36 174 br label %b38 175 176b38: ; preds = %b38, %b37 177 br i1 undef, label %b38, label %b39 178 179b39: ; preds = %b38 180 br i1 false, label %b40, label %b41 181 182b40: ; preds = %b39 183 unreachable 184 185b41: ; preds = %b39 186 %v32 = icmp ult i8 %v9, 6 187 br i1 %v32, label %b43, label %b42 188 189b42: ; preds = %b41 190 br label %b47 191 192b43: ; preds = %b41 193 %v33 = load i64, i64* undef, align 8 194 br label %b44 195 196b44: ; preds = %b44, %b43 197 br i1 undef, label %b45, label %b44 198 199b45: ; preds = %b44 200 %v34 = sdiv i64 undef, %v33 201 %v35 = trunc i64 %v34 to i32 202 %v36 = add nsw i32 0, %v3 203 %v37 = sext i32 %v36 to i64 204 %v38 = mul nsw i64 %v37, 4096000 205 %v39 = sdiv i64 %v38, 0 206 %v40 = trunc i64 %v39 to i32 207 br label %b46 208 209b46: ; preds = %b45, %b15 210 %v41 = phi i32 [ undef, %b15 ], [ %v40, %b45 ] 211 br label %b47 212 213b47: ; preds = %b46, %b42, %b23, %b13, %b12, %b11, %b10 214 %v42 = phi i8 [ 1, %b10 ], [ 0, %b46 ], [ 3, %b23 ], [ 1, %b42 ], [ %v13, %b13 ], [ undef, %b12 ], [ undef, %b11 ] 215 %v43 = phi i32 [ %v1, %b10 ], [ %v41, %b46 ], [ %v1, %b23 ], [ %v1, %b42 ], [ %v1, %b13 ], [ %v1, %b12 ], [ %v1, %b11 ] 216 %v44 = icmp eq i8 %v42, 1 217 br i1 %v44, label %b48, label %b49 218 219b48: ; preds = %b47 220 br label %b54 221 222b49: ; preds = %b47 223 br i1 undef, label %b50, label %b52 224 225b50: ; preds = %b49 226 br i1 undef, label %b51, label %b53 227 228b51: ; preds = %b50 229 br label %b52 230 231b52: ; preds = %b51, %b49 232 %v45 = add nsw i32 %v2, -1 233 %v46 = icmp eq i32 %v45, 0 234 br i1 %v46, label %b54, label %b7 235 236b53: ; preds = %b50 237 call void @f0(%3* @g3, i32 %v43, i32 undef) 238 unreachable 239 240b54: ; preds = %b52, %b48, %b8 241 unreachable 242 243b55: ; preds = %b6, %b3 244 ret i32 0 245} 246