1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32F %s
4; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
5; RUN:   | FileCheck -check-prefix=RV64F %s
6
7@gd = external global double
8
9define double @constraint_f_double(double %a) nounwind {
10; RV32F-LABEL: constraint_f_double:
11; RV32F:       # %bb.0:
12; RV32F-NEXT:    addi sp, sp, -16
13; RV32F-NEXT:    sw a0, 8(sp)
14; RV32F-NEXT:    sw a1, 12(sp)
15; RV32F-NEXT:    fld ft0, 8(sp)
16; RV32F-NEXT:    lui a0, %hi(gd)
17; RV32F-NEXT:    fld ft1, %lo(gd)(a0)
18; RV32F-NEXT:    #APP
19; RV32F-NEXT:    fadd.d ft0, ft0, ft1
20; RV32F-NEXT:    #NO_APP
21; RV32F-NEXT:    fsd ft0, 8(sp)
22; RV32F-NEXT:    lw a0, 8(sp)
23; RV32F-NEXT:    lw a1, 12(sp)
24; RV32F-NEXT:    addi sp, sp, 16
25; RV32F-NEXT:    ret
26;
27; RV64F-LABEL: constraint_f_double:
28; RV64F:       # %bb.0:
29; RV64F-NEXT:    lui a1, %hi(gd)
30; RV64F-NEXT:    fld ft0, %lo(gd)(a1)
31; RV64F-NEXT:    fmv.d.x ft1, a0
32; RV64F-NEXT:    #APP
33; RV64F-NEXT:    fadd.d ft0, ft1, ft0
34; RV64F-NEXT:    #NO_APP
35; RV64F-NEXT:    fmv.x.d a0, ft0
36; RV64F-NEXT:    ret
37  %1 = load double, double* @gd
38  %2 = tail call double asm "fadd.d $0, $1, $2", "=f,f,f"(double %a, double %1)
39  ret double %2
40}
41
42define double @constraint_f_double_abi_name(double %a) nounwind {
43; RV32F-LABEL: constraint_f_double_abi_name:
44; RV32F:       # %bb.0:
45; RV32F-NEXT:    addi sp, sp, -16
46; RV32F-NEXT:    sw a0, 8(sp)
47; RV32F-NEXT:    sw a1, 12(sp)
48; RV32F-NEXT:    fld fa1, 8(sp)
49; RV32F-NEXT:    lui a0, %hi(gd)
50; RV32F-NEXT:    fld fs0, %lo(gd)(a0)
51; RV32F-NEXT:    #APP
52; RV32F-NEXT:    fadd.d ft0, fa1, fs0
53; RV32F-NEXT:    #NO_APP
54; RV32F-NEXT:    fsd ft0, 8(sp)
55; RV32F-NEXT:    lw a0, 8(sp)
56; RV32F-NEXT:    lw a1, 12(sp)
57; RV32F-NEXT:    addi sp, sp, 16
58; RV32F-NEXT:    ret
59;
60; RV64F-LABEL: constraint_f_double_abi_name:
61; RV64F:       # %bb.0:
62; RV64F-NEXT:    lui a1, %hi(gd)
63; RV64F-NEXT:    fld fs0, %lo(gd)(a1)
64; RV64F-NEXT:    fmv.d.x fa1, a0
65; RV64F-NEXT:    #APP
66; RV64F-NEXT:    fadd.d ft0, fa1, fs0
67; RV64F-NEXT:    #NO_APP
68; RV64F-NEXT:    fmv.x.d a0, ft0
69; RV64F-NEXT:    ret
70  %1 = load double, double* @gd
71  %2 = tail call double asm "fadd.d $0, $1, $2", "={ft0},{fa1},{fs0}"(double %a, double %1)
72  ret double %2
73}
74