1 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s
2
atomic(void)3 int atomic(void) {
4 // non-sensical test for sync functions
5 int old;
6 int val = 1;
7 char valc = 1;
8 _Bool valb = 0;
9 unsigned int uval = 1;
10 int cmp = 0;
11 int* ptrval;
12
13 old = __sync_fetch_and_add(&val, 1);
14 // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
15
16 old = __sync_fetch_and_sub(&valc, 2);
17 // CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst
18
19 old = __sync_fetch_and_min(&val, 3);
20 // CHECK: atomicrmw min i32* %val, i32 3 seq_cst
21
22 old = __sync_fetch_and_max(&val, 4);
23 // CHECK: atomicrmw max i32* %val, i32 4 seq_cst
24
25 old = __sync_fetch_and_umin(&uval, 5u);
26 // CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst
27
28 old = __sync_fetch_and_umax(&uval, 6u);
29 // CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst
30
31 old = __sync_lock_test_and_set(&val, 7);
32 // CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst
33
34 old = __sync_swap(&val, 8);
35 // CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst
36
37 old = __sync_val_compare_and_swap(&val, 4, 1976);
38 // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst
39 // CHECK: extractvalue { i32, i1 } [[PAIR]], 0
40
41 old = __sync_bool_compare_and_swap(&val, 4, 1976);
42 // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst
43 // CHECK: extractvalue { i32, i1 } [[PAIR]], 1
44
45 old = __sync_fetch_and_and(&val, 0x9);
46 // CHECK: atomicrmw and i32* %val, i32 9 seq_cst
47
48 old = __sync_fetch_and_or(&val, 0xa);
49 // CHECK: atomicrmw or i32* %val, i32 10 seq_cst
50
51 old = __sync_fetch_and_xor(&val, 0xb);
52 // CHECK: atomicrmw xor i32* %val, i32 11 seq_cst
53
54 old = __sync_fetch_and_nand(&val, 0xc);
55 // CHECK: atomicrmw nand i32* %val, i32 12 seq_cst
56
57 old = __sync_add_and_fetch(&val, 1);
58 // CHECK: atomicrmw add i32* %val, i32 1 seq_cst
59
60 old = __sync_sub_and_fetch(&val, 2);
61 // CHECK: atomicrmw sub i32* %val, i32 2 seq_cst
62
63 old = __sync_and_and_fetch(&valc, 3);
64 // CHECK: atomicrmw and i8* %valc, i8 3 seq_cst
65
66 old = __sync_or_and_fetch(&valc, 4);
67 // CHECK: atomicrmw or i8* %valc, i8 4 seq_cst
68
69 old = __sync_xor_and_fetch(&valc, 5);
70 // CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst
71
72 old = __sync_nand_and_fetch(&valc, 6);
73 // CHECK: atomicrmw nand i8* %valc, i8 6 seq_cst
74
75 __sync_val_compare_and_swap((void **)0, (void *)0, (void *)0);
76 // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* null, i32 0, i32 0 seq_cst
77 // CHECK: extractvalue { i32, i1 } [[PAIR]], 0
78
79 if ( __sync_val_compare_and_swap(&valb, 0, 1)) {
80 // CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i8* %valb, i8 0, i8 1 seq_cst
81 // CHECK: [[VAL:%[a-z0-9_.]+]] = extractvalue { i8, i1 } [[PAIR]], 0
82 // CHECK: trunc i8 [[VAL]] to i1
83 old = 42;
84 }
85
86 __sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0);
87 // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst
88
89 __sync_lock_release(&val);
90 // CHECK: store atomic i32 0, {{.*}} release, align 4
91
92 __sync_lock_release(&ptrval);
93 // CHECK: store atomic i32 0, {{.*}} release, align 4
94
95 __sync_synchronize ();
96 // CHECK: fence seq_cst
97
98 return old;
99 }
100
101 // CHECK: @release_return
release_return(int * lock)102 void release_return(int *lock) {
103 // Ensure this is actually returning void all the way through.
104 return __sync_lock_release(lock);
105 // CHECK: store atomic {{.*}} release, align 4
106 }
107
108
109 // rdar://8461279 - Atomics with address spaces.
110 // CHECK: @addrspace
addrspace(int * P)111 void addrspace(int __attribute__((address_space(256))) * P) {
112 __sync_bool_compare_and_swap(P, 0, 1);
113 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
114
115 __sync_val_compare_and_swap(P, 0, 1);
116 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
117
118 __sync_xor_and_fetch(P, 123);
119 // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst
120 }
121