1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -mattr=+power8-vector < %s | FileCheck %s 3; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mattr=+power8-vector < %s | FileCheck %s 4; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck -check-prefix=CHECK-PWR7 %s 5; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck -check-prefix=CHECK-PWR7 %s 6 7define void @VPKUDUM_unary(<2 x i64>* %A) { 8; CHECK-LABEL: VPKUDUM_unary: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: lxvw4x 34, 0, 3 11; CHECK-NEXT: vpkudum 2, 2, 2 12; CHECK-NEXT: stxvw4x 34, 0, 3 13; CHECK-NEXT: blr 14; 15; CHECK-PWR7-LABEL: VPKUDUM_unary: 16; CHECK-PWR7: # %bb.0: # %entry 17; CHECK-PWR7-NEXT: lxvw4x 34, 0, 3 18; CHECK-PWR7-NEXT: vmrglw 3, 2, 2 19; CHECK-PWR7-NEXT: vmrghw 2, 2, 2 20; CHECK-PWR7-NEXT: vmrglw 2, 2, 3 21; CHECK-PWR7-NEXT: stxvw4x 34, 0, 3 22; CHECK-PWR7-NEXT: blr 23entry: 24 %tmp = load <2 x i64>, <2 x i64>* %A 25 %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> 26 %tmp3 = extractelement <4 x i32> %tmp2, i32 1 27 %tmp4 = extractelement <4 x i32> %tmp2, i32 3 28 %tmp5 = insertelement <4 x i32> undef, i32 %tmp3, i32 0 29 %tmp6 = insertelement <4 x i32> %tmp5, i32 %tmp4, i32 1 30 %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 2 31 %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 3 32 %tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64> 33 store <2 x i64> %tmp9, <2 x i64>* %A 34 ret void 35} 36 37define void @VPKUDUM(<2 x i64>* %A, <2 x i64>* %B) { 38; CHECK-LABEL: VPKUDUM: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: lxvw4x 34, 0, 3 41; CHECK-NEXT: lxvw4x 35, 0, 4 42; CHECK-NEXT: vpkudum 2, 2, 3 43; CHECK-NEXT: stxvw4x 34, 0, 3 44; CHECK-NEXT: blr 45; 46; CHECK-PWR7-LABEL: VPKUDUM: 47; CHECK-PWR7: # %bb.0: # %entry 48; CHECK-PWR7-NEXT: lxvw4x 34, 0, 3 49; CHECK-PWR7-NEXT: lxvw4x 35, 0, 4 50; CHECK-PWR7-NEXT: vmrglw 4, 2, 3 51; CHECK-PWR7-NEXT: vmrghw 2, 2, 3 52; CHECK-PWR7-NEXT: vmrglw 2, 2, 4 53; CHECK-PWR7-NEXT: stxvw4x 34, 0, 3 54; CHECK-PWR7-NEXT: blr 55entry: 56 %tmp = load <2 x i64>, <2 x i64>* %A 57 %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> 58 %tmp3 = load <2 x i64>, <2 x i64>* %B 59 %tmp4 = bitcast <2 x i64> %tmp3 to <4 x i32> 60 %tmp5 = extractelement <4 x i32> %tmp2, i32 1 61 %tmp6 = extractelement <4 x i32> %tmp2, i32 3 62 %tmp7 = extractelement <4 x i32> %tmp4, i32 1 63 %tmp8 = extractelement <4 x i32> %tmp4, i32 3 64 %tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0 65 %tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1 66 %tmp11 = insertelement <4 x i32> %tmp10, i32 %tmp7, i32 2 67 %tmp12 = insertelement <4 x i32> %tmp11, i32 %tmp8, i32 3 68 %tmp13 = bitcast <4 x i32> %tmp12 to <2 x i64> 69 store <2 x i64> %tmp13, <2 x i64>* %A 70 ret void 71} 72 73