1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
3
4declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>)
5declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
6declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>)
7declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>)
8declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8 immarg) #0
9
10;
11; Demanded Elts
12;
13
14define double @elts_addsub_v2f64(<2 x double> %0, <2 x double> %1) {
15; CHECK-LABEL: @elts_addsub_v2f64(
16; CHECK-NEXT:    [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> poison, <2 x i32> <i32 1, i32 undef>
17; CHECK-NEXT:    [[TMP4:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP3]]
18; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
19; CHECK-NEXT:    ret double [[TMP5]]
20;
21  %3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> <i32 0, i32 0>
22  %4 = shufflevector <2 x double> %1, <2 x double> poison, <2 x i32> <i32 1, i32 1>
23  %5 = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %3, <2 x double> %4)
24  %6 = extractelement <2 x double> %5, i32 0
25  ret double %6
26}
27
28define double @elts_addsub_v2f64_sub(<2 x double> %0, <2 x double> %1) {
29; CHECK-LABEL: @elts_addsub_v2f64_sub(
30; CHECK-NEXT:    [[TMP3:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP1:%.*]]
31; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
32; CHECK-NEXT:    ret double [[TMP4]]
33;
34  %3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> <i32 0, i32 0>
35  %4 = shufflevector <2 x double> %1, <2 x double> poison, <2 x i32> <i32 0, i32 0>
36  %5 = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %3, <2 x double> %4)
37  %6 = extractelement <2 x double> %5, i32 0
38  ret double %6
39}
40
41define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) {
42; CHECK-LABEL: @elts_addsub_v4f32(
43; CHECK-NEXT:    [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP0:%.*]], <4 x float> [[TMP1:%.*]])
44; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
45; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
46; CHECK-NEXT:    [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
47; CHECK-NEXT:    ret float [[TMP6]]
48;
49  %3 = shufflevector <4 x float> %0, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
50  %4 = shufflevector <4 x float> %1, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
51  %5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4)
52  %6 = extractelement <4 x float> %5, i32 0
53  %7 = extractelement <4 x float> %5, i32 1
54  %8 = fadd float %6, %7
55  ret float %8
56}
57
58define float @elts_addsub_v4f32_add(<4 x float> %0, <4 x float> %1) {
59; CHECK-LABEL: @elts_addsub_v4f32_add(
60; CHECK-NEXT:    [[TMP3:%.*]] = fadd <4 x float> [[TMP0:%.*]], [[TMP1:%.*]]
61; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
62; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
63; CHECK-NEXT:    [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
64; CHECK-NEXT:    ret float [[TMP6]]
65;
66  %3 = shufflevector <4 x float> %0, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
67  %4 = shufflevector <4 x float> %1, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
68  %5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4)
69  %6 = extractelement <4 x float> %5, i32 1
70  %7 = extractelement <4 x float> %5, i32 3
71  %8 = fadd float %6, %7
72  ret float %8
73}
74
75define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) {
76; CHECK-LABEL: @elts_addsub_v4f64(
77; CHECK-NEXT:    [[TMP3:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP0:%.*]], <4 x double> [[TMP1:%.*]])
78; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 0
79; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 1
80; CHECK-NEXT:    [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]]
81; CHECK-NEXT:    ret double [[TMP6]]
82;
83  %3 = shufflevector <4 x double> %0, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
84  %4 = shufflevector <4 x double> %1, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
85  %5 = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %3, <4 x double> %4)
86  %6 = extractelement <4 x double> %5, i32 0
87  %7 = extractelement <4 x double> %5, i32 1
88  %8 = fadd double %6, %7
89  ret double %8
90}
91
92define double @elts_addsub_v4f64_add(<4 x double> %0, <4 x double> %1) {
93; CHECK-LABEL: @elts_addsub_v4f64_add(
94; CHECK-NEXT:    [[TMP3:%.*]] = fadd <4 x double> [[TMP0:%.*]], [[TMP1:%.*]]
95; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 1
96; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 3
97; CHECK-NEXT:    [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]]
98; CHECK-NEXT:    ret double [[TMP6]]
99;
100  %3 = shufflevector <4 x double> %0, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
101  %4 = shufflevector <4 x double> %1, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
102  %5 = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %3, <4 x double> %4)
103  %6 = extractelement <4 x double> %5, i32 1
104  %7 = extractelement <4 x double> %5, i32 3
105  %8 = fadd double %6, %7
106  ret double %8
107}
108
109define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) {
110; CHECK-LABEL: @elts_addsub_v8f32(
111; CHECK-NEXT:    [[TMP3:%.*]] = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> [[TMP0:%.*]], <8 x float> [[TMP1:%.*]])
112; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0
113; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 1
114; CHECK-NEXT:    [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
115; CHECK-NEXT:    ret float [[TMP6]]
116;
117  %3 = shufflevector <8 x float> %0, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
118  %4 = shufflevector <8 x float> %1, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
119  %5 = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %3, <8 x float> %4)
120  %6 = extractelement <8 x float> %5, i32 0
121  %7 = extractelement <8 x float> %5, i32 1
122  %8 = fadd float %6, %7
123  ret float %8
124}
125
126define float @elts_addsub_v8f32_sub(<8 x float> %0, <8 x float> %1) {
127; CHECK-LABEL: @elts_addsub_v8f32_sub(
128; CHECK-NEXT:    [[TMP3:%.*]] = fsub <8 x float> [[TMP0:%.*]], [[TMP1:%.*]]
129; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0
130; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 4
131; CHECK-NEXT:    [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
132; CHECK-NEXT:    ret float [[TMP6]]
133;
134  %3 = shufflevector <8 x float> %0, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
135  %4 = shufflevector <8 x float> %1, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
136  %5 = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %3, <8 x float> %4)
137  %6 = extractelement <8 x float> %5, i32 0
138  %7 = extractelement <8 x float> %5, i32 4
139  %8 = fadd float %6, %7
140  ret float %8
141}
142
143define void @PR46277(float %0, float %1, float %2, float %3, <4 x float> %4, float* %5) {
144; CHECK-LABEL: @PR46277(
145; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP0:%.*]], i32 0
146; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i32 1
147; CHECK-NEXT:    [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP8]], <4 x float> [[TMP4:%.*]])
148; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i32 0
149; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds float, float* [[TMP5:%.*]], i64 1
150; CHECK-NEXT:    store float [[TMP10]], float* [[TMP5]], align 4
151; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i32 1
152; CHECK-NEXT:    store float [[TMP12]], float* [[TMP11]], align 4
153; CHECK-NEXT:    ret void
154;
155  %7 = insertelement <4 x float> poison, float %0, i32 0
156  %8 = insertelement <4 x float> %7, float %1, i32 1
157  %9 = insertelement <4 x float> %8, float %2, i32 2
158  %10 = insertelement <4 x float> %9, float %3, i32 3
159  %11 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %10, <4 x float> %4)
160  %12 = extractelement <4 x float> %11, i32 0
161  %13 = getelementptr inbounds float, float* %5, i64 1
162  store float %12, float* %5, align 4
163  %14 = extractelement <4 x float> %11, i32 1
164  store float %14, float* %13, align 4
165  ret void
166}
167
168define double @PR48476_fsub(<2 x double> %x) {
169; CHECK-LABEL: @PR48476_fsub(
170; CHECK-NEXT:    [[TMP1:%.*]] = fsub <2 x double> <double 0.000000e+00, double poison>, [[X:%.*]]
171; CHECK-NEXT:    [[T2:%.*]] = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[X]], i8 6)
172; CHECK-NEXT:    [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i32 0
173; CHECK-NEXT:    ret double [[VECEXT]]
174;
175  %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x)
176  %t2 = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %t1, <2 x double> %x, i8 6)
177  %vecext = extractelement <2 x double> %t2, i32 0
178  ret double %vecext
179}
180
181define double @PR48476_fadd_fsub(<2 x double> %x) {
182; CHECK-LABEL: @PR48476_fadd_fsub(
183; CHECK-NEXT:    [[TMP1:%.*]] = fadd <2 x double> [[X:%.*]], <double poison, double 0.000000e+00>
184; CHECK-NEXT:    [[S:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> <i32 1, i32 undef>
185; CHECK-NEXT:    [[TMP2:%.*]] = fsub <2 x double> [[S]], [[X]]
186; CHECK-NEXT:    [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
187; CHECK-NEXT:    ret double [[VECEXT]]
188;
189  %t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x)
190  %s = shufflevector <2 x double> %t1, <2 x double> poison, <2 x i32> <i32 1, i32 0>
191  %t2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %s, <2 x double> %x)
192  %vecext = extractelement <2 x double> %t2, i32 0
193  ret double %vecext
194}
195