1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
9 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
11 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK8
12
13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
19 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // expected-no-diagnostics
24 #ifndef HEADER
25 #define HEADER
26
27 #ifdef OMP5
28 #define CONDITIONAL conditional :
29 #else
30 #define CONDITIONAL
31 #endif //OMP5
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
38 S<T> &operator=(const S<T> &);
operator TS39 operator T() { return T(); }
~SS40 ~S() {}
41 };
42
43 volatile int g = 1212;
44
45 template <typename T>
tmain()46 T tmain() {
47 S<T> test;
48 T t_var = T();
49 T vec[] = {1, 2};
50 S<T> s_arr[] = {1, 2};
51 S<T> var(3);
52 #pragma omp parallel
53 #pragma omp sections lastprivate(t_var, vec, s_arr, var)
54 {
55 vec[0] = t_var;
56 #pragma omp section
57 s_arr[0] = var;
58 }
59 return T();
60 }
61
62 namespace A {
63 double x;
64 }
65 namespace B {
66 using A::x;
67 }
68
main()69 int main() {
70 static int sivar;
71 #ifdef LAMBDA
72 [&]() {
73 #pragma omp parallel
74 #pragma omp sections lastprivate(g, sivar)
75 {
76
77
78
79 {
80 g = 1;
81 sivar = 13;
82 }
83 // Check for final copying of private values back to original vars.
84 // Actual copying.
85
86 // original g=private_g;
87
88 // original sivar = private sivar;
89 #pragma omp section
90 [&]() {
91 g = 2;
92 sivar = 23;
93 }();
94 }
95 }();
96 return 0;
97 #elif defined(BLOCKS)
98 ^{
99 #pragma omp parallel
100 #pragma omp sections lastprivate(g, sivar)
101 {
102
103
104 {
105 g = 1;
106 sivar = 17;
107 }
108 // Check for final copying of private values back to original vars.
109 // Actual copying.
110
111 // original g=private_g;
112
113 // original sivar = private sivar;
114 #pragma omp section
115 ^{
116 g = 2;
117 sivar = 29;
118 }();
119 }
120 }();
121 return 0;
122 #else
123 S<float> test;
124 int t_var = 0;
125 int vec[] = {1, 2};
126 S<float> s_arr[] = {1, 2};
127 S<float> var(3);
128 #pragma omp parallel
129 #pragma omp sections lastprivate(t_var, vec, s_arr, var, sivar)
130 {
131 {
132 vec[0] = t_var;
133 s_arr[0] = var;
134 sivar = 31;
135 }
136 }
137 #pragma omp parallel
138 #pragma omp sections lastprivate(CONDITIONAL A::x, B::x)
139 {
140 A::x++;
141 #pragma omp section
142 ;
143 }
144 return tmain<int>();
145 #endif
146 }
147
148
149
150
151
152
153 // <Skip loop body>
154
155
156
157
158 // Check for default initialization.
159
160 // <Skip loop body>
161
162
163
164 // Check for final copying of private values back to original vars.
165 // Actual copying.
166
167 // original x=private_x;
168
169
170
171
172 // Check for default initialization.
173 // <Skip loop body>
174
175 // Check for final copying of private values back to original vars.
176 // Actual copying.
177
178 // original t_var=private_t_var;
179
180 // original vec[]=private_vec[];
181
182 // original s_arr[]=private_s_arr[];
183
184 // CHK: [[SIVAR_REF:%.+]] = getelementptr [[S_INT_TY]], [[S_INT_TY]]* [[S_ARR_BEGIN]], i{{[0-9]+}} 4
185 // CHK: store i{{[0-9]+}}* [[SIVAR]], i{{[0-9]+}} [[SIVAR_REF]]
186
187
188 // original var=private_var;
189 #endif
190
191 // CHECK1-LABEL: define {{[^@]+}}@main
192 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
193 // CHECK1-NEXT: entry:
194 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
196 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
198 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
199 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
200 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
201 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
202 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
203 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
204 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
205 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
206 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
207 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
208 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
209 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
210 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
211 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
212 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
213 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
214 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
215 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
216 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
217 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
218 // CHECK1: arraydestroy.body:
219 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
220 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
221 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
222 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
223 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
224 // CHECK1: arraydestroy.done1:
225 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
226 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
227 // CHECK1-NEXT: ret i32 [[TMP2]]
228 //
229 //
230 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
231 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
232 // CHECK1-NEXT: entry:
233 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
234 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
235 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
236 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
237 // CHECK1-NEXT: ret void
238 //
239 //
240 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
241 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
242 // CHECK1-NEXT: entry:
243 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
244 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
245 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
246 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4
247 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
248 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
249 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
250 // CHECK1-NEXT: ret void
251 //
252 //
253 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
254 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
255 // CHECK1-NEXT: entry:
256 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
257 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
258 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
259 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
260 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
261 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
262 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
263 // CHECK1-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
264 // CHECK1-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
265 // CHECK1-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
266 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
269 // CHECK1-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
270 // CHECK1-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
271 // CHECK1-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
272 // CHECK1-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4
273 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
274 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
275 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
276 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
277 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
278 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
279 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
280 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
281 // CHECK1-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
282 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
283 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
284 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
285 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
286 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_UB_]], align 4
287 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
288 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
289 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
290 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
291 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
292 // CHECK1: arrayctor.loop:
293 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
294 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
295 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
296 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
297 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
298 // CHECK1: arrayctor.cont:
299 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
300 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
301 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
302 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
303 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
304 // CHECK1-NEXT: [[TMP8:%.*]] = icmp slt i32 [[TMP7]], 0
305 // CHECK1-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP7]], i32 0
306 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
307 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
308 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
310 // CHECK1: omp.inner.for.cond:
311 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
312 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
313 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
314 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
315 // CHECK1: omp.inner.for.body:
316 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
317 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
318 // CHECK1-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
319 // CHECK1-NEXT: ]
320 // CHECK1: .omp.sections.case:
321 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR1]], align 4
322 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
323 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
324 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0
325 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
326 // CHECK1-NEXT: store i32 31, i32* [[SIVAR5]], align 4
327 // CHECK1-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
328 // CHECK1: .omp.sections.exit:
329 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
330 // CHECK1: omp.inner.for.inc:
331 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
332 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
333 // CHECK1-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
334 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
335 // CHECK1: omp.inner.for.end:
336 // CHECK1-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
337 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
338 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]])
339 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
340 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
341 // CHECK1-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
342 // CHECK1: .omp.lastprivate.then:
343 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
344 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[TMP0]], align 4
345 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
346 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
347 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 8, i1 false)
348 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
349 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
350 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
351 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN7]], [[TMP24]]
352 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
353 // CHECK1: omp.arraycpy.body:
354 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP23]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
355 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
356 // CHECK1-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
357 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
358 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
359 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
360 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
361 // CHECK1: omp.arraycpy.done9:
362 // CHECK1-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
363 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[SIVAR5]], align 4
364 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[TMP4]], align 4
365 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
366 // CHECK1: .omp.lastprivate.done:
367 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
368 // CHECK1-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
369 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
370 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
371 // CHECK1: arraydestroy.body:
372 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
373 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
374 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
375 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
376 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
377 // CHECK1: arraydestroy.done12:
378 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
379 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
380 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]])
381 // CHECK1-NEXT: ret void
382 //
383 //
384 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
385 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
386 // CHECK1-NEXT: entry:
387 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
388 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
389 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
390 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
391 // CHECK1-NEXT: ret void
392 //
393 //
394 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
395 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
396 // CHECK1-NEXT: entry:
397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
399 // CHECK1-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
400 // CHECK1-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
401 // CHECK1-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
402 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
403 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
404 // CHECK1-NEXT: [[X:%.*]] = alloca double, align 8
405 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
406 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
407 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
408 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
409 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
410 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
411 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
412 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
413 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
414 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
415 // CHECK1-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 1
416 // CHECK1-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 1
417 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
418 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
419 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
420 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
421 // CHECK1: omp.inner.for.cond:
422 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
423 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
424 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
425 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
426 // CHECK1: omp.inner.for.body:
427 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
428 // CHECK1-NEXT: switch i32 [[TMP8]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
429 // CHECK1-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
430 // CHECK1-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE1:%.*]]
431 // CHECK1-NEXT: ]
432 // CHECK1: .omp.sections.case:
433 // CHECK1-NEXT: [[TMP9:%.*]] = load double, double* [[X]], align 8
434 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
435 // CHECK1-NEXT: store double [[INC]], double* [[X]], align 8
436 // CHECK1-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
437 // CHECK1: .omp.sections.case1:
438 // CHECK1-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
439 // CHECK1: .omp.sections.exit:
440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
441 // CHECK1: omp.inner.for.inc:
442 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
443 // CHECK1-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP10]], 1
444 // CHECK1-NEXT: store i32 [[INC2]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
445 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
446 // CHECK1: omp.inner.for.end:
447 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
448 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
449 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
450 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
451 // CHECK1: .omp.lastprivate.then:
452 // CHECK1-NEXT: [[TMP13:%.*]] = load double, double* [[X]], align 8
453 // CHECK1-NEXT: store double [[TMP13]], double* @_ZN1A1xE, align 8
454 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
455 // CHECK1: .omp.lastprivate.done:
456 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
457 // CHECK1-NEXT: ret void
458 //
459 //
460 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
461 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
462 // CHECK1-NEXT: entry:
463 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
464 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
465 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
466 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
467 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
468 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
469 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
470 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
471 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
472 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
473 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
474 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
475 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
476 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
477 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3)
478 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]])
479 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
480 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
481 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
482 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
483 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
484 // CHECK1: arraydestroy.body:
485 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
486 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
487 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
488 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
489 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
490 // CHECK1: arraydestroy.done1:
491 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
492 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
493 // CHECK1-NEXT: ret i32 [[TMP2]]
494 //
495 //
496 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
497 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
498 // CHECK1-NEXT: entry:
499 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
500 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
501 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
502 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
503 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4
504 // CHECK1-NEXT: ret void
505 //
506 //
507 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
508 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
509 // CHECK1-NEXT: entry:
510 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
511 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
512 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
513 // CHECK1-NEXT: ret void
514 //
515 //
516 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
517 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
518 // CHECK1-NEXT: entry:
519 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
520 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
521 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
522 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4
523 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
524 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
525 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
526 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4
527 // CHECK1-NEXT: ret void
528 //
529 //
530 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
531 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
532 // CHECK1-NEXT: entry:
533 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
534 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
535 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
536 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
537 // CHECK1-NEXT: ret void
538 //
539 //
540 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
541 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
542 // CHECK1-NEXT: entry:
543 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
544 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
545 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
546 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
547 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
548 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
549 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
550 // CHECK1-NEXT: ret void
551 //
552 //
553 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
554 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
555 // CHECK1-NEXT: entry:
556 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
557 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
558 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
559 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
560 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
561 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
562 // CHECK1-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
567 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
568 // CHECK1-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
569 // CHECK1-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
570 // CHECK1-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
571 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
572 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
573 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
574 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
575 // CHECK1-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
576 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
577 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
578 // CHECK1-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
579 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
580 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
581 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
582 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
583 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
584 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
585 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
586 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
587 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
588 // CHECK1: arrayctor.loop:
589 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
590 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
591 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
592 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
593 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
594 // CHECK1: arrayctor.cont:
595 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
596 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
597 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
598 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
599 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
600 // CHECK1-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 1
601 // CHECK1-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 1
602 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
603 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
604 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
605 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
606 // CHECK1: omp.inner.for.cond:
607 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
608 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
609 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
610 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
611 // CHECK1: omp.inner.for.body:
612 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
613 // CHECK1-NEXT: switch i32 [[TMP12]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
614 // CHECK1-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
615 // CHECK1-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE5:%.*]]
616 // CHECK1-NEXT: ]
617 // CHECK1: .omp.sections.case:
618 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
619 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
620 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
621 // CHECK1-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
622 // CHECK1: .omp.sections.case5:
623 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0
624 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
625 // CHECK1-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
626 // CHECK1: .omp.sections.exit:
627 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
628 // CHECK1: omp.inner.for.inc:
629 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
630 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1
631 // CHECK1-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
632 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
633 // CHECK1: omp.inner.for.end:
634 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
635 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
636 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
637 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
638 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
639 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
640 // CHECK1: .omp.lastprivate.then:
641 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
642 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP0]], align 4
643 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
644 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
645 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 8, i1 false)
646 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
647 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR3]] to %struct.S.0*
648 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2
649 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN7]], [[TMP23]]
650 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
651 // CHECK1: omp.arraycpy.body:
652 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP22]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
653 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
654 // CHECK1-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
655 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
656 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
657 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP23]]
658 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
659 // CHECK1: omp.arraycpy.done9:
660 // CHECK1-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
661 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
662 // CHECK1: .omp.lastprivate.done:
663 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
664 // CHECK1-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
665 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
666 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
667 // CHECK1: arraydestroy.body:
668 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
669 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
670 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
671 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
672 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
673 // CHECK1: arraydestroy.done12:
674 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
675 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
676 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP26]])
677 // CHECK1-NEXT: ret void
678 //
679 //
680 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
681 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
682 // CHECK1-NEXT: entry:
683 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
684 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
685 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
686 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
687 // CHECK1-NEXT: ret void
688 //
689 //
690 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
691 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
692 // CHECK1-NEXT: entry:
693 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
694 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
695 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
696 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
697 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4
698 // CHECK1-NEXT: ret void
699 //
700 //
701 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
702 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
703 // CHECK1-NEXT: entry:
704 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
705 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
707 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
708 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
709 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
710 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
711 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
712 // CHECK1-NEXT: ret void
713 //
714 //
715 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
716 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
717 // CHECK1-NEXT: entry:
718 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
719 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
720 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
721 // CHECK1-NEXT: ret void
722 //
723 //
724 // CHECK2-LABEL: define {{[^@]+}}@main
725 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
726 // CHECK2-NEXT: entry:
727 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
728 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
729 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
730 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
731 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
732 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
733 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
734 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
735 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4
736 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
737 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
738 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
739 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
740 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
741 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
742 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
743 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
744 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
745 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
746 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
747 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
748 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
749 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
750 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
751 // CHECK2: arraydestroy.body:
752 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
753 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
754 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
755 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
756 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
757 // CHECK2: arraydestroy.done1:
758 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
759 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
760 // CHECK2-NEXT: ret i32 [[TMP2]]
761 //
762 //
763 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
764 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
765 // CHECK2-NEXT: entry:
766 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
767 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
768 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
769 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
770 // CHECK2-NEXT: ret void
771 //
772 //
773 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
774 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
775 // CHECK2-NEXT: entry:
776 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
777 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
778 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
779 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4
780 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
781 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
782 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
783 // CHECK2-NEXT: ret void
784 //
785 //
786 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
787 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
788 // CHECK2-NEXT: entry:
789 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
790 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
791 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
792 // CHECK2-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
793 // CHECK2-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
794 // CHECK2-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
795 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
796 // CHECK2-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
797 // CHECK2-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
798 // CHECK2-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
799 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
800 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
801 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
802 // CHECK2-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
803 // CHECK2-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
804 // CHECK2-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
805 // CHECK2-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4
806 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
807 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
808 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
809 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
810 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
811 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
812 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
813 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
814 // CHECK2-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
815 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
816 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
817 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
818 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
819 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_UB_]], align 4
820 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
821 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
822 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
823 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
824 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
825 // CHECK2: arrayctor.loop:
826 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
827 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
828 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
829 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
830 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
831 // CHECK2: arrayctor.cont:
832 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
833 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
834 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
835 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
836 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
837 // CHECK2-NEXT: [[TMP8:%.*]] = icmp slt i32 [[TMP7]], 0
838 // CHECK2-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP7]], i32 0
839 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
840 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
841 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
842 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
843 // CHECK2: omp.inner.for.cond:
844 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
845 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
846 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
847 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
848 // CHECK2: omp.inner.for.body:
849 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
850 // CHECK2-NEXT: switch i32 [[TMP13]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
851 // CHECK2-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
852 // CHECK2-NEXT: ]
853 // CHECK2: .omp.sections.case:
854 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR1]], align 4
855 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
856 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
857 // CHECK2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0
858 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
859 // CHECK2-NEXT: store i32 31, i32* [[SIVAR5]], align 4
860 // CHECK2-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
861 // CHECK2: .omp.sections.exit:
862 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
863 // CHECK2: omp.inner.for.inc:
864 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
865 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
866 // CHECK2-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
867 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
868 // CHECK2: omp.inner.for.end:
869 // CHECK2-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
870 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
871 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]])
872 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
873 // CHECK2-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
874 // CHECK2-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
875 // CHECK2: .omp.lastprivate.then:
876 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
877 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[TMP0]], align 4
878 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
879 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
880 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 8, i1 false)
881 // CHECK2-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
882 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
883 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
884 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN7]], [[TMP24]]
885 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
886 // CHECK2: omp.arraycpy.body:
887 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP23]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
888 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
889 // CHECK2-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
890 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
891 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
892 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
893 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
894 // CHECK2: omp.arraycpy.done9:
895 // CHECK2-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
896 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[SIVAR5]], align 4
897 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[TMP4]], align 4
898 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
899 // CHECK2: .omp.lastprivate.done:
900 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
901 // CHECK2-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
902 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
903 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
904 // CHECK2: arraydestroy.body:
905 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
906 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
907 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
908 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
909 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
910 // CHECK2: arraydestroy.done12:
911 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
912 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
913 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]])
914 // CHECK2-NEXT: ret void
915 //
916 //
917 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
918 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
919 // CHECK2-NEXT: entry:
920 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
921 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
922 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
923 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
924 // CHECK2-NEXT: ret void
925 //
926 //
927 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
928 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
929 // CHECK2-NEXT: entry:
930 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
931 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
932 // CHECK2-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
933 // CHECK2-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
934 // CHECK2-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
935 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
936 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
937 // CHECK2-NEXT: [[X:%.*]] = alloca double, align 8
938 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
939 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
940 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
941 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
942 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
943 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
944 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
945 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
946 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
947 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
948 // CHECK2-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 1
949 // CHECK2-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 1
950 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
951 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
952 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
953 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
954 // CHECK2: omp.inner.for.cond:
955 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
956 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
957 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
958 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
959 // CHECK2: omp.inner.for.body:
960 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
961 // CHECK2-NEXT: switch i32 [[TMP8]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
962 // CHECK2-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
963 // CHECK2-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE1:%.*]]
964 // CHECK2-NEXT: ]
965 // CHECK2: .omp.sections.case:
966 // CHECK2-NEXT: [[TMP9:%.*]] = load double, double* [[X]], align 8
967 // CHECK2-NEXT: [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
968 // CHECK2-NEXT: store double [[INC]], double* [[X]], align 8
969 // CHECK2-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
970 // CHECK2: .omp.sections.case1:
971 // CHECK2-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
972 // CHECK2: .omp.sections.exit:
973 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
974 // CHECK2: omp.inner.for.inc:
975 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
976 // CHECK2-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP10]], 1
977 // CHECK2-NEXT: store i32 [[INC2]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
978 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
979 // CHECK2: omp.inner.for.end:
980 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
981 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
982 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
983 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
984 // CHECK2: .omp.lastprivate.then:
985 // CHECK2-NEXT: [[TMP13:%.*]] = load double, double* [[X]], align 8
986 // CHECK2-NEXT: store double [[TMP13]], double* @_ZN1A1xE, align 8
987 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
988 // CHECK2: .omp.lastprivate.done:
989 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
990 // CHECK2-NEXT: ret void
991 //
992 //
993 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
994 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] {
995 // CHECK2-NEXT: entry:
996 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
997 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
998 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
999 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1000 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1001 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
1002 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1003 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4
1004 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1005 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1006 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1007 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
1008 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1009 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
1010 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3)
1011 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]])
1012 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
1013 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
1014 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1015 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1016 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1017 // CHECK2: arraydestroy.body:
1018 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1019 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1020 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1021 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1022 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1023 // CHECK2: arraydestroy.done1:
1024 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1025 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
1026 // CHECK2-NEXT: ret i32 [[TMP2]]
1027 //
1028 //
1029 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1030 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1031 // CHECK2-NEXT: entry:
1032 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1033 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1034 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1035 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1036 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4
1037 // CHECK2-NEXT: ret void
1038 //
1039 //
1040 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1041 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1042 // CHECK2-NEXT: entry:
1043 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1044 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1045 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1046 // CHECK2-NEXT: ret void
1047 //
1048 //
1049 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1050 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1051 // CHECK2-NEXT: entry:
1052 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1053 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1054 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1055 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1056 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1057 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1058 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1059 // CHECK2-NEXT: store float [[TMP0]], float* [[F]], align 4
1060 // CHECK2-NEXT: ret void
1061 //
1062 //
1063 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1064 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1065 // CHECK2-NEXT: entry:
1066 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1067 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1068 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1069 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1070 // CHECK2-NEXT: ret void
1071 //
1072 //
1073 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1074 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1075 // CHECK2-NEXT: entry:
1076 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1077 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1078 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1079 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1080 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1081 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1082 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
1083 // CHECK2-NEXT: ret void
1084 //
1085 //
1086 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1087 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1088 // CHECK2-NEXT: entry:
1089 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1090 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1091 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1092 // CHECK2-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1093 // CHECK2-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1094 // CHECK2-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1095 // CHECK2-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1096 // CHECK2-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1097 // CHECK2-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1098 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1099 // CHECK2-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1100 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1101 // CHECK2-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
1102 // CHECK2-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
1103 // CHECK2-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1104 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1105 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1106 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1107 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1108 // CHECK2-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1109 // CHECK2-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1110 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1111 // CHECK2-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1112 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1113 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1114 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1115 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1116 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1117 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1118 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
1119 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1120 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1121 // CHECK2: arrayctor.loop:
1122 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1123 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1124 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1125 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1126 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1127 // CHECK2: arrayctor.cont:
1128 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1129 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1130 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1131 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1132 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1133 // CHECK2-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 1
1134 // CHECK2-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 1
1135 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1136 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1137 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1138 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1139 // CHECK2: omp.inner.for.cond:
1140 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1141 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1142 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1143 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1144 // CHECK2: omp.inner.for.body:
1145 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1146 // CHECK2-NEXT: switch i32 [[TMP12]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1147 // CHECK2-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1148 // CHECK2-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE5:%.*]]
1149 // CHECK2-NEXT: ]
1150 // CHECK2: .omp.sections.case:
1151 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
1152 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
1153 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
1154 // CHECK2-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1155 // CHECK2: .omp.sections.case5:
1156 // CHECK2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0
1157 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1158 // CHECK2-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1159 // CHECK2: .omp.sections.exit:
1160 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1161 // CHECK2: omp.inner.for.inc:
1162 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1163 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1
1164 // CHECK2-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1165 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1166 // CHECK2: omp.inner.for.end:
1167 // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1168 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1169 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
1170 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1171 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1172 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1173 // CHECK2: .omp.lastprivate.then:
1174 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1175 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP0]], align 4
1176 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1177 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
1178 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 8, i1 false)
1179 // CHECK2-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1180 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR3]] to %struct.S.0*
1181 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2
1182 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN7]], [[TMP23]]
1183 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1184 // CHECK2: omp.arraycpy.body:
1185 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP22]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1186 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1187 // CHECK2-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1188 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1189 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1190 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP23]]
1191 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
1192 // CHECK2: omp.arraycpy.done9:
1193 // CHECK2-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1194 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1195 // CHECK2: .omp.lastprivate.done:
1196 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
1197 // CHECK2-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
1198 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
1199 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1200 // CHECK2: arraydestroy.body:
1201 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1202 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1203 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1204 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1205 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1206 // CHECK2: arraydestroy.done12:
1207 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1208 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1209 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP26]])
1210 // CHECK2-NEXT: ret void
1211 //
1212 //
1213 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1214 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1215 // CHECK2-NEXT: entry:
1216 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1217 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1218 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1219 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1220 // CHECK2-NEXT: ret void
1221 //
1222 //
1223 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1224 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1225 // CHECK2-NEXT: entry:
1226 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1227 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1228 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1229 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1230 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4
1231 // CHECK2-NEXT: ret void
1232 //
1233 //
1234 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1235 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1236 // CHECK2-NEXT: entry:
1237 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1238 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1239 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1240 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1241 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1242 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1243 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1244 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1245 // CHECK2-NEXT: ret void
1246 //
1247 //
1248 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1249 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1250 // CHECK2-NEXT: entry:
1251 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1252 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1253 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1254 // CHECK2-NEXT: ret void
1255 //
1256 //
1257 // CHECK3-LABEL: define {{[^@]+}}@main
1258 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1259 // CHECK3-NEXT: entry:
1260 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1261 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
1262 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
1263 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
1264 // CHECK3-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8
1265 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]])
1266 // CHECK3-NEXT: ret i32 0
1267 //
1268 //
1269 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1270 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1271 // CHECK3-NEXT: entry:
1272 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1273 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1274 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1275 // CHECK3-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1276 // CHECK3-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1277 // CHECK3-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1278 // CHECK3-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1279 // CHECK3-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1280 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 4
1281 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1282 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1283 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1284 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1285 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1286 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1287 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1288 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1289 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1290 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1291 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1292 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1293 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1294 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1295 // CHECK3-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
1296 // CHECK3-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 1
1297 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1298 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1299 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1300 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1301 // CHECK3: omp.inner.for.cond:
1302 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1303 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1304 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1305 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1306 // CHECK3: omp.inner.for.body:
1307 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1308 // CHECK3-NEXT: switch i32 [[TMP9]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1309 // CHECK3-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1310 // CHECK3-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE2:%.*]]
1311 // CHECK3-NEXT: ]
1312 // CHECK3: .omp.sections.case:
1313 // CHECK3-NEXT: store i32 1, i32* [[G]], align 4
1314 // CHECK3-NEXT: store i32 13, i32* [[SIVAR1]], align 4
1315 // CHECK3-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1316 // CHECK3: .omp.sections.case2:
1317 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1318 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP10]], align 8
1319 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
1320 // CHECK3-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8
1321 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(16) [[REF_TMP]])
1322 // CHECK3-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1323 // CHECK3: .omp.sections.exit:
1324 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1325 // CHECK3: omp.inner.for.inc:
1326 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1327 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1
1328 // CHECK3-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1329 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1330 // CHECK3: omp.inner.for.end:
1331 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1332 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1333 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1334 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1335 // CHECK3: .omp.lastprivate.then:
1336 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4
1337 // CHECK3-NEXT: store volatile i32 [[TMP15]], i32* @g, align 4
1338 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[SIVAR1]], align 4
1339 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[TMP0]], align 4
1340 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1341 // CHECK3: .omp.lastprivate.done:
1342 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
1343 // CHECK3-NEXT: ret void
1344 //
1345 //
1346 // CHECK4-LABEL: define {{[^@]+}}@main
1347 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1348 // CHECK4-NEXT: entry:
1349 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1350 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8
1351 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
1352 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0
1353 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
1354 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1
1355 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
1356 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2
1357 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
1358 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3
1359 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
1360 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4
1361 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
1362 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5
1363 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1364 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8
1365 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()*
1366 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic*
1367 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
1368 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
1369 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8
1370 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)*
1371 // CHECK4-NEXT: call void [[TMP5]](i8* [[TMP3]])
1372 // CHECK4-NEXT: ret i32 0
1373 //
1374 //
1375 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
1376 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1:[0-9]+]] {
1377 // CHECK4-NEXT: entry:
1378 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
1379 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8
1380 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1381 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*
1382 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8
1383 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @_ZZ4mainE5sivar)
1384 // CHECK4-NEXT: ret void
1385 //
1386 //
1387 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1388 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1389 // CHECK4-NEXT: entry:
1390 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1391 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1392 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1393 // CHECK4-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1394 // CHECK4-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1395 // CHECK4-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1396 // CHECK4-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1397 // CHECK4-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1398 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4
1399 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1400 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, align 8
1401 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1402 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1403 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1404 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1405 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1406 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1407 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1408 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1409 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1410 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1411 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1412 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1413 // CHECK4-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
1414 // CHECK4-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 1
1415 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1416 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1417 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1418 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1419 // CHECK4: omp.inner.for.cond:
1420 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1421 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1422 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1423 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1424 // CHECK4: omp.inner.for.body:
1425 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1426 // CHECK4-NEXT: switch i32 [[TMP9]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1427 // CHECK4-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1428 // CHECK4-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE2:%.*]]
1429 // CHECK4-NEXT: ]
1430 // CHECK4: .omp.sections.case:
1431 // CHECK4-NEXT: store i32 1, i32* [[G]], align 4
1432 // CHECK4-NEXT: store i32 17, i32* [[SIVAR1]], align 4
1433 // CHECK4-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1434 // CHECK4: .omp.sections.case2:
1435 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 0
1436 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
1437 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 1
1438 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
1439 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 2
1440 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
1441 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 3
1442 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
1443 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 4
1444 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
1445 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 5
1446 // CHECK4-NEXT: [[TMP10:%.*]] = load volatile i32, i32* [[G]], align 4
1447 // CHECK4-NEXT: store volatile i32 [[TMP10]], i32* [[BLOCK_CAPTURED]], align 8
1448 // CHECK4-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 6
1449 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[SIVAR1]], align 4
1450 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[BLOCK_CAPTURED3]], align 4
1451 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]] to void ()*
1452 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP12]] to %struct.__block_literal_generic*
1453 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
1454 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
1455 // CHECK4-NEXT: [[TMP15:%.*]] = load i8*, i8** [[TMP13]], align 8
1456 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to void (i8*)*
1457 // CHECK4-NEXT: call void [[TMP16]](i8* [[TMP14]])
1458 // CHECK4-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1459 // CHECK4: .omp.sections.exit:
1460 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1461 // CHECK4: omp.inner.for.inc:
1462 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1463 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP17]], 1
1464 // CHECK4-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1465 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1466 // CHECK4: omp.inner.for.end:
1467 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1468 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1469 // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1470 // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1471 // CHECK4: .omp.lastprivate.then:
1472 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[G]], align 4
1473 // CHECK4-NEXT: store volatile i32 [[TMP20]], i32* @g, align 4
1474 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
1475 // CHECK4-NEXT: store i32 [[TMP21]], i32* [[TMP0]], align 4
1476 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1477 // CHECK4: .omp.lastprivate.done:
1478 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
1479 // CHECK4-NEXT: ret void
1480 //
1481 //
1482 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke
1483 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
1484 // CHECK4-NEXT: entry:
1485 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
1486 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>*, align 8
1487 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1488 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>*
1489 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>** [[BLOCK_ADDR]], align 8
1490 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 5
1491 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8
1492 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 6
1493 // CHECK4-NEXT: store i32 29, i32* [[BLOCK_CAPTURE_ADDR1]], align 4
1494 // CHECK4-NEXT: ret void
1495 //
1496 //
1497 // CHECK5-LABEL: define {{[^@]+}}@main
1498 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
1499 // CHECK5-NEXT: entry:
1500 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1501 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1502 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1503 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1504 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1505 // CHECK5-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
1506 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1507 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1508 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
1509 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1510 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1511 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1512 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1513 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1514 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1515 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
1516 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
1517 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
1518 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1519 // CHECK5-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1520 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
1521 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1522 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1523 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1524 // CHECK5: arraydestroy.body:
1525 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1526 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1527 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1528 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1529 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1530 // CHECK5: arraydestroy.done1:
1531 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1532 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
1533 // CHECK5-NEXT: ret i32 [[TMP2]]
1534 //
1535 //
1536 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1537 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
1538 // CHECK5-NEXT: entry:
1539 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1540 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1541 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1542 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1543 // CHECK5-NEXT: ret void
1544 //
1545 //
1546 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1547 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1548 // CHECK5-NEXT: entry:
1549 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1550 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1551 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1552 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1553 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1554 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1555 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1556 // CHECK5-NEXT: ret void
1557 //
1558 //
1559 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
1560 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1561 // CHECK5-NEXT: entry:
1562 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1563 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1564 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1565 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1566 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1567 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1568 // CHECK5-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1569 // CHECK5-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1570 // CHECK5-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1571 // CHECK5-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1572 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1573 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1574 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1575 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
1576 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
1577 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1578 // CHECK5-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4
1579 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1580 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1581 // CHECK5-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1582 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1583 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1584 // CHECK5-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1585 // CHECK5-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1586 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1587 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1588 // CHECK5-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1589 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1590 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1591 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1592 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1593 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1594 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1595 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
1596 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1597 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1598 // CHECK5: arrayctor.loop:
1599 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1600 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1601 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1602 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1603 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1604 // CHECK5: arrayctor.cont:
1605 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1606 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1607 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1608 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1609 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1610 // CHECK5-NEXT: [[TMP8:%.*]] = icmp slt i32 [[TMP7]], 0
1611 // CHECK5-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP7]], i32 0
1612 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1613 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1614 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1615 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1616 // CHECK5: omp.inner.for.cond:
1617 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1618 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1619 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1620 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1621 // CHECK5: omp.inner.for.body:
1622 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1623 // CHECK5-NEXT: switch i32 [[TMP13]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1624 // CHECK5-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1625 // CHECK5-NEXT: ]
1626 // CHECK5: .omp.sections.case:
1627 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR1]], align 4
1628 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
1629 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
1630 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0
1631 // CHECK5-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1632 // CHECK5-NEXT: store i32 31, i32* [[SIVAR5]], align 4
1633 // CHECK5-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1634 // CHECK5: .omp.sections.exit:
1635 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1636 // CHECK5: omp.inner.for.inc:
1637 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1638 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
1639 // CHECK5-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1640 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1641 // CHECK5: omp.inner.for.end:
1642 // CHECK5-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1643 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
1644 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]])
1645 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1646 // CHECK5-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1647 // CHECK5-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1648 // CHECK5: .omp.lastprivate.then:
1649 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
1650 // CHECK5-NEXT: store i32 [[TMP20]], i32* [[TMP0]], align 4
1651 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1652 // CHECK5-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
1653 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 8, i1 false)
1654 // CHECK5-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1655 // CHECK5-NEXT: [[TMP23:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
1656 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
1657 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN7]], [[TMP24]]
1658 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1659 // CHECK5: omp.arraycpy.body:
1660 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP23]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1661 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1662 // CHECK5-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1663 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1664 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1665 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
1666 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
1667 // CHECK5: omp.arraycpy.done9:
1668 // CHECK5-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1669 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[SIVAR5]], align 4
1670 // CHECK5-NEXT: store i32 [[TMP25]], i32* [[TMP4]], align 4
1671 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1672 // CHECK5: .omp.lastprivate.done:
1673 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
1674 // CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
1675 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
1676 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1677 // CHECK5: arraydestroy.body:
1678 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1679 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1680 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1681 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1682 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1683 // CHECK5: arraydestroy.done12:
1684 // CHECK5-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1685 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1686 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]])
1687 // CHECK5-NEXT: ret void
1688 //
1689 //
1690 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1691 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1692 // CHECK5-NEXT: entry:
1693 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1694 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1695 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1696 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1697 // CHECK5-NEXT: ret void
1698 //
1699 //
1700 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
1701 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1702 // CHECK5-NEXT: entry:
1703 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1704 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1705 // CHECK5-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1706 // CHECK5-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1707 // CHECK5-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1708 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1709 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1710 // CHECK5-NEXT: [[X:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 8
1711 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1712 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1713 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1714 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1715 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1716 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1717 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[X]], i32 0, i32 1
1718 // CHECK5-NEXT: store i8 0, i8* [[TMP0]], align 8
1719 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[X]], i32 0, i32 0
1720 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1721 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1722 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1723 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1724 // CHECK5-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
1725 // CHECK5-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP4]], i32 1
1726 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1727 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1728 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1729 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1730 // CHECK5: omp.inner.for.cond:
1731 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1732 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1733 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1734 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1735 // CHECK5: omp.inner.for.body:
1736 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1737 // CHECK5-NEXT: switch i32 [[TMP10]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1738 // CHECK5-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1739 // CHECK5-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE1:%.*]]
1740 // CHECK5-NEXT: ]
1741 // CHECK5: .omp.sections.case:
1742 // CHECK5-NEXT: [[TMP11:%.*]] = load double, double* [[TMP1]], align 8
1743 // CHECK5-NEXT: [[INC:%.*]] = fadd double [[TMP11]], 1.000000e+00
1744 // CHECK5-NEXT: store double [[INC]], double* [[TMP1]], align 8
1745 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1746 // CHECK5-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
1747 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* @.{{pl_cond[.].+[.|,]}} align 4
1748 // CHECK5-NEXT: [[TMP14:%.*]] = icmp sle i32 [[TMP13]], [[TMP12]]
1749 // CHECK5-NEXT: br i1 [[TMP14]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]
1750 // CHECK5: lp_cond_then:
1751 // CHECK5-NEXT: store i32 [[TMP12]], i32* @.{{pl_cond[.].+[.|,]}} align 4
1752 // CHECK5-NEXT: [[TMP15:%.*]] = load double, double* [[TMP1]], align 8
1753 // CHECK5-NEXT: store double [[TMP15]], double* @{{pl_cond[.].+[.|,]}} align 8
1754 // CHECK5-NEXT: br label [[LP_COND_EXIT]]
1755 // CHECK5: lp_cond_exit:
1756 // CHECK5-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
1757 // CHECK5-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1758 // CHECK5: .omp.sections.case1:
1759 // CHECK5-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1760 // CHECK5: .omp.sections.exit:
1761 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1762 // CHECK5: omp.inner.for.inc:
1763 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1764 // CHECK5-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP16]], 1
1765 // CHECK5-NEXT: store i32 [[INC2]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1766 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1767 // CHECK5: omp.inner.for.end:
1768 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1769 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1770 // CHECK5-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1771 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP3]])
1772 // CHECK5-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1773 // CHECK5: .omp.lastprivate.then:
1774 // CHECK5-NEXT: [[TMP19:%.*]] = load double, double* @{{pl_cond[.].+[.|,]}} align 8
1775 // CHECK5-NEXT: store double [[TMP19]], double* [[TMP1]], align 8
1776 // CHECK5-NEXT: [[TMP20:%.*]] = load double, double* [[TMP1]], align 8
1777 // CHECK5-NEXT: store double [[TMP20]], double* @_ZN1A1xE, align 8
1778 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1779 // CHECK5: .omp.lastprivate.done:
1780 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]])
1781 // CHECK5-NEXT: ret void
1782 //
1783 //
1784 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1785 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] {
1786 // CHECK5-NEXT: entry:
1787 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1788 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1789 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1790 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1791 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1792 // CHECK5-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
1793 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1794 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
1795 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1796 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1797 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1798 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
1799 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1800 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
1801 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3)
1802 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]])
1803 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1804 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
1805 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1806 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1807 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1808 // CHECK5: arraydestroy.body:
1809 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1810 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1811 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1812 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1813 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1814 // CHECK5: arraydestroy.done1:
1815 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1816 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
1817 // CHECK5-NEXT: ret i32 [[TMP2]]
1818 //
1819 //
1820 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1821 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1822 // CHECK5-NEXT: entry:
1823 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1824 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1825 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1826 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1827 // CHECK5-NEXT: store float 0.000000e+00, float* [[F]], align 4
1828 // CHECK5-NEXT: ret void
1829 //
1830 //
1831 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1832 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1833 // CHECK5-NEXT: entry:
1834 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1835 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1836 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1837 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1838 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1839 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1840 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1841 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4
1842 // CHECK5-NEXT: ret void
1843 //
1844 //
1845 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1846 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1847 // CHECK5-NEXT: entry:
1848 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1849 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1850 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1851 // CHECK5-NEXT: ret void
1852 //
1853 //
1854 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1855 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1856 // CHECK5-NEXT: entry:
1857 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1858 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1859 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1860 // CHECK5-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1861 // CHECK5-NEXT: ret void
1862 //
1863 //
1864 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1865 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1866 // CHECK5-NEXT: entry:
1867 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1868 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1869 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1870 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1871 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1872 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1873 // CHECK5-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
1874 // CHECK5-NEXT: ret void
1875 //
1876 //
1877 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
1878 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1879 // CHECK5-NEXT: entry:
1880 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1881 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1882 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1883 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1884 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1885 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1886 // CHECK5-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
1887 // CHECK5-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
1888 // CHECK5-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
1889 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
1890 // CHECK5-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
1891 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1892 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
1893 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
1894 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1895 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1896 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1897 // CHECK5-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1898 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1899 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1900 // CHECK5-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1901 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1902 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1903 // CHECK5-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1904 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1905 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1906 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1907 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
1908 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1909 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
1910 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1911 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1912 // CHECK5: arrayctor.loop:
1913 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1914 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1915 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1916 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1917 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1918 // CHECK5: arrayctor.cont:
1919 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1920 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1921 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1922 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
1923 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1924 // CHECK5-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 1
1925 // CHECK5-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 1
1926 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
1927 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
1928 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1929 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1930 // CHECK5: omp.inner.for.cond:
1931 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1932 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
1933 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1934 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1935 // CHECK5: omp.inner.for.body:
1936 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1937 // CHECK5-NEXT: switch i32 [[TMP12]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
1938 // CHECK5-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
1939 // CHECK5-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE5:%.*]]
1940 // CHECK5-NEXT: ]
1941 // CHECK5: .omp.sections.case:
1942 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
1943 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
1944 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
1945 // CHECK5-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1946 // CHECK5: .omp.sections.case5:
1947 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0
1948 // CHECK5-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1949 // CHECK5-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
1950 // CHECK5: .omp.sections.exit:
1951 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1952 // CHECK5: omp.inner.for.inc:
1953 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
1954 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1
1955 // CHECK5-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
1956 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1957 // CHECK5: omp.inner.for.end:
1958 // CHECK5-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1959 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1960 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
1961 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
1962 // CHECK5-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1963 // CHECK5-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1964 // CHECK5: .omp.lastprivate.then:
1965 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1966 // CHECK5-NEXT: store i32 [[TMP19]], i32* [[TMP0]], align 4
1967 // CHECK5-NEXT: [[TMP20:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1968 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
1969 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 8, i1 false)
1970 // CHECK5-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1971 // CHECK5-NEXT: [[TMP22:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR3]] to %struct.S.0*
1972 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2
1973 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN7]], [[TMP23]]
1974 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1975 // CHECK5: omp.arraycpy.body:
1976 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP22]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1977 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1978 // CHECK5-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1979 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1980 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1981 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP23]]
1982 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
1983 // CHECK5: omp.arraycpy.done9:
1984 // CHECK5-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
1985 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1986 // CHECK5: .omp.lastprivate.done:
1987 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
1988 // CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
1989 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
1990 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1991 // CHECK5: arraydestroy.body:
1992 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1993 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1994 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1995 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1996 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1997 // CHECK5: arraydestroy.done12:
1998 // CHECK5-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1999 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2000 // CHECK5-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP26]])
2001 // CHECK5-NEXT: ret void
2002 //
2003 //
2004 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2005 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2006 // CHECK5-NEXT: entry:
2007 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2008 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2009 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2010 // CHECK5-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
2011 // CHECK5-NEXT: ret void
2012 //
2013 //
2014 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2015 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2016 // CHECK5-NEXT: entry:
2017 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2018 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2019 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2020 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2021 // CHECK5-NEXT: store i32 0, i32* [[F]], align 4
2022 // CHECK5-NEXT: ret void
2023 //
2024 //
2025 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2026 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2027 // CHECK5-NEXT: entry:
2028 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2029 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2030 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2031 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2032 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2033 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2034 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2035 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2036 // CHECK5-NEXT: ret void
2037 //
2038 //
2039 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2040 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2041 // CHECK5-NEXT: entry:
2042 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2043 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2044 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2045 // CHECK5-NEXT: ret void
2046 //
2047 //
2048 // CHECK6-LABEL: define {{[^@]+}}@main
2049 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
2050 // CHECK6-NEXT: entry:
2051 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2052 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2053 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2054 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2055 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2056 // CHECK6-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
2057 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
2058 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2059 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4
2060 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2061 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
2062 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
2063 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2064 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
2065 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2066 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
2067 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
2068 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
2069 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2070 // CHECK6-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2071 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
2072 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2073 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2074 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2075 // CHECK6: arraydestroy.body:
2076 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2077 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2078 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2079 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2080 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
2081 // CHECK6: arraydestroy.done1:
2082 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
2083 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
2084 // CHECK6-NEXT: ret i32 [[TMP2]]
2085 //
2086 //
2087 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2088 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
2089 // CHECK6-NEXT: entry:
2090 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2091 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2092 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2093 // CHECK6-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2094 // CHECK6-NEXT: ret void
2095 //
2096 //
2097 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2098 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2099 // CHECK6-NEXT: entry:
2100 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2101 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2102 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2103 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2104 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2105 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2106 // CHECK6-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2107 // CHECK6-NEXT: ret void
2108 //
2109 //
2110 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
2111 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2112 // CHECK6-NEXT: entry:
2113 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2114 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2115 // CHECK6-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2116 // CHECK6-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2117 // CHECK6-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2118 // CHECK6-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2119 // CHECK6-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
2120 // CHECK6-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
2121 // CHECK6-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
2122 // CHECK6-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
2123 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
2124 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
2125 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2126 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
2127 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
2128 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2129 // CHECK6-NEXT: [[SIVAR5:%.*]] = alloca i32, align 4
2130 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2131 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2132 // CHECK6-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2133 // CHECK6-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2134 // CHECK6-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2135 // CHECK6-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2136 // CHECK6-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
2137 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2138 // CHECK6-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2139 // CHECK6-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2140 // CHECK6-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2141 // CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
2142 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2143 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2144 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
2145 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2146 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
2147 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2148 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2149 // CHECK6: arrayctor.loop:
2150 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2151 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2152 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
2153 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2154 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2155 // CHECK6: arrayctor.cont:
2156 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
2157 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2158 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2159 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
2160 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2161 // CHECK6-NEXT: [[TMP8:%.*]] = icmp slt i32 [[TMP7]], 0
2162 // CHECK6-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP7]], i32 0
2163 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
2164 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2165 // CHECK6-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2166 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2167 // CHECK6: omp.inner.for.cond:
2168 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2169 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2170 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2171 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2172 // CHECK6: omp.inner.for.body:
2173 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2174 // CHECK6-NEXT: switch i32 [[TMP13]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
2175 // CHECK6-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
2176 // CHECK6-NEXT: ]
2177 // CHECK6: .omp.sections.case:
2178 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR1]], align 4
2179 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
2180 // CHECK6-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
2181 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 0
2182 // CHECK6-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
2183 // CHECK6-NEXT: store i32 31, i32* [[SIVAR5]], align 4
2184 // CHECK6-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2185 // CHECK6: .omp.sections.exit:
2186 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2187 // CHECK6: omp.inner.for.inc:
2188 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2189 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
2190 // CHECK6-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2191 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
2192 // CHECK6: omp.inner.for.end:
2193 // CHECK6-NEXT: [[TMP16:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2194 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
2195 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP17]])
2196 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2197 // CHECK6-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
2198 // CHECK6-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2199 // CHECK6: .omp.lastprivate.then:
2200 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
2201 // CHECK6-NEXT: store i32 [[TMP20]], i32* [[TMP0]], align 4
2202 // CHECK6-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2203 // CHECK6-NEXT: [[TMP22:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
2204 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP21]], i8* align 4 [[TMP22]], i64 8, i1 false)
2205 // CHECK6-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2206 // CHECK6-NEXT: [[TMP23:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
2207 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
2208 // CHECK6-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN7]], [[TMP24]]
2209 // CHECK6-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2210 // CHECK6: omp.arraycpy.body:
2211 // CHECK6-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP23]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2212 // CHECK6-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2213 // CHECK6-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
2214 // CHECK6-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2215 // CHECK6-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2216 // CHECK6-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
2217 // CHECK6-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
2218 // CHECK6: omp.arraycpy.done9:
2219 // CHECK6-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
2220 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[SIVAR5]], align 4
2221 // CHECK6-NEXT: store i32 [[TMP25]], i32* [[TMP4]], align 4
2222 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2223 // CHECK6: .omp.lastprivate.done:
2224 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
2225 // CHECK6-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
2226 // CHECK6-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
2227 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2228 // CHECK6: arraydestroy.body:
2229 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2230 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2231 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2232 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2233 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2234 // CHECK6: arraydestroy.done12:
2235 // CHECK6-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2236 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
2237 // CHECK6-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]])
2238 // CHECK6-NEXT: ret void
2239 //
2240 //
2241 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2242 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2243 // CHECK6-NEXT: entry:
2244 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2245 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2246 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2247 // CHECK6-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
2248 // CHECK6-NEXT: ret void
2249 //
2250 //
2251 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
2252 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2253 // CHECK6-NEXT: entry:
2254 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2255 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2256 // CHECK6-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
2257 // CHECK6-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
2258 // CHECK6-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
2259 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
2260 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
2261 // CHECK6-NEXT: [[X:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 8
2262 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2263 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2264 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2265 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2266 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
2267 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2268 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[X]], i32 0, i32 1
2269 // CHECK6-NEXT: store i8 0, i8* [[TMP0]], align 8
2270 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[X]], i32 0, i32 0
2271 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2272 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2273 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
2274 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2275 // CHECK6-NEXT: [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
2276 // CHECK6-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], i32 [[TMP4]], i32 1
2277 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
2278 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2279 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2280 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2281 // CHECK6: omp.inner.for.cond:
2282 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2283 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2284 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2285 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2286 // CHECK6: omp.inner.for.body:
2287 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2288 // CHECK6-NEXT: switch i32 [[TMP10]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
2289 // CHECK6-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
2290 // CHECK6-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE1:%.*]]
2291 // CHECK6-NEXT: ]
2292 // CHECK6: .omp.sections.case:
2293 // CHECK6-NEXT: [[TMP11:%.*]] = load double, double* [[TMP1]], align 8
2294 // CHECK6-NEXT: [[INC:%.*]] = fadd double [[TMP11]], 1.000000e+00
2295 // CHECK6-NEXT: store double [[INC]], double* [[TMP1]], align 8
2296 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2297 // CHECK6-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
2298 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* @.{{pl_cond[.].+[.|,]}} align 4
2299 // CHECK6-NEXT: [[TMP14:%.*]] = icmp sle i32 [[TMP13]], [[TMP12]]
2300 // CHECK6-NEXT: br i1 [[TMP14]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]
2301 // CHECK6: lp_cond_then:
2302 // CHECK6-NEXT: store i32 [[TMP12]], i32* @.{{pl_cond[.].+[.|,]}} align 4
2303 // CHECK6-NEXT: [[TMP15:%.*]] = load double, double* [[TMP1]], align 8
2304 // CHECK6-NEXT: store double [[TMP15]], double* @{{pl_cond[.].+[.|,]}} align 8
2305 // CHECK6-NEXT: br label [[LP_COND_EXIT]]
2306 // CHECK6: lp_cond_exit:
2307 // CHECK6-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
2308 // CHECK6-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2309 // CHECK6: .omp.sections.case1:
2310 // CHECK6-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2311 // CHECK6: .omp.sections.exit:
2312 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2313 // CHECK6: omp.inner.for.inc:
2314 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2315 // CHECK6-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP16]], 1
2316 // CHECK6-NEXT: store i32 [[INC2]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2317 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
2318 // CHECK6: omp.inner.for.end:
2319 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2320 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2321 // CHECK6-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2322 // CHECK6-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP3]])
2323 // CHECK6-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2324 // CHECK6: .omp.lastprivate.then:
2325 // CHECK6-NEXT: [[TMP19:%.*]] = load double, double* @{{pl_cond[.].+[.|,]}} align 8
2326 // CHECK6-NEXT: store double [[TMP19]], double* [[TMP1]], align 8
2327 // CHECK6-NEXT: [[TMP20:%.*]] = load double, double* [[TMP1]], align 8
2328 // CHECK6-NEXT: store double [[TMP20]], double* @_ZN1A1xE, align 8
2329 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2330 // CHECK6: .omp.lastprivate.done:
2331 // CHECK6-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]])
2332 // CHECK6-NEXT: ret void
2333 //
2334 //
2335 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2336 // CHECK6-SAME: () #[[ATTR7:[0-9]+]] {
2337 // CHECK6-NEXT: entry:
2338 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2339 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2340 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2341 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2342 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2343 // CHECK6-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
2344 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2345 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4
2346 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2347 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2348 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
2349 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2350 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
2351 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2352 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]], i32 3)
2353 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]])
2354 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
2355 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
2356 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2357 // CHECK6-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2358 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2359 // CHECK6: arraydestroy.body:
2360 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2361 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2362 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2363 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2364 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
2365 // CHECK6: arraydestroy.done1:
2366 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
2367 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
2368 // CHECK6-NEXT: ret i32 [[TMP2]]
2369 //
2370 //
2371 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2372 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2373 // CHECK6-NEXT: entry:
2374 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2375 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2376 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2377 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2378 // CHECK6-NEXT: store float 0.000000e+00, float* [[F]], align 4
2379 // CHECK6-NEXT: ret void
2380 //
2381 //
2382 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2383 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2384 // CHECK6-NEXT: entry:
2385 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2386 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2387 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2388 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2389 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2390 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2391 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2392 // CHECK6-NEXT: store float [[TMP0]], float* [[F]], align 4
2393 // CHECK6-NEXT: ret void
2394 //
2395 //
2396 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2397 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2398 // CHECK6-NEXT: entry:
2399 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2400 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2401 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2402 // CHECK6-NEXT: ret void
2403 //
2404 //
2405 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2406 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2407 // CHECK6-NEXT: entry:
2408 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2409 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2410 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2411 // CHECK6-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2412 // CHECK6-NEXT: ret void
2413 //
2414 //
2415 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2416 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2417 // CHECK6-NEXT: entry:
2418 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2419 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2420 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2421 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2422 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2423 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2424 // CHECK6-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2425 // CHECK6-NEXT: ret void
2426 //
2427 //
2428 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
2429 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2430 // CHECK6-NEXT: entry:
2431 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2432 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2433 // CHECK6-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2434 // CHECK6-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2435 // CHECK6-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2436 // CHECK6-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2437 // CHECK6-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
2438 // CHECK6-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
2439 // CHECK6-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
2440 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
2441 // CHECK6-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
2442 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2443 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
2444 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
2445 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2446 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2447 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2448 // CHECK6-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2449 // CHECK6-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2450 // CHECK6-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2451 // CHECK6-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2452 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2453 // CHECK6-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2454 // CHECK6-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2455 // CHECK6-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2456 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2457 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2458 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
2459 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2460 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
2461 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2462 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2463 // CHECK6: arrayctor.loop:
2464 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2465 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2466 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2467 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2468 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2469 // CHECK6: arrayctor.cont:
2470 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
2471 // CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2472 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
2473 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
2474 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2475 // CHECK6-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 1
2476 // CHECK6-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP6]], i32 1
2477 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
2478 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2479 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2480 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2481 // CHECK6: omp.inner.for.cond:
2482 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2483 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2484 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2485 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2486 // CHECK6: omp.inner.for.body:
2487 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2488 // CHECK6-NEXT: switch i32 [[TMP12]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
2489 // CHECK6-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
2490 // CHECK6-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE5:%.*]]
2491 // CHECK6-NEXT: ]
2492 // CHECK6: .omp.sections.case:
2493 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
2494 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 0
2495 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
2496 // CHECK6-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2497 // CHECK6: .omp.sections.case5:
2498 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 0
2499 // CHECK6-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX6]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
2500 // CHECK6-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2501 // CHECK6: .omp.sections.exit:
2502 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2503 // CHECK6: omp.inner.for.inc:
2504 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2505 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1
2506 // CHECK6-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2507 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
2508 // CHECK6: omp.inner.for.end:
2509 // CHECK6-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2510 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
2511 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
2512 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2513 // CHECK6-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2514 // CHECK6-NEXT: br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2515 // CHECK6: .omp.lastprivate.then:
2516 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
2517 // CHECK6-NEXT: store i32 [[TMP19]], i32* [[TMP0]], align 4
2518 // CHECK6-NEXT: [[TMP20:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2519 // CHECK6-NEXT: [[TMP21:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
2520 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 8, i1 false)
2521 // CHECK6-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2522 // CHECK6-NEXT: [[TMP22:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR3]] to %struct.S.0*
2523 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2
2524 // CHECK6-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN7]], [[TMP23]]
2525 // CHECK6-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2526 // CHECK6: omp.arraycpy.body:
2527 // CHECK6-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP22]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2528 // CHECK6-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN7]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2529 // CHECK6-NEXT: [[CALL8:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
2530 // CHECK6-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2531 // CHECK6-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2532 // CHECK6-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP23]]
2533 // CHECK6-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
2534 // CHECK6: omp.arraycpy.done9:
2535 // CHECK6-NEXT: [[CALL10:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]])
2536 // CHECK6-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2537 // CHECK6: .omp.lastprivate.done:
2538 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
2539 // CHECK6-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
2540 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
2541 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2542 // CHECK6: arraydestroy.body:
2543 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2544 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2545 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2546 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2547 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2548 // CHECK6: arraydestroy.done12:
2549 // CHECK6-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2550 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2551 // CHECK6-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP26]])
2552 // CHECK6-NEXT: ret void
2553 //
2554 //
2555 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2556 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2557 // CHECK6-NEXT: entry:
2558 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2559 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2560 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2561 // CHECK6-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
2562 // CHECK6-NEXT: ret void
2563 //
2564 //
2565 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2566 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2567 // CHECK6-NEXT: entry:
2568 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2569 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2570 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2571 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2572 // CHECK6-NEXT: store i32 0, i32* [[F]], align 4
2573 // CHECK6-NEXT: ret void
2574 //
2575 //
2576 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2577 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2578 // CHECK6-NEXT: entry:
2579 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2580 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2581 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2582 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2583 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2584 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2585 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2586 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2587 // CHECK6-NEXT: ret void
2588 //
2589 //
2590 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2591 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2592 // CHECK6-NEXT: entry:
2593 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2594 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2595 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2596 // CHECK6-NEXT: ret void
2597 //
2598 //
2599 // CHECK7-LABEL: define {{[^@]+}}@main
2600 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
2601 // CHECK7-NEXT: entry:
2602 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2603 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
2604 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
2605 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
2606 // CHECK7-NEXT: store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8
2607 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]])
2608 // CHECK7-NEXT: ret i32 0
2609 //
2610 //
2611 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
2612 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
2613 // CHECK7-NEXT: entry:
2614 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2615 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2616 // CHECK7-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
2617 // CHECK7-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
2618 // CHECK7-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
2619 // CHECK7-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
2620 // CHECK7-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
2621 // CHECK7-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
2622 // CHECK7-NEXT: [[G:%.*]] = alloca i32, align 4
2623 // CHECK7-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
2624 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
2625 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2626 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2627 // CHECK7-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
2628 // CHECK7-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
2629 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2630 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2631 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
2632 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2633 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2634 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2635 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
2636 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2637 // CHECK7-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
2638 // CHECK7-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 1
2639 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
2640 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2641 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2642 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2643 // CHECK7: omp.inner.for.cond:
2644 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2645 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2646 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2647 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2648 // CHECK7: omp.inner.for.body:
2649 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2650 // CHECK7-NEXT: switch i32 [[TMP9]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
2651 // CHECK7-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
2652 // CHECK7-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE2:%.*]]
2653 // CHECK7-NEXT: ]
2654 // CHECK7: .omp.sections.case:
2655 // CHECK7-NEXT: store i32 1, i32* [[G]], align 4
2656 // CHECK7-NEXT: store i32 13, i32* [[SIVAR1]], align 4
2657 // CHECK7-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2658 // CHECK7: .omp.sections.case2:
2659 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
2660 // CHECK7-NEXT: store i32* [[G]], i32** [[TMP10]], align 8
2661 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
2662 // CHECK7-NEXT: store i32* [[SIVAR1]], i32** [[TMP11]], align 8
2663 // CHECK7-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(16) [[REF_TMP]])
2664 // CHECK7-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2665 // CHECK7: .omp.sections.exit:
2666 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2667 // CHECK7: omp.inner.for.inc:
2668 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2669 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1
2670 // CHECK7-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2671 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
2672 // CHECK7: omp.inner.for.end:
2673 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2674 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2675 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2676 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2677 // CHECK7: .omp.lastprivate.then:
2678 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[G]], align 4
2679 // CHECK7-NEXT: store volatile i32 [[TMP15]], i32* @g, align 4
2680 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[SIVAR1]], align 4
2681 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[TMP0]], align 4
2682 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2683 // CHECK7: .omp.lastprivate.done:
2684 // CHECK7-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
2685 // CHECK7-NEXT: ret void
2686 //
2687 //
2688 // CHECK8-LABEL: define {{[^@]+}}@main
2689 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
2690 // CHECK8-NEXT: entry:
2691 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2692 // CHECK8-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8
2693 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
2694 // CHECK8-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0
2695 // CHECK8-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
2696 // CHECK8-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1
2697 // CHECK8-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
2698 // CHECK8-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2
2699 // CHECK8-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
2700 // CHECK8-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3
2701 // CHECK8-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
2702 // CHECK8-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4
2703 // CHECK8-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
2704 // CHECK8-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5
2705 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
2706 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8
2707 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()*
2708 // CHECK8-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic*
2709 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
2710 // CHECK8-NEXT: [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
2711 // CHECK8-NEXT: [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8
2712 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)*
2713 // CHECK8-NEXT: call void [[TMP5]](i8* [[TMP3]])
2714 // CHECK8-NEXT: ret i32 0
2715 //
2716 //
2717 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke
2718 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1:[0-9]+]] {
2719 // CHECK8-NEXT: entry:
2720 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
2721 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8
2722 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2723 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*
2724 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8
2725 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @_ZZ4mainE5sivar)
2726 // CHECK8-NEXT: ret void
2727 //
2728 //
2729 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
2730 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
2731 // CHECK8-NEXT: entry:
2732 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2733 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2734 // CHECK8-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
2735 // CHECK8-NEXT: [[DOTOMP_SECTIONS_LB_:%.*]] = alloca i32, align 4
2736 // CHECK8-NEXT: [[DOTOMP_SECTIONS_UB_:%.*]] = alloca i32, align 4
2737 // CHECK8-NEXT: [[DOTOMP_SECTIONS_ST_:%.*]] = alloca i32, align 4
2738 // CHECK8-NEXT: [[DOTOMP_SECTIONS_IL_:%.*]] = alloca i32, align 4
2739 // CHECK8-NEXT: [[DOTOMP_SECTIONS_IV_:%.*]] = alloca i32, align 4
2740 // CHECK8-NEXT: [[G:%.*]] = alloca i32, align 4
2741 // CHECK8-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
2742 // CHECK8-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, align 8
2743 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2744 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2745 // CHECK8-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
2746 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
2747 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2748 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2749 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_SECTIONS_ST_]], align 4
2750 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2751 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2752 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2753 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_SECTIONS_IL_]], i32* [[DOTOMP_SECTIONS_LB_]], i32* [[DOTOMP_SECTIONS_UB_]], i32* [[DOTOMP_SECTIONS_ST_]], i32 1, i32 1)
2754 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2755 // CHECK8-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
2756 // CHECK8-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 1
2757 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_SECTIONS_UB_]], align 4
2758 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_LB_]], align 4
2759 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2760 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2761 // CHECK8: omp.inner.for.cond:
2762 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2763 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_UB_]], align 4
2764 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2765 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2766 // CHECK8: omp.inner.for.body:
2767 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2768 // CHECK8-NEXT: switch i32 [[TMP9]], label [[DOTOMP_SECTIONS_EXIT:%.*]] [
2769 // CHECK8-NEXT: i32 0, label [[DOTOMP_SECTIONS_CASE:%.*]]
2770 // CHECK8-NEXT: i32 1, label [[DOTOMP_SECTIONS_CASE2:%.*]]
2771 // CHECK8-NEXT: ]
2772 // CHECK8: .omp.sections.case:
2773 // CHECK8-NEXT: store i32 1, i32* [[G]], align 4
2774 // CHECK8-NEXT: store i32 17, i32* [[SIVAR1]], align 4
2775 // CHECK8-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2776 // CHECK8: .omp.sections.case2:
2777 // CHECK8-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 0
2778 // CHECK8-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
2779 // CHECK8-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 1
2780 // CHECK8-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
2781 // CHECK8-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 2
2782 // CHECK8-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
2783 // CHECK8-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 3
2784 // CHECK8-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
2785 // CHECK8-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 4
2786 // CHECK8-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
2787 // CHECK8-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 5
2788 // CHECK8-NEXT: [[TMP10:%.*]] = load volatile i32, i32* [[G]], align 4
2789 // CHECK8-NEXT: store volatile i32 [[TMP10]], i32* [[BLOCK_CAPTURED]], align 8
2790 // CHECK8-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 6
2791 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[SIVAR1]], align 4
2792 // CHECK8-NEXT: store i32 [[TMP11]], i32* [[BLOCK_CAPTURED3]], align 4
2793 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]] to void ()*
2794 // CHECK8-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP12]] to %struct.__block_literal_generic*
2795 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
2796 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
2797 // CHECK8-NEXT: [[TMP15:%.*]] = load i8*, i8** [[TMP13]], align 8
2798 // CHECK8-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to void (i8*)*
2799 // CHECK8-NEXT: call void [[TMP16]](i8* [[TMP14]])
2800 // CHECK8-NEXT: br label [[DOTOMP_SECTIONS_EXIT]]
2801 // CHECK8: .omp.sections.exit:
2802 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2803 // CHECK8: omp.inner.for.inc:
2804 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IV_]], align 4
2805 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP17]], 1
2806 // CHECK8-NEXT: store i32 [[INC]], i32* [[DOTOMP_SECTIONS_IV_]], align 4
2807 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
2808 // CHECK8: omp.inner.for.end:
2809 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2810 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_SECTIONS_IL_]], align 4
2811 // CHECK8-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
2812 // CHECK8-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2813 // CHECK8: .omp.lastprivate.then:
2814 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[G]], align 4
2815 // CHECK8-NEXT: store volatile i32 [[TMP20]], i32* @g, align 4
2816 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
2817 // CHECK8-NEXT: store i32 [[TMP21]], i32* [[TMP0]], align 4
2818 // CHECK8-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2819 // CHECK8: .omp.lastprivate.done:
2820 // CHECK8-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
2821 // CHECK8-NEXT: ret void
2822 //
2823 //
2824 // CHECK8-LABEL: define {{[^@]+}}@g_block_invoke
2825 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
2826 // CHECK8-NEXT: entry:
2827 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
2828 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>*, align 8
2829 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2830 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>*
2831 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>** [[BLOCK_ADDR]], align 8
2832 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 5
2833 // CHECK8-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8
2834 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, i32 }>* [[BLOCK]], i32 0, i32 6
2835 // CHECK8-NEXT: store i32 29, i32* [[BLOCK_CAPTURE_ADDR1]], align 4
2836 // CHECK8-NEXT: ret void
2837 //
2838 //