1; RUN: opt < %s -sroa -S | FileCheck %s 2 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 4 5define i8 @test1() { 6; We fully promote these to the i24 load or store size, resulting in just masks 7; and other operations that instcombine will fold, but no alloca. Note this is 8; the same as test12 in basictest.ll, but here we assert big-endian byte 9; ordering. 10; 11; CHECK-LABEL: @test1( 12 13entry: 14 %a = alloca [3 x i8] 15 %b = alloca [3 x i8] 16; CHECK-NOT: alloca 17 18 %a0ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 0 19 store i8 0, i8* %a0ptr 20 %a1ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 1 21 store i8 0, i8* %a1ptr 22 %a2ptr = getelementptr [3 x i8], [3 x i8]* %a, i64 0, i32 2 23 store i8 0, i8* %a2ptr 24 %aiptr = bitcast [3 x i8]* %a to i24* 25 %ai = load i24, i24* %aiptr 26; CHECK-NOT: store 27; CHECK-NOT: load 28; CHECK: %[[ext2:.*]] = zext i8 0 to i24 29; CHECK-NEXT: %[[mask2:.*]] = and i24 undef, -256 30; CHECK-NEXT: %[[insert2:.*]] = or i24 %[[mask2]], %[[ext2]] 31; CHECK-NEXT: %[[ext1:.*]] = zext i8 0 to i24 32; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8 33; CHECK-NEXT: %[[mask1:.*]] = and i24 %[[insert2]], -65281 34; CHECK-NEXT: %[[insert1:.*]] = or i24 %[[mask1]], %[[shift1]] 35; CHECK-NEXT: %[[ext0:.*]] = zext i8 0 to i24 36; CHECK-NEXT: %[[shift0:.*]] = shl i24 %[[ext0]], 16 37; CHECK-NEXT: %[[mask0:.*]] = and i24 %[[insert1]], 65535 38; CHECK-NEXT: %[[insert0:.*]] = or i24 %[[mask0]], %[[shift0]] 39 40 %biptr = bitcast [3 x i8]* %b to i24* 41 store i24 %ai, i24* %biptr 42 %b0ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 0 43 %b0 = load i8, i8* %b0ptr 44 %b1ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 1 45 %b1 = load i8, i8* %b1ptr 46 %b2ptr = getelementptr [3 x i8], [3 x i8]* %b, i64 0, i32 2 47 %b2 = load i8, i8* %b2ptr 48; CHECK-NOT: store 49; CHECK-NOT: load 50; CHECK: %[[shift0:.*]] = lshr i24 %[[insert0]], 16 51; CHECK-NEXT: %[[trunc0:.*]] = trunc i24 %[[shift0]] to i8 52; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[insert0]], 8 53; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8 54; CHECK-NEXT: %[[trunc2:.*]] = trunc i24 %[[insert0]] to i8 55 56 %bsum0 = add i8 %b0, %b1 57 %bsum1 = add i8 %bsum0, %b2 58 ret i8 %bsum1 59; CHECK: %[[sum0:.*]] = add i8 %[[trunc0]], %[[trunc1]] 60; CHECK-NEXT: %[[sum1:.*]] = add i8 %[[sum0]], %[[trunc2]] 61; CHECK-NEXT: ret i8 %[[sum1]] 62} 63 64define i64 @test2() { 65; Test for various mixed sizes of integer loads and stores all getting 66; promoted. 67; 68; CHECK-LABEL: @test2( 69 70entry: 71 %a = alloca [7 x i8] 72; CHECK-NOT: alloca 73 74 %a0ptr = getelementptr [7 x i8], [7 x i8]* %a, i64 0, i32 0 75 %a1ptr = getelementptr [7 x i8], [7 x i8]* %a, i64 0, i32 1 76 %a2ptr = getelementptr [7 x i8], [7 x i8]* %a, i64 0, i32 2 77 %a3ptr = getelementptr [7 x i8], [7 x i8]* %a, i64 0, i32 3 78 79; CHECK-NOT: store 80; CHECK-NOT: load 81 82 %a0i16ptr = bitcast i8* %a0ptr to i16* 83 store i16 1, i16* %a0i16ptr 84 85 store i8 1, i8* %a2ptr 86 87 %a3i24ptr = bitcast i8* %a3ptr to i24* 88 store i24 1, i24* %a3i24ptr 89 90 %a2i40ptr = bitcast i8* %a2ptr to i40* 91 store i40 1, i40* %a2i40ptr 92 93; the alloca is splitted into multiple slices 94; Here, i8 1 is for %a[6] 95; CHECK: %[[ext1:.*]] = zext i8 1 to i40 96; CHECK-NEXT: %[[mask1:.*]] = and i40 undef, -256 97; CHECK-NEXT: %[[insert1:.*]] = or i40 %[[mask1]], %[[ext1]] 98 99; Here, i24 0 is for %a[3] to %a[5] 100; CHECK-NEXT: %[[ext2:.*]] = zext i24 0 to i40 101; CHECK-NEXT: %[[shift2:.*]] = shl i40 %[[ext2]], 8 102; CHECK-NEXT: %[[mask2:.*]] = and i40 %[[insert1]], -4294967041 103; CHECK-NEXT: %[[insert2:.*]] = or i40 %[[mask2]], %[[shift2]] 104 105; Here, i8 0 is for %a[2] 106; CHECK-NEXT: %[[ext3:.*]] = zext i8 0 to i40 107; CHECK-NEXT: %[[shift3:.*]] = shl i40 %[[ext3]], 32 108; CHECK-NEXT: %[[mask3:.*]] = and i40 %[[insert2]], 4294967295 109; CHECK-NEXT: %[[insert3:.*]] = or i40 %[[mask3]], %[[shift3]] 110 111; CHECK-NEXT: %[[ext4:.*]] = zext i40 %[[insert3]] to i56 112; CHECK-NEXT: %[[mask4:.*]] = and i56 undef, -1099511627776 113; CHECK-NEXT: %[[insert4:.*]] = or i56 %[[mask4]], %[[ext4]] 114 115; CHECK-NOT: store 116; CHECK-NOT: load 117 118 %aiptr = bitcast [7 x i8]* %a to i56* 119 %ai = load i56, i56* %aiptr 120 %ret = zext i56 %ai to i64 121 ret i64 %ret 122; Here, i16 1 is for %a[0] to %a[1] 123; CHECK-NEXT: %[[ext5:.*]] = zext i16 1 to i56 124; CHECK-NEXT: %[[shift5:.*]] = shl i56 %[[ext5]], 40 125; CHECK-NEXT: %[[mask5:.*]] = and i56 %[[insert4]], 1099511627775 126; CHECK-NEXT: %[[insert5:.*]] = or i56 %[[mask5]], %[[shift5]] 127; CHECK-NEXT: %[[ret:.*]] = zext i56 %[[insert5]] to i64 128; CHECK-NEXT: ret i64 %[[ret]] 129} 130 131define i64 @PR14132(i1 %flag) { 132; CHECK-LABEL: @PR14132( 133; Here we form a PHI-node by promoting the pointer alloca first, and then in 134; order to promote the other two allocas, we speculate the load of the 135; now-phi-node-pointer. In doing so we end up loading a 64-bit value from an i8 136; alloca. While this is a bit dubious, we were asserting on trying to 137; rewrite it. The trick is that the code using the value may carefully take 138; steps to only use the not-undef bits, and so we need to at least loosely 139; support this. This test is particularly interesting because how we handle 140; a load of an i64 from an i8 alloca is dependent on endianness. 141entry: 142 %a = alloca i64, align 8 143 %b = alloca i8, align 8 144 %ptr = alloca i64*, align 8 145; CHECK-NOT: alloca 146 147 %ptr.cast = bitcast i64** %ptr to i8** 148 store i64 0, i64* %a 149 store i8 1, i8* %b 150 store i64* %a, i64** %ptr 151 br i1 %flag, label %if.then, label %if.end 152 153if.then: 154 store i8* %b, i8** %ptr.cast 155 br label %if.end 156; CHECK-NOT: store 157; CHECK: %[[ext:.*]] = zext i8 1 to i64 158; CHECK: %[[shift:.*]] = shl i64 %[[ext]], 56 159 160if.end: 161 %tmp = load i64*, i64** %ptr 162 %result = load i64, i64* %tmp 163; CHECK-NOT: load 164; CHECK: %[[result:.*]] = phi i64 [ %[[shift]], %if.then ], [ 0, %entry ] 165 166 ret i64 %result 167; CHECK-NEXT: ret i64 %[[result]] 168} 169 170declare void @f(i64 %x, i32 %y) 171 172define void @test3() { 173; CHECK-LABEL: @test3( 174; 175; This is a test that specifically exercises the big-endian lowering because it 176; ends up splitting a 64-bit integer into two smaller integers and has a number 177; of tricky aspects (the i24 type) that make that hard. Historically, SROA 178; would miscompile this by either dropping a most significant byte or least 179; significant byte due to shrinking the [4,8) slice to an i24, or by failing to 180; move the bytes around correctly. 181; 182; The magical number 34494054408 is used because it has bits set in various 183; bytes so that it is clear if those bytes fail to be propagated. 184; 185; If you're debugging this, rather than using the direct magical numbers, run 186; the IR through '-sroa -instcombine'. With '-instcombine' these will be 187; constant folded, and if the i64 doesn't round-trip correctly, you've found 188; a bug! 189; 190entry: 191 %a = alloca { i32, i24 }, align 4 192; CHECK-NOT: alloca 193 194 %tmp0 = bitcast { i32, i24 }* %a to i64* 195 store i64 34494054408, i64* %tmp0 196 %tmp1 = load i64, i64* %tmp0, align 4 197 %tmp2 = bitcast { i32, i24 }* %a to i32* 198 %tmp3 = load i32, i32* %tmp2, align 4 199; CHECK: %[[HI_EXT:.*]] = zext i32 134316040 to i64 200; CHECK: %[[HI_INPUT:.*]] = and i64 undef, -4294967296 201; CHECK: %[[HI_MERGE:.*]] = or i64 %[[HI_INPUT]], %[[HI_EXT]] 202; CHECK: %[[LO_EXT:.*]] = zext i32 8 to i64 203; CHECK: %[[LO_SHL:.*]] = shl i64 %[[LO_EXT]], 32 204; CHECK: %[[LO_INPUT:.*]] = and i64 %[[HI_MERGE]], 4294967295 205; CHECK: %[[LO_MERGE:.*]] = or i64 %[[LO_INPUT]], %[[LO_SHL]] 206 207 call void @f(i64 %tmp1, i32 %tmp3) 208; CHECK: call void @f(i64 %[[LO_MERGE]], i32 8) 209 ret void 210; CHECK: ret void 211} 212 213define void @test4() { 214; CHECK-LABEL: @test4 215; 216; Much like @test3, this is specifically testing big-endian management of data. 217; Also similarly, it uses constants with particular bits set to help track 218; whether values are corrupted, and can be easily evaluated by running through 219; -instcombine to see that the i64 round-trips. 220; 221entry: 222 %a = alloca { i32, i24 }, align 4 223 %a2 = alloca i64, align 4 224; CHECK-NOT: alloca 225 226 store i64 34494054408, i64* %a2 227 %tmp0 = bitcast { i32, i24 }* %a to i8* 228 %tmp1 = bitcast i64* %a2 to i8* 229 call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %tmp0, i8* align 4 %tmp1, i64 8, i1 false) 230; CHECK: %[[LO_SHR:.*]] = lshr i64 34494054408, 32 231; CHECK: %[[LO_START:.*]] = trunc i64 %[[LO_SHR]] to i32 232; CHECK: %[[HI_START:.*]] = trunc i64 34494054408 to i32 233 234 %tmp2 = bitcast { i32, i24 }* %a to i64* 235 %tmp3 = load i64, i64* %tmp2, align 4 236 %tmp4 = bitcast { i32, i24 }* %a to i32* 237 %tmp5 = load i32, i32* %tmp4, align 4 238; CHECK: %[[HI_EXT:.*]] = zext i32 %[[HI_START]] to i64 239; CHECK: %[[HI_INPUT:.*]] = and i64 undef, -4294967296 240; CHECK: %[[HI_MERGE:.*]] = or i64 %[[HI_INPUT]], %[[HI_EXT]] 241; CHECK: %[[LO_EXT:.*]] = zext i32 %[[LO_START]] to i64 242; CHECK: %[[LO_SHL:.*]] = shl i64 %[[LO_EXT]], 32 243; CHECK: %[[LO_INPUT:.*]] = and i64 %[[HI_MERGE]], 4294967295 244; CHECK: %[[LO_MERGE:.*]] = or i64 %[[LO_INPUT]], %[[LO_SHL]] 245 246 call void @f(i64 %tmp3, i32 %tmp5) 247; CHECK: call void @f(i64 %[[LO_MERGE]], i32 %[[LO_START]]) 248 ret void 249; CHECK: ret void 250} 251 252declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1) 253