1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s --check-prefix=CHECK-P8 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-P9 8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 10; RUN: FileCheck %s --check-prefix=CHECK-BE 11 12define i32 @test2elt(i64 %a.coerce) local_unnamed_addr #0 { 13; CHECK-P8-LABEL: test2elt: 14; CHECK-P8: # %bb.0: # %entry 15; CHECK-P8-NEXT: mtvsrd f0, r3 16; CHECK-P8-NEXT: xxswapd v2, vs0 17; CHECK-P8-NEXT: xscvspdpn f0, vs0 18; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3 19; CHECK-P8-NEXT: xscvspdpn f1, vs1 20; CHECK-P8-NEXT: xscvdpsxws f0, f0 21; CHECK-P8-NEXT: xscvdpsxws f1, f1 22; CHECK-P8-NEXT: mfvsrwz r4, f0 23; CHECK-P8-NEXT: mfvsrwz r3, f1 24; CHECK-P8-NEXT: mtvsrd f1, r4 25; CHECK-P8-NEXT: mtvsrd f0, r3 26; CHECK-P8-NEXT: xxswapd v3, vs1 27; CHECK-P8-NEXT: xxswapd v2, vs0 28; CHECK-P8-NEXT: vmrglh v2, v3, v2 29; CHECK-P8-NEXT: xxswapd vs0, v2 30; CHECK-P8-NEXT: mfvsrwz r3, f0 31; CHECK-P8-NEXT: blr 32; 33; CHECK-P9-LABEL: test2elt: 34; CHECK-P9: # %bb.0: # %entry 35; CHECK-P9-NEXT: mtvsrd f0, r3 36; CHECK-P9-NEXT: xxswapd v2, vs0 37; CHECK-P9-NEXT: xscvspdpn f0, vs0 38; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3 39; CHECK-P9-NEXT: xscvspdpn f1, vs1 40; CHECK-P9-NEXT: xscvdpsxws f1, f1 41; CHECK-P9-NEXT: xscvdpsxws f0, f0 42; CHECK-P9-NEXT: mfvsrwz r3, f1 43; CHECK-P9-NEXT: mtvsrd f1, r3 44; CHECK-P9-NEXT: mfvsrwz r3, f0 45; CHECK-P9-NEXT: mtvsrd f0, r3 46; CHECK-P9-NEXT: xxswapd v2, vs1 47; CHECK-P9-NEXT: xxswapd v3, vs0 48; CHECK-P9-NEXT: vmrglh v2, v3, v2 49; CHECK-P9-NEXT: li r3, 0 50; CHECK-P9-NEXT: vextuwrx r3, r3, v2 51; CHECK-P9-NEXT: blr 52; 53; CHECK-BE-LABEL: test2elt: 54; CHECK-BE: # %bb.0: # %entry 55; CHECK-BE-NEXT: mtvsrd f0, r3 56; CHECK-BE-NEXT: xscvspdpn f1, vs0 57; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 58; CHECK-BE-NEXT: xscvdpsxws f1, f1 59; CHECK-BE-NEXT: xscvspdpn f0, vs0 60; CHECK-BE-NEXT: xscvdpsxws f0, f0 61; CHECK-BE-NEXT: mfvsrwz r3, f1 62; CHECK-BE-NEXT: sldi r3, r3, 48 63; CHECK-BE-NEXT: mtvsrd v2, r3 64; CHECK-BE-NEXT: mfvsrwz r3, f0 65; CHECK-BE-NEXT: sldi r3, r3, 48 66; CHECK-BE-NEXT: mtvsrd v3, r3 67; CHECK-BE-NEXT: li r3, 0 68; CHECK-BE-NEXT: vmrghh v2, v2, v3 69; CHECK-BE-NEXT: vextuwlx r3, r3, v2 70; CHECK-BE-NEXT: blr 71entry: 72 %0 = bitcast i64 %a.coerce to <2 x float> 73 %1 = fptoui <2 x float> %0 to <2 x i16> 74 %2 = bitcast <2 x i16> %1 to i32 75 ret i32 %2 76} 77 78define i64 @test4elt(<4 x float> %a) local_unnamed_addr #1 { 79; CHECK-P8-LABEL: test4elt: 80; CHECK-P8: # %bb.0: # %entry 81; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3 82; CHECK-P8-NEXT: xscvspdpn f1, v2 83; CHECK-P8-NEXT: xxswapd vs2, v2 84; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1 85; CHECK-P8-NEXT: xscvspdpn f0, vs0 86; CHECK-P8-NEXT: xscvspdpn f2, vs2 87; CHECK-P8-NEXT: xscvspdpn f3, vs3 88; CHECK-P8-NEXT: xscvdpsxws f1, f1 89; CHECK-P8-NEXT: xscvdpsxws f0, f0 90; CHECK-P8-NEXT: xscvdpsxws f2, f2 91; CHECK-P8-NEXT: xscvdpsxws f3, f3 92; CHECK-P8-NEXT: mfvsrwz r3, f1 93; CHECK-P8-NEXT: mtvsrd f1, r3 94; CHECK-P8-NEXT: mfvsrwz r3, f0 95; CHECK-P8-NEXT: mfvsrwz r4, f2 96; CHECK-P8-NEXT: xxswapd v4, vs1 97; CHECK-P8-NEXT: mtvsrd f0, r3 98; CHECK-P8-NEXT: mfvsrwz r3, f3 99; CHECK-P8-NEXT: mtvsrd f2, r4 100; CHECK-P8-NEXT: xxswapd v2, vs0 101; CHECK-P8-NEXT: mtvsrd f3, r3 102; CHECK-P8-NEXT: xxswapd v3, vs2 103; CHECK-P8-NEXT: xxswapd v5, vs3 104; CHECK-P8-NEXT: vmrglh v2, v3, v2 105; CHECK-P8-NEXT: vmrglh v3, v4, v5 106; CHECK-P8-NEXT: vmrglw v2, v3, v2 107; CHECK-P8-NEXT: xxswapd vs0, v2 108; CHECK-P8-NEXT: mfvsrd r3, f0 109; CHECK-P8-NEXT: blr 110; 111; CHECK-P9-LABEL: test4elt: 112; CHECK-P9: # %bb.0: # %entry 113; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3 114; CHECK-P9-NEXT: xscvspdpn f0, vs0 115; CHECK-P9-NEXT: xscvdpsxws f0, f0 116; CHECK-P9-NEXT: mfvsrwz r3, f0 117; CHECK-P9-NEXT: mtvsrd f0, r3 118; CHECK-P9-NEXT: xxswapd v3, vs0 119; CHECK-P9-NEXT: xxswapd vs0, v2 120; CHECK-P9-NEXT: xscvspdpn f0, vs0 121; CHECK-P9-NEXT: xscvdpsxws f0, f0 122; CHECK-P9-NEXT: mfvsrwz r3, f0 123; CHECK-P9-NEXT: mtvsrd f0, r3 124; CHECK-P9-NEXT: xxswapd v4, vs0 125; CHECK-P9-NEXT: xscvspdpn f0, v2 126; CHECK-P9-NEXT: xscvdpsxws f0, f0 127; CHECK-P9-NEXT: mfvsrwz r3, f0 128; CHECK-P9-NEXT: mtvsrd f0, r3 129; CHECK-P9-NEXT: vmrglh v3, v4, v3 130; CHECK-P9-NEXT: xxswapd v4, vs0 131; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1 132; CHECK-P9-NEXT: xscvspdpn f0, vs0 133; CHECK-P9-NEXT: xscvdpsxws f0, f0 134; CHECK-P9-NEXT: mfvsrwz r3, f0 135; CHECK-P9-NEXT: mtvsrd f0, r3 136; CHECK-P9-NEXT: xxswapd v2, vs0 137; CHECK-P9-NEXT: vmrglh v2, v4, v2 138; CHECK-P9-NEXT: vmrglw v2, v2, v3 139; CHECK-P9-NEXT: mfvsrld r3, v2 140; CHECK-P9-NEXT: blr 141; 142; CHECK-BE-LABEL: test4elt: 143; CHECK-BE: # %bb.0: # %entry 144; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3 145; CHECK-BE-NEXT: xscvspdpn f0, vs0 146; CHECK-BE-NEXT: xscvdpsxws f0, f0 147; CHECK-BE-NEXT: mfvsrwz r3, f0 148; CHECK-BE-NEXT: xxswapd vs0, v2 149; CHECK-BE-NEXT: sldi r3, r3, 48 150; CHECK-BE-NEXT: xscvspdpn f0, vs0 151; CHECK-BE-NEXT: mtvsrd v3, r3 152; CHECK-BE-NEXT: xscvdpsxws f0, f0 153; CHECK-BE-NEXT: mfvsrwz r3, f0 154; CHECK-BE-NEXT: xscvspdpn f0, v2 155; CHECK-BE-NEXT: sldi r3, r3, 48 156; CHECK-BE-NEXT: xscvdpsxws f0, f0 157; CHECK-BE-NEXT: mtvsrd v4, r3 158; CHECK-BE-NEXT: vmrghh v3, v4, v3 159; CHECK-BE-NEXT: mfvsrwz r3, f0 160; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1 161; CHECK-BE-NEXT: sldi r3, r3, 48 162; CHECK-BE-NEXT: xscvspdpn f0, vs0 163; CHECK-BE-NEXT: mtvsrd v4, r3 164; CHECK-BE-NEXT: xscvdpsxws f0, f0 165; CHECK-BE-NEXT: mfvsrwz r3, f0 166; CHECK-BE-NEXT: sldi r3, r3, 48 167; CHECK-BE-NEXT: mtvsrd v2, r3 168; CHECK-BE-NEXT: vmrghh v2, v4, v2 169; CHECK-BE-NEXT: vmrghw v2, v2, v3 170; CHECK-BE-NEXT: mfvsrd r3, v2 171; CHECK-BE-NEXT: blr 172entry: 173 %0 = fptoui <4 x float> %a to <4 x i16> 174 %1 = bitcast <4 x i16> %0 to i64 175 ret i64 %1 176} 177 178define <8 x i16> @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 { 179; CHECK-P8-LABEL: test8elt: 180; CHECK-P8: # %bb.0: # %entry 181; CHECK-P8-NEXT: lvx v2, 0, r3 182; CHECK-P8-NEXT: li r4, 16 183; CHECK-P8-NEXT: lvx v5, r3, r4 184; CHECK-P8-NEXT: xxswapd vs1, v2 185; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3 186; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3 187; CHECK-P8-NEXT: xscvspdpn f4, v5 188; CHECK-P8-NEXT: xxswapd vs3, v5 189; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1 190; CHECK-P8-NEXT: xscvspdpn f1, vs1 191; CHECK-P8-NEXT: xscvspdpn f0, vs0 192; CHECK-P8-NEXT: xscvspdpn f2, vs2 193; CHECK-P8-NEXT: xscvspdpn f3, vs3 194; CHECK-P8-NEXT: xscvspdpn f5, vs5 195; CHECK-P8-NEXT: xscvdpsxws f4, f4 196; CHECK-P8-NEXT: xscvdpsxws f1, f1 197; CHECK-P8-NEXT: xscvdpsxws f0, f0 198; CHECK-P8-NEXT: xscvdpsxws f2, f2 199; CHECK-P8-NEXT: xscvdpsxws f3, f3 200; CHECK-P8-NEXT: xscvdpsxws f5, f5 201; CHECK-P8-NEXT: mfvsrwz r4, f4 202; CHECK-P8-NEXT: mfvsrwz r6, f1 203; CHECK-P8-NEXT: mfvsrwz r5, f0 204; CHECK-P8-NEXT: mtvsrd f1, r6 205; CHECK-P8-NEXT: mtvsrd f0, r5 206; CHECK-P8-NEXT: xxswapd v4, vs1 207; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1 208; CHECK-P8-NEXT: xxswapd v3, vs0 209; CHECK-P8-NEXT: xscvspdpn f0, v2 210; CHECK-P8-NEXT: mtvsrd f4, r4 211; CHECK-P8-NEXT: xscvspdpn f1, vs1 212; CHECK-P8-NEXT: mfvsrwz r4, f2 213; CHECK-P8-NEXT: xxswapd v1, vs4 214; CHECK-P8-NEXT: vmrglh v2, v4, v3 215; CHECK-P8-NEXT: mtvsrd f2, r4 216; CHECK-P8-NEXT: xscvdpsxws f0, f0 217; CHECK-P8-NEXT: mfvsrwz r4, f5 218; CHECK-P8-NEXT: xxswapd v5, vs2 219; CHECK-P8-NEXT: xscvdpsxws f1, f1 220; CHECK-P8-NEXT: mfvsrwz r3, f0 221; CHECK-P8-NEXT: mtvsrd f0, r3 222; CHECK-P8-NEXT: mfvsrwz r3, f1 223; CHECK-P8-NEXT: xxswapd v3, vs0 224; CHECK-P8-NEXT: mtvsrd f1, r3 225; CHECK-P8-NEXT: mfvsrwz r3, f3 226; CHECK-P8-NEXT: mtvsrd f3, r4 227; CHECK-P8-NEXT: xxswapd v4, vs1 228; CHECK-P8-NEXT: mtvsrd f0, r3 229; CHECK-P8-NEXT: xxswapd v6, vs3 230; CHECK-P8-NEXT: xxswapd v0, vs0 231; CHECK-P8-NEXT: vmrglh v3, v3, v4 232; CHECK-P8-NEXT: vmrglh v4, v0, v5 233; CHECK-P8-NEXT: vmrglh v5, v1, v6 234; CHECK-P8-NEXT: vmrglw v2, v3, v2 235; CHECK-P8-NEXT: vmrglw v3, v5, v4 236; CHECK-P8-NEXT: xxmrgld v2, v3, v2 237; CHECK-P8-NEXT: blr 238; 239; CHECK-P9-LABEL: test8elt: 240; CHECK-P9: # %bb.0: # %entry 241; CHECK-P9-NEXT: lxv vs1, 0(r3) 242; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3 243; CHECK-P9-NEXT: xscvspdpn f2, vs2 244; CHECK-P9-NEXT: xscvdpsxws f2, f2 245; CHECK-P9-NEXT: lxv vs0, 16(r3) 246; CHECK-P9-NEXT: mfvsrwz r3, f2 247; CHECK-P9-NEXT: mtvsrd f2, r3 248; CHECK-P9-NEXT: xxswapd v2, vs2 249; CHECK-P9-NEXT: xxswapd vs2, vs1 250; CHECK-P9-NEXT: xscvspdpn f2, vs2 251; CHECK-P9-NEXT: xscvdpsxws f2, f2 252; CHECK-P9-NEXT: mfvsrwz r3, f2 253; CHECK-P9-NEXT: mtvsrd f2, r3 254; CHECK-P9-NEXT: xxswapd v3, vs2 255; CHECK-P9-NEXT: xscvspdpn f2, vs1 256; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1 257; CHECK-P9-NEXT: xscvspdpn f1, vs1 258; CHECK-P9-NEXT: xscvdpsxws f2, f2 259; CHECK-P9-NEXT: xscvdpsxws f1, f1 260; CHECK-P9-NEXT: mfvsrwz r3, f2 261; CHECK-P9-NEXT: mtvsrd f2, r3 262; CHECK-P9-NEXT: mfvsrwz r3, f1 263; CHECK-P9-NEXT: mtvsrd f1, r3 264; CHECK-P9-NEXT: xxswapd v4, vs1 265; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3 266; CHECK-P9-NEXT: xscvspdpn f1, vs1 267; CHECK-P9-NEXT: xscvdpsxws f1, f1 268; CHECK-P9-NEXT: vmrglh v2, v3, v2 269; CHECK-P9-NEXT: xxswapd v3, vs2 270; CHECK-P9-NEXT: vmrglh v3, v3, v4 271; CHECK-P9-NEXT: vmrglw v2, v3, v2 272; CHECK-P9-NEXT: mfvsrwz r3, f1 273; CHECK-P9-NEXT: mtvsrd f1, r3 274; CHECK-P9-NEXT: xxswapd v3, vs1 275; CHECK-P9-NEXT: xxswapd vs1, vs0 276; CHECK-P9-NEXT: xscvspdpn f1, vs1 277; CHECK-P9-NEXT: xscvdpsxws f1, f1 278; CHECK-P9-NEXT: mfvsrwz r3, f1 279; CHECK-P9-NEXT: mtvsrd f1, r3 280; CHECK-P9-NEXT: xxswapd v4, vs1 281; CHECK-P9-NEXT: xscvspdpn f1, vs0 282; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1 283; CHECK-P9-NEXT: xscvspdpn f0, vs0 284; CHECK-P9-NEXT: xscvdpsxws f1, f1 285; CHECK-P9-NEXT: xscvdpsxws f0, f0 286; CHECK-P9-NEXT: mfvsrwz r3, f1 287; CHECK-P9-NEXT: mtvsrd f1, r3 288; CHECK-P9-NEXT: mfvsrwz r3, f0 289; CHECK-P9-NEXT: mtvsrd f0, r3 290; CHECK-P9-NEXT: vmrglh v3, v4, v3 291; CHECK-P9-NEXT: xxswapd v4, vs1 292; CHECK-P9-NEXT: xxswapd v5, vs0 293; CHECK-P9-NEXT: vmrglh v4, v4, v5 294; CHECK-P9-NEXT: vmrglw v3, v4, v3 295; CHECK-P9-NEXT: xxmrgld v2, v3, v2 296; CHECK-P9-NEXT: blr 297; 298; CHECK-BE-LABEL: test8elt: 299; CHECK-BE: # %bb.0: # %entry 300; CHECK-BE-NEXT: lxv vs1, 16(r3) 301; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 302; CHECK-BE-NEXT: xscvspdpn f2, vs2 303; CHECK-BE-NEXT: xscvdpsxws f2, f2 304; CHECK-BE-NEXT: lxv vs0, 0(r3) 305; CHECK-BE-NEXT: mfvsrwz r3, f2 306; CHECK-BE-NEXT: xxswapd vs2, vs1 307; CHECK-BE-NEXT: sldi r3, r3, 48 308; CHECK-BE-NEXT: xscvspdpn f2, vs2 309; CHECK-BE-NEXT: mtvsrd v2, r3 310; CHECK-BE-NEXT: xscvdpsxws f2, f2 311; CHECK-BE-NEXT: mfvsrwz r3, f2 312; CHECK-BE-NEXT: xscvspdpn f2, vs1 313; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 314; CHECK-BE-NEXT: sldi r3, r3, 48 315; CHECK-BE-NEXT: xscvdpsxws f2, f2 316; CHECK-BE-NEXT: xscvspdpn f1, vs1 317; CHECK-BE-NEXT: mtvsrd v3, r3 318; CHECK-BE-NEXT: xscvdpsxws f1, f1 319; CHECK-BE-NEXT: vmrghh v2, v3, v2 320; CHECK-BE-NEXT: mfvsrwz r3, f2 321; CHECK-BE-NEXT: sldi r3, r3, 48 322; CHECK-BE-NEXT: mtvsrd v3, r3 323; CHECK-BE-NEXT: mfvsrwz r3, f1 324; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3 325; CHECK-BE-NEXT: sldi r3, r3, 48 326; CHECK-BE-NEXT: xscvspdpn f1, vs1 327; CHECK-BE-NEXT: mtvsrd v4, r3 328; CHECK-BE-NEXT: xscvdpsxws f1, f1 329; CHECK-BE-NEXT: mfvsrwz r3, f1 330; CHECK-BE-NEXT: xxswapd vs1, vs0 331; CHECK-BE-NEXT: xscvspdpn f1, vs1 332; CHECK-BE-NEXT: xscvdpsxws f1, f1 333; CHECK-BE-NEXT: vmrghh v3, v3, v4 334; CHECK-BE-NEXT: sldi r3, r3, 48 335; CHECK-BE-NEXT: vmrghw v2, v3, v2 336; CHECK-BE-NEXT: mtvsrd v3, r3 337; CHECK-BE-NEXT: mfvsrwz r3, f1 338; CHECK-BE-NEXT: xscvspdpn f1, vs0 339; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 340; CHECK-BE-NEXT: sldi r3, r3, 48 341; CHECK-BE-NEXT: xscvdpsxws f1, f1 342; CHECK-BE-NEXT: xscvspdpn f0, vs0 343; CHECK-BE-NEXT: mtvsrd v4, r3 344; CHECK-BE-NEXT: xscvdpsxws f0, f0 345; CHECK-BE-NEXT: vmrghh v3, v4, v3 346; CHECK-BE-NEXT: mfvsrwz r3, f1 347; CHECK-BE-NEXT: sldi r3, r3, 48 348; CHECK-BE-NEXT: mtvsrd v4, r3 349; CHECK-BE-NEXT: mfvsrwz r3, f0 350; CHECK-BE-NEXT: sldi r3, r3, 48 351; CHECK-BE-NEXT: mtvsrd v5, r3 352; CHECK-BE-NEXT: vmrghh v4, v4, v5 353; CHECK-BE-NEXT: vmrghw v3, v4, v3 354; CHECK-BE-NEXT: xxmrghd v2, v3, v2 355; CHECK-BE-NEXT: blr 356entry: 357 %a = load <8 x float>, <8 x float>* %0, align 32 358 %1 = fptoui <8 x float> %a to <8 x i16> 359 ret <8 x i16> %1 360} 361 362define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 { 363; CHECK-P8-LABEL: test16elt: 364; CHECK-P8: # %bb.0: # %entry 365; CHECK-P8-NEXT: lvx v5, 0, r4 366; CHECK-P8-NEXT: li r6, 32 367; CHECK-P8-NEXT: li r5, 16 368; CHECK-P8-NEXT: lvx v2, r4, r6 369; CHECK-P8-NEXT: lvx v3, r4, r5 370; CHECK-P8-NEXT: li r6, 48 371; CHECK-P8-NEXT: xscvspdpn f0, v5 372; CHECK-P8-NEXT: xxsldwi vs1, v5, v5, 3 373; CHECK-P8-NEXT: lvx v4, r4, r6 374; CHECK-P8-NEXT: xscvspdpn f4, v2 375; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1 376; CHECK-P8-NEXT: xscvspdpn f2, v3 377; CHECK-P8-NEXT: xxswapd vs3, v5 378; CHECK-P8-NEXT: xscvspdpn f1, vs1 379; CHECK-P8-NEXT: xxswapd vs8, v3 380; CHECK-P8-NEXT: xscvspdpn f6, v4 381; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 3 382; CHECK-P8-NEXT: xscvspdpn f5, vs5 383; CHECK-P8-NEXT: xxsldwi vs10, v2, v2, 3 384; CHECK-P8-NEXT: xscvdpsxws f0, f0 385; CHECK-P8-NEXT: xxsldwi vs9, v3, v3, 1 386; CHECK-P8-NEXT: xscvspdpn f3, vs3 387; CHECK-P8-NEXT: xxsldwi vs12, v2, v2, 1 388; CHECK-P8-NEXT: xscvspdpn f8, vs8 389; CHECK-P8-NEXT: xxswapd vs11, v2 390; CHECK-P8-NEXT: xscvdpsxws f4, f4 391; CHECK-P8-NEXT: xxswapd v2, v4 392; CHECK-P8-NEXT: xscvspdpn f7, vs7 393; CHECK-P8-NEXT: xxsldwi vs13, v4, v4, 3 394; CHECK-P8-NEXT: xscvdpsxws f2, f2 395; CHECK-P8-NEXT: xxsldwi v3, v4, v4, 1 396; CHECK-P8-NEXT: xscvspdpn f10, vs10 397; CHECK-P8-NEXT: xscvdpsxws f1, f1 398; CHECK-P8-NEXT: xscvspdpn f9, vs9 399; CHECK-P8-NEXT: xscvdpsxws f6, f6 400; CHECK-P8-NEXT: xscvspdpn f12, vs12 401; CHECK-P8-NEXT: xscvdpsxws f5, f5 402; CHECK-P8-NEXT: mfvsrwz r4, f0 403; CHECK-P8-NEXT: xscvspdpn f11, vs11 404; CHECK-P8-NEXT: xscvdpsxws f3, f3 405; CHECK-P8-NEXT: xscvspdpn v2, v2 406; CHECK-P8-NEXT: xscvdpsxws f8, f8 407; CHECK-P8-NEXT: mtvsrd f0, r4 408; CHECK-P8-NEXT: mfvsrwz r4, f4 409; CHECK-P8-NEXT: xscvdpsxws f7, f7 410; CHECK-P8-NEXT: mfvsrwz r6, f2 411; CHECK-P8-NEXT: xscvspdpn f13, vs13 412; CHECK-P8-NEXT: xscvspdpn v3, v3 413; CHECK-P8-NEXT: xscvdpsxws f10, f10 414; CHECK-P8-NEXT: mtvsrd f4, r4 415; CHECK-P8-NEXT: mfvsrwz r4, f1 416; CHECK-P8-NEXT: xscvdpsxws f9, f9 417; CHECK-P8-NEXT: mtvsrd f2, r6 418; CHECK-P8-NEXT: mfvsrwz r6, f6 419; CHECK-P8-NEXT: xscvdpsxws f12, f12 420; CHECK-P8-NEXT: mtvsrd f1, r4 421; CHECK-P8-NEXT: mfvsrwz r4, f5 422; CHECK-P8-NEXT: xscvdpsxws f11, f11 423; CHECK-P8-NEXT: xxswapd v4, vs1 424; CHECK-P8-NEXT: mtvsrd f6, r6 425; CHECK-P8-NEXT: mfvsrwz r6, f3 426; CHECK-P8-NEXT: xscvdpsxws v2, v2 427; CHECK-P8-NEXT: xxswapd v9, vs6 428; CHECK-P8-NEXT: mtvsrd f5, r4 429; CHECK-P8-NEXT: mfvsrwz r4, f8 430; CHECK-P8-NEXT: mtvsrd f3, r6 431; CHECK-P8-NEXT: xxswapd v0, vs5 432; CHECK-P8-NEXT: mfvsrwz r6, f7 433; CHECK-P8-NEXT: xscvdpsxws f13, f13 434; CHECK-P8-NEXT: xxswapd v5, vs3 435; CHECK-P8-NEXT: xscvdpsxws v3, v3 436; CHECK-P8-NEXT: mtvsrd f8, r4 437; CHECK-P8-NEXT: mfvsrwz r4, f10 438; CHECK-P8-NEXT: mtvsrd f7, r6 439; CHECK-P8-NEXT: mfvsrwz r6, f9 440; CHECK-P8-NEXT: mtvsrd f10, r4 441; CHECK-P8-NEXT: mfvsrwz r4, f12 442; CHECK-P8-NEXT: mtvsrd f9, r6 443; CHECK-P8-NEXT: xxswapd v6, vs10 444; CHECK-P8-NEXT: mfvsrwz r6, f11 445; CHECK-P8-NEXT: mtvsrd f12, r4 446; CHECK-P8-NEXT: xxswapd v1, vs9 447; CHECK-P8-NEXT: mfvsrwz r4, v2 448; CHECK-P8-NEXT: xxswapd v2, vs0 449; CHECK-P8-NEXT: mtvsrd f11, r6 450; CHECK-P8-NEXT: mfvsrwz r6, f13 451; CHECK-P8-NEXT: mtvsrd f0, r4 452; CHECK-P8-NEXT: xxswapd v7, vs11 453; CHECK-P8-NEXT: mfvsrwz r4, v3 454; CHECK-P8-NEXT: vmrglh v3, v5, v4 455; CHECK-P8-NEXT: xxswapd v4, vs7 456; CHECK-P8-NEXT: vmrglh v2, v2, v0 457; CHECK-P8-NEXT: xxswapd v5, vs8 458; CHECK-P8-NEXT: xxswapd v0, vs2 459; CHECK-P8-NEXT: mtvsrd f13, r6 460; CHECK-P8-NEXT: mtvsrd f1, r4 461; CHECK-P8-NEXT: xxswapd v8, vs0 462; CHECK-P8-NEXT: vmrglh v4, v5, v4 463; CHECK-P8-NEXT: vmrglh v5, v0, v1 464; CHECK-P8-NEXT: xxswapd v1, vs4 465; CHECK-P8-NEXT: vmrglh v0, v7, v6 466; CHECK-P8-NEXT: xxswapd v6, vs12 467; CHECK-P8-NEXT: xxswapd v7, vs13 468; CHECK-P8-NEXT: xxswapd v10, vs1 469; CHECK-P8-NEXT: vmrglw v2, v2, v3 470; CHECK-P8-NEXT: vmrglh v1, v1, v6 471; CHECK-P8-NEXT: vmrglh v6, v8, v7 472; CHECK-P8-NEXT: vmrglh v7, v9, v10 473; CHECK-P8-NEXT: vmrglw v3, v5, v4 474; CHECK-P8-NEXT: vmrglw v4, v1, v0 475; CHECK-P8-NEXT: vmrglw v5, v7, v6 476; CHECK-P8-NEXT: xxmrgld v2, v3, v2 477; CHECK-P8-NEXT: stvx v2, 0, r3 478; CHECK-P8-NEXT: xxmrgld v3, v5, v4 479; CHECK-P8-NEXT: stvx v3, r3, r5 480; CHECK-P8-NEXT: blr 481; 482; CHECK-P9-LABEL: test16elt: 483; CHECK-P9: # %bb.0: # %entry 484; CHECK-P9-NEXT: lxv vs1, 0(r4) 485; CHECK-P9-NEXT: lxv vs3, 16(r4) 486; CHECK-P9-NEXT: xscvspdpn f5, vs1 487; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3 488; CHECK-P9-NEXT: xscvspdpn f8, vs3 489; CHECK-P9-NEXT: xxswapd vs4, vs1 490; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1 491; CHECK-P9-NEXT: xscvspdpn f4, vs4 492; CHECK-P9-NEXT: xscvdpsxws f5, f5 493; CHECK-P9-NEXT: xscvspdpn f2, vs2 494; CHECK-P9-NEXT: xscvdpsxws f8, f8 495; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 3 496; CHECK-P9-NEXT: xxswapd vs7, vs3 497; CHECK-P9-NEXT: xscvspdpn f6, vs6 498; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1 499; CHECK-P9-NEXT: xscvspdpn f7, vs7 500; CHECK-P9-NEXT: xscvspdpn f3, vs3 501; CHECK-P9-NEXT: xscvdpsxws f2, f2 502; CHECK-P9-NEXT: xscvspdpn f1, vs1 503; CHECK-P9-NEXT: xscvdpsxws f4, f4 504; CHECK-P9-NEXT: xscvdpsxws f6, f6 505; CHECK-P9-NEXT: mfvsrwz r5, f5 506; CHECK-P9-NEXT: xscvdpsxws f1, f1 507; CHECK-P9-NEXT: xscvdpsxws f7, f7 508; CHECK-P9-NEXT: xscvdpsxws f3, f3 509; CHECK-P9-NEXT: mtvsrd f5, r5 510; CHECK-P9-NEXT: mfvsrwz r5, f8 511; CHECK-P9-NEXT: mtvsrd f8, r5 512; CHECK-P9-NEXT: mfvsrwz r5, f2 513; CHECK-P9-NEXT: lxv vs0, 32(r4) 514; CHECK-P9-NEXT: xxsldwi vs9, vs0, vs0, 3 515; CHECK-P9-NEXT: xxswapd vs10, vs0 516; CHECK-P9-NEXT: xscvspdpn f9, vs9 517; CHECK-P9-NEXT: xscvspdpn f10, vs10 518; CHECK-P9-NEXT: xscvdpsxws f9, f9 519; CHECK-P9-NEXT: xscvdpsxws f10, f10 520; CHECK-P9-NEXT: mtvsrd f2, r5 521; CHECK-P9-NEXT: mfvsrwz r5, f4 522; CHECK-P9-NEXT: mtvsrd f4, r5 523; CHECK-P9-NEXT: mfvsrwz r5, f1 524; CHECK-P9-NEXT: mtvsrd f1, r5 525; CHECK-P9-NEXT: mfvsrwz r5, f6 526; CHECK-P9-NEXT: xxswapd v2, vs2 527; CHECK-P9-NEXT: xxswapd v3, vs4 528; CHECK-P9-NEXT: xscvspdpn f2, vs0 529; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1 530; CHECK-P9-NEXT: xscvspdpn f0, vs0 531; CHECK-P9-NEXT: xscvdpsxws f2, f2 532; CHECK-P9-NEXT: mtvsrd f6, r5 533; CHECK-P9-NEXT: mfvsrwz r5, f7 534; CHECK-P9-NEXT: xxswapd v4, vs1 535; CHECK-P9-NEXT: lxv vs1, 48(r4) 536; CHECK-P9-NEXT: vmrglh v2, v3, v2 537; CHECK-P9-NEXT: xxswapd v3, vs5 538; CHECK-P9-NEXT: mtvsrd f7, r5 539; CHECK-P9-NEXT: mfvsrwz r5, f3 540; CHECK-P9-NEXT: vmrglh v3, v3, v4 541; CHECK-P9-NEXT: xxswapd v4, vs6 542; CHECK-P9-NEXT: xxswapd v5, vs7 543; CHECK-P9-NEXT: mtvsrd f3, r5 544; CHECK-P9-NEXT: xscvdpsxws f0, f0 545; CHECK-P9-NEXT: xxswapd v0, vs3 546; CHECK-P9-NEXT: vmrglh v4, v5, v4 547; CHECK-P9-NEXT: xxswapd v5, vs8 548; CHECK-P9-NEXT: vmrglh v5, v5, v0 549; CHECK-P9-NEXT: mfvsrwz r4, f2 550; CHECK-P9-NEXT: mtvsrd f2, r4 551; CHECK-P9-NEXT: mfvsrwz r4, f0 552; CHECK-P9-NEXT: vmrglw v2, v3, v2 553; CHECK-P9-NEXT: mtvsrd f0, r4 554; CHECK-P9-NEXT: vmrglw v3, v5, v4 555; CHECK-P9-NEXT: xxswapd v4, vs2 556; CHECK-P9-NEXT: xxmrgld vs2, v3, v2 557; CHECK-P9-NEXT: xxswapd v2, vs0 558; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3 559; CHECK-P9-NEXT: xscvspdpn f0, vs0 560; CHECK-P9-NEXT: xscvdpsxws f0, f0 561; CHECK-P9-NEXT: mfvsrwz r4, f0 562; CHECK-P9-NEXT: mtvsrd f0, r4 563; CHECK-P9-NEXT: xxswapd v3, vs0 564; CHECK-P9-NEXT: xxswapd vs0, vs1 565; CHECK-P9-NEXT: xscvspdpn f0, vs0 566; CHECK-P9-NEXT: xscvdpsxws f0, f0 567; CHECK-P9-NEXT: mfvsrwz r4, f0 568; CHECK-P9-NEXT: mtvsrd f0, r4 569; CHECK-P9-NEXT: vmrglh v2, v4, v2 570; CHECK-P9-NEXT: xxswapd v4, vs0 571; CHECK-P9-NEXT: xscvspdpn f0, vs1 572; CHECK-P9-NEXT: xscvdpsxws f0, f0 573; CHECK-P9-NEXT: mfvsrwz r4, f0 574; CHECK-P9-NEXT: mtvsrd f0, r4 575; CHECK-P9-NEXT: vmrglh v3, v4, v3 576; CHECK-P9-NEXT: xxswapd v4, vs0 577; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1 578; CHECK-P9-NEXT: xscvspdpn f0, vs0 579; CHECK-P9-NEXT: xscvdpsxws f0, f0 580; CHECK-P9-NEXT: mfvsrwz r5, f9 581; CHECK-P9-NEXT: mtvsrd f9, r5 582; CHECK-P9-NEXT: mfvsrwz r5, f10 583; CHECK-P9-NEXT: mtvsrd f10, r5 584; CHECK-P9-NEXT: xxswapd v0, vs9 585; CHECK-P9-NEXT: xxswapd v1, vs10 586; CHECK-P9-NEXT: vmrglh v0, v1, v0 587; CHECK-P9-NEXT: vmrglw v2, v2, v0 588; CHECK-P9-NEXT: stxv vs2, 0(r3) 589; CHECK-P9-NEXT: mfvsrwz r4, f0 590; CHECK-P9-NEXT: mtvsrd f0, r4 591; CHECK-P9-NEXT: xxswapd v5, vs0 592; CHECK-P9-NEXT: vmrglh v4, v4, v5 593; CHECK-P9-NEXT: vmrglw v3, v4, v3 594; CHECK-P9-NEXT: xxmrgld vs0, v3, v2 595; CHECK-P9-NEXT: stxv vs0, 16(r3) 596; CHECK-P9-NEXT: blr 597; 598; CHECK-BE-LABEL: test16elt: 599; CHECK-BE: # %bb.0: # %entry 600; CHECK-BE-NEXT: lxv vs1, 16(r4) 601; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 602; CHECK-BE-NEXT: xscvspdpn f2, vs2 603; CHECK-BE-NEXT: xxswapd vs3, vs1 604; CHECK-BE-NEXT: xscvspdpn f3, vs3 605; CHECK-BE-NEXT: xscvdpsxws f2, f2 606; CHECK-BE-NEXT: xscvdpsxws f3, f3 607; CHECK-BE-NEXT: mfvsrwz r5, f2 608; CHECK-BE-NEXT: xscvspdpn f4, vs1 609; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 610; CHECK-BE-NEXT: xscvspdpn f1, vs1 611; CHECK-BE-NEXT: xscvdpsxws f1, f1 612; CHECK-BE-NEXT: sldi r5, r5, 48 613; CHECK-BE-NEXT: mtvsrd v2, r5 614; CHECK-BE-NEXT: mfvsrwz r5, f3 615; CHECK-BE-NEXT: xscvdpsxws f3, f4 616; CHECK-BE-NEXT: lxv vs0, 0(r4) 617; CHECK-BE-NEXT: xxsldwi vs2, vs0, vs0, 3 618; CHECK-BE-NEXT: xscvspdpn f2, vs2 619; CHECK-BE-NEXT: sldi r5, r5, 48 620; CHECK-BE-NEXT: mtvsrd v3, r5 621; CHECK-BE-NEXT: vmrghh v2, v3, v2 622; CHECK-BE-NEXT: mfvsrwz r5, f3 623; CHECK-BE-NEXT: sldi r5, r5, 48 624; CHECK-BE-NEXT: mtvsrd v3, r5 625; CHECK-BE-NEXT: mfvsrwz r5, f1 626; CHECK-BE-NEXT: xxswapd vs1, vs0 627; CHECK-BE-NEXT: xscvdpsxws f2, f2 628; CHECK-BE-NEXT: sldi r5, r5, 48 629; CHECK-BE-NEXT: xscvspdpn f1, vs1 630; CHECK-BE-NEXT: mtvsrd v4, r5 631; CHECK-BE-NEXT: mfvsrwz r5, f2 632; CHECK-BE-NEXT: xscvdpsxws f1, f1 633; CHECK-BE-NEXT: sldi r5, r5, 48 634; CHECK-BE-NEXT: vmrghh v3, v3, v4 635; CHECK-BE-NEXT: mtvsrd v4, r5 636; CHECK-BE-NEXT: vmrghw v2, v3, v2 637; CHECK-BE-NEXT: mfvsrwz r5, f1 638; CHECK-BE-NEXT: xscvspdpn f1, vs0 639; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 640; CHECK-BE-NEXT: sldi r5, r5, 48 641; CHECK-BE-NEXT: xscvdpsxws f1, f1 642; CHECK-BE-NEXT: xscvspdpn f0, vs0 643; CHECK-BE-NEXT: mtvsrd v5, r5 644; CHECK-BE-NEXT: xscvdpsxws f0, f0 645; CHECK-BE-NEXT: vmrghh v4, v5, v4 646; CHECK-BE-NEXT: mfvsrwz r5, f1 647; CHECK-BE-NEXT: lxv vs1, 48(r4) 648; CHECK-BE-NEXT: sldi r5, r5, 48 649; CHECK-BE-NEXT: mtvsrd v5, r5 650; CHECK-BE-NEXT: mfvsrwz r5, f0 651; CHECK-BE-NEXT: lxv vs0, 32(r4) 652; CHECK-BE-NEXT: xscvspdpn f5, vs1 653; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 654; CHECK-BE-NEXT: xscvspdpn f2, vs2 655; CHECK-BE-NEXT: xscvdpsxws f5, f5 656; CHECK-BE-NEXT: sldi r5, r5, 48 657; CHECK-BE-NEXT: xxswapd vs3, vs1 658; CHECK-BE-NEXT: mtvsrd v0, r5 659; CHECK-BE-NEXT: vmrghh v5, v5, v0 660; CHECK-BE-NEXT: xscvspdpn f3, vs3 661; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 662; CHECK-BE-NEXT: xscvspdpn f1, vs1 663; CHECK-BE-NEXT: xscvdpsxws f2, f2 664; CHECK-BE-NEXT: vmrghw v3, v5, v4 665; CHECK-BE-NEXT: xscvdpsxws f3, f3 666; CHECK-BE-NEXT: mfvsrwz r4, f5 667; CHECK-BE-NEXT: xxmrghd vs4, v3, v2 668; CHECK-BE-NEXT: sldi r4, r4, 48 669; CHECK-BE-NEXT: mtvsrd v2, r4 670; CHECK-BE-NEXT: mfvsrwz r4, f2 671; CHECK-BE-NEXT: xscvdpsxws f1, f1 672; CHECK-BE-NEXT: stxv vs4, 0(r3) 673; CHECK-BE-NEXT: sldi r4, r4, 48 674; CHECK-BE-NEXT: mtvsrd v3, r4 675; CHECK-BE-NEXT: mfvsrwz r4, f3 676; CHECK-BE-NEXT: sldi r4, r4, 48 677; CHECK-BE-NEXT: mtvsrd v4, r4 678; CHECK-BE-NEXT: mfvsrwz r4, f1 679; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3 680; CHECK-BE-NEXT: sldi r4, r4, 48 681; CHECK-BE-NEXT: xscvspdpn f1, vs1 682; CHECK-BE-NEXT: xscvdpsxws f1, f1 683; CHECK-BE-NEXT: vmrghh v3, v4, v3 684; CHECK-BE-NEXT: mtvsrd v4, r4 685; CHECK-BE-NEXT: mfvsrwz r4, f1 686; CHECK-BE-NEXT: xxswapd vs1, vs0 687; CHECK-BE-NEXT: xscvspdpn f1, vs1 688; CHECK-BE-NEXT: xscvdpsxws f1, f1 689; CHECK-BE-NEXT: vmrghh v2, v2, v4 690; CHECK-BE-NEXT: sldi r4, r4, 48 691; CHECK-BE-NEXT: vmrghw v2, v2, v3 692; CHECK-BE-NEXT: mtvsrd v3, r4 693; CHECK-BE-NEXT: mfvsrwz r4, f1 694; CHECK-BE-NEXT: xscvspdpn f1, vs0 695; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 696; CHECK-BE-NEXT: sldi r4, r4, 48 697; CHECK-BE-NEXT: xscvdpsxws f1, f1 698; CHECK-BE-NEXT: xscvspdpn f0, vs0 699; CHECK-BE-NEXT: mtvsrd v4, r4 700; CHECK-BE-NEXT: xscvdpsxws f0, f0 701; CHECK-BE-NEXT: vmrghh v3, v4, v3 702; CHECK-BE-NEXT: mfvsrwz r4, f1 703; CHECK-BE-NEXT: sldi r4, r4, 48 704; CHECK-BE-NEXT: mtvsrd v4, r4 705; CHECK-BE-NEXT: mfvsrwz r4, f0 706; CHECK-BE-NEXT: sldi r4, r4, 48 707; CHECK-BE-NEXT: mtvsrd v5, r4 708; CHECK-BE-NEXT: vmrghh v4, v4, v5 709; CHECK-BE-NEXT: vmrghw v3, v4, v3 710; CHECK-BE-NEXT: xxmrghd vs0, v3, v2 711; CHECK-BE-NEXT: stxv vs0, 16(r3) 712; CHECK-BE-NEXT: blr 713entry: 714 %a = load <16 x float>, <16 x float>* %0, align 64 715 %1 = fptoui <16 x float> %a to <16 x i16> 716 store <16 x i16> %1, <16 x i16>* %agg.result, align 32 717 ret void 718} 719 720define i32 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 { 721; CHECK-P8-LABEL: test2elt_signed: 722; CHECK-P8: # %bb.0: # %entry 723; CHECK-P8-NEXT: mtvsrd f0, r3 724; CHECK-P8-NEXT: xxswapd v2, vs0 725; CHECK-P8-NEXT: xscvspdpn f0, vs0 726; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3 727; CHECK-P8-NEXT: xscvspdpn f1, vs1 728; CHECK-P8-NEXT: xscvdpsxws f0, f0 729; CHECK-P8-NEXT: xscvdpsxws f1, f1 730; CHECK-P8-NEXT: mfvsrwz r4, f0 731; CHECK-P8-NEXT: mfvsrwz r3, f1 732; CHECK-P8-NEXT: mtvsrd f1, r4 733; CHECK-P8-NEXT: mtvsrd f0, r3 734; CHECK-P8-NEXT: xxswapd v3, vs1 735; CHECK-P8-NEXT: xxswapd v2, vs0 736; CHECK-P8-NEXT: vmrglh v2, v3, v2 737; CHECK-P8-NEXT: xxswapd vs0, v2 738; CHECK-P8-NEXT: mfvsrwz r3, f0 739; CHECK-P8-NEXT: blr 740; 741; CHECK-P9-LABEL: test2elt_signed: 742; CHECK-P9: # %bb.0: # %entry 743; CHECK-P9-NEXT: mtvsrd f0, r3 744; CHECK-P9-NEXT: xxswapd v2, vs0 745; CHECK-P9-NEXT: xscvspdpn f0, vs0 746; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3 747; CHECK-P9-NEXT: xscvspdpn f1, vs1 748; CHECK-P9-NEXT: xscvdpsxws f1, f1 749; CHECK-P9-NEXT: xscvdpsxws f0, f0 750; CHECK-P9-NEXT: mfvsrwz r3, f1 751; CHECK-P9-NEXT: mtvsrd f1, r3 752; CHECK-P9-NEXT: mfvsrwz r3, f0 753; CHECK-P9-NEXT: mtvsrd f0, r3 754; CHECK-P9-NEXT: xxswapd v2, vs1 755; CHECK-P9-NEXT: xxswapd v3, vs0 756; CHECK-P9-NEXT: vmrglh v2, v3, v2 757; CHECK-P9-NEXT: li r3, 0 758; CHECK-P9-NEXT: vextuwrx r3, r3, v2 759; CHECK-P9-NEXT: blr 760; 761; CHECK-BE-LABEL: test2elt_signed: 762; CHECK-BE: # %bb.0: # %entry 763; CHECK-BE-NEXT: mtvsrd f0, r3 764; CHECK-BE-NEXT: xscvspdpn f1, vs0 765; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 766; CHECK-BE-NEXT: xscvdpsxws f1, f1 767; CHECK-BE-NEXT: xscvspdpn f0, vs0 768; CHECK-BE-NEXT: xscvdpsxws f0, f0 769; CHECK-BE-NEXT: mfvsrwz r3, f1 770; CHECK-BE-NEXT: sldi r3, r3, 48 771; CHECK-BE-NEXT: mtvsrd v2, r3 772; CHECK-BE-NEXT: mfvsrwz r3, f0 773; CHECK-BE-NEXT: sldi r3, r3, 48 774; CHECK-BE-NEXT: mtvsrd v3, r3 775; CHECK-BE-NEXT: li r3, 0 776; CHECK-BE-NEXT: vmrghh v2, v2, v3 777; CHECK-BE-NEXT: vextuwlx r3, r3, v2 778; CHECK-BE-NEXT: blr 779entry: 780 %0 = bitcast i64 %a.coerce to <2 x float> 781 %1 = fptosi <2 x float> %0 to <2 x i16> 782 %2 = bitcast <2 x i16> %1 to i32 783 ret i32 %2 784} 785 786define i64 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 { 787; CHECK-P8-LABEL: test4elt_signed: 788; CHECK-P8: # %bb.0: # %entry 789; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3 790; CHECK-P8-NEXT: xscvspdpn f1, v2 791; CHECK-P8-NEXT: xxswapd vs2, v2 792; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1 793; CHECK-P8-NEXT: xscvspdpn f0, vs0 794; CHECK-P8-NEXT: xscvspdpn f2, vs2 795; CHECK-P8-NEXT: xscvspdpn f3, vs3 796; CHECK-P8-NEXT: xscvdpsxws f1, f1 797; CHECK-P8-NEXT: xscvdpsxws f0, f0 798; CHECK-P8-NEXT: xscvdpsxws f2, f2 799; CHECK-P8-NEXT: xscvdpsxws f3, f3 800; CHECK-P8-NEXT: mfvsrwz r3, f1 801; CHECK-P8-NEXT: mtvsrd f1, r3 802; CHECK-P8-NEXT: mfvsrwz r3, f0 803; CHECK-P8-NEXT: mfvsrwz r4, f2 804; CHECK-P8-NEXT: xxswapd v4, vs1 805; CHECK-P8-NEXT: mtvsrd f0, r3 806; CHECK-P8-NEXT: mfvsrwz r3, f3 807; CHECK-P8-NEXT: mtvsrd f2, r4 808; CHECK-P8-NEXT: xxswapd v2, vs0 809; CHECK-P8-NEXT: mtvsrd f3, r3 810; CHECK-P8-NEXT: xxswapd v3, vs2 811; CHECK-P8-NEXT: xxswapd v5, vs3 812; CHECK-P8-NEXT: vmrglh v2, v3, v2 813; CHECK-P8-NEXT: vmrglh v3, v4, v5 814; CHECK-P8-NEXT: vmrglw v2, v3, v2 815; CHECK-P8-NEXT: xxswapd vs0, v2 816; CHECK-P8-NEXT: mfvsrd r3, f0 817; CHECK-P8-NEXT: blr 818; 819; CHECK-P9-LABEL: test4elt_signed: 820; CHECK-P9: # %bb.0: # %entry 821; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3 822; CHECK-P9-NEXT: xscvspdpn f0, vs0 823; CHECK-P9-NEXT: xscvdpsxws f0, f0 824; CHECK-P9-NEXT: mfvsrwz r3, f0 825; CHECK-P9-NEXT: mtvsrd f0, r3 826; CHECK-P9-NEXT: xxswapd v3, vs0 827; CHECK-P9-NEXT: xxswapd vs0, v2 828; CHECK-P9-NEXT: xscvspdpn f0, vs0 829; CHECK-P9-NEXT: xscvdpsxws f0, f0 830; CHECK-P9-NEXT: mfvsrwz r3, f0 831; CHECK-P9-NEXT: mtvsrd f0, r3 832; CHECK-P9-NEXT: xxswapd v4, vs0 833; CHECK-P9-NEXT: xscvspdpn f0, v2 834; CHECK-P9-NEXT: xscvdpsxws f0, f0 835; CHECK-P9-NEXT: mfvsrwz r3, f0 836; CHECK-P9-NEXT: mtvsrd f0, r3 837; CHECK-P9-NEXT: vmrglh v3, v4, v3 838; CHECK-P9-NEXT: xxswapd v4, vs0 839; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1 840; CHECK-P9-NEXT: xscvspdpn f0, vs0 841; CHECK-P9-NEXT: xscvdpsxws f0, f0 842; CHECK-P9-NEXT: mfvsrwz r3, f0 843; CHECK-P9-NEXT: mtvsrd f0, r3 844; CHECK-P9-NEXT: xxswapd v2, vs0 845; CHECK-P9-NEXT: vmrglh v2, v4, v2 846; CHECK-P9-NEXT: vmrglw v2, v2, v3 847; CHECK-P9-NEXT: mfvsrld r3, v2 848; CHECK-P9-NEXT: blr 849; 850; CHECK-BE-LABEL: test4elt_signed: 851; CHECK-BE: # %bb.0: # %entry 852; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3 853; CHECK-BE-NEXT: xscvspdpn f0, vs0 854; CHECK-BE-NEXT: xscvdpsxws f0, f0 855; CHECK-BE-NEXT: mfvsrwz r3, f0 856; CHECK-BE-NEXT: xxswapd vs0, v2 857; CHECK-BE-NEXT: sldi r3, r3, 48 858; CHECK-BE-NEXT: xscvspdpn f0, vs0 859; CHECK-BE-NEXT: mtvsrd v3, r3 860; CHECK-BE-NEXT: xscvdpsxws f0, f0 861; CHECK-BE-NEXT: mfvsrwz r3, f0 862; CHECK-BE-NEXT: xscvspdpn f0, v2 863; CHECK-BE-NEXT: sldi r3, r3, 48 864; CHECK-BE-NEXT: xscvdpsxws f0, f0 865; CHECK-BE-NEXT: mtvsrd v4, r3 866; CHECK-BE-NEXT: vmrghh v3, v4, v3 867; CHECK-BE-NEXT: mfvsrwz r3, f0 868; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1 869; CHECK-BE-NEXT: sldi r3, r3, 48 870; CHECK-BE-NEXT: xscvspdpn f0, vs0 871; CHECK-BE-NEXT: mtvsrd v4, r3 872; CHECK-BE-NEXT: xscvdpsxws f0, f0 873; CHECK-BE-NEXT: mfvsrwz r3, f0 874; CHECK-BE-NEXT: sldi r3, r3, 48 875; CHECK-BE-NEXT: mtvsrd v2, r3 876; CHECK-BE-NEXT: vmrghh v2, v4, v2 877; CHECK-BE-NEXT: vmrghw v2, v2, v3 878; CHECK-BE-NEXT: mfvsrd r3, v2 879; CHECK-BE-NEXT: blr 880entry: 881 %0 = fptosi <4 x float> %a to <4 x i16> 882 %1 = bitcast <4 x i16> %0 to i64 883 ret i64 %1 884} 885 886define <8 x i16> @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 { 887; CHECK-P8-LABEL: test8elt_signed: 888; CHECK-P8: # %bb.0: # %entry 889; CHECK-P8-NEXT: lvx v2, 0, r3 890; CHECK-P8-NEXT: li r4, 16 891; CHECK-P8-NEXT: lvx v5, r3, r4 892; CHECK-P8-NEXT: xxswapd vs1, v2 893; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3 894; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3 895; CHECK-P8-NEXT: xscvspdpn f4, v5 896; CHECK-P8-NEXT: xxswapd vs3, v5 897; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1 898; CHECK-P8-NEXT: xscvspdpn f1, vs1 899; CHECK-P8-NEXT: xscvspdpn f0, vs0 900; CHECK-P8-NEXT: xscvspdpn f2, vs2 901; CHECK-P8-NEXT: xscvspdpn f3, vs3 902; CHECK-P8-NEXT: xscvspdpn f5, vs5 903; CHECK-P8-NEXT: xscvdpsxws f4, f4 904; CHECK-P8-NEXT: xscvdpsxws f1, f1 905; CHECK-P8-NEXT: xscvdpsxws f0, f0 906; CHECK-P8-NEXT: xscvdpsxws f2, f2 907; CHECK-P8-NEXT: xscvdpsxws f3, f3 908; CHECK-P8-NEXT: xscvdpsxws f5, f5 909; CHECK-P8-NEXT: mfvsrwz r4, f4 910; CHECK-P8-NEXT: mfvsrwz r6, f1 911; CHECK-P8-NEXT: mfvsrwz r5, f0 912; CHECK-P8-NEXT: mtvsrd f1, r6 913; CHECK-P8-NEXT: mtvsrd f0, r5 914; CHECK-P8-NEXT: xxswapd v4, vs1 915; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1 916; CHECK-P8-NEXT: xxswapd v3, vs0 917; CHECK-P8-NEXT: xscvspdpn f0, v2 918; CHECK-P8-NEXT: mtvsrd f4, r4 919; CHECK-P8-NEXT: xscvspdpn f1, vs1 920; CHECK-P8-NEXT: mfvsrwz r4, f2 921; CHECK-P8-NEXT: xxswapd v1, vs4 922; CHECK-P8-NEXT: vmrglh v2, v4, v3 923; CHECK-P8-NEXT: mtvsrd f2, r4 924; CHECK-P8-NEXT: xscvdpsxws f0, f0 925; CHECK-P8-NEXT: mfvsrwz r4, f5 926; CHECK-P8-NEXT: xxswapd v5, vs2 927; CHECK-P8-NEXT: xscvdpsxws f1, f1 928; CHECK-P8-NEXT: mfvsrwz r3, f0 929; CHECK-P8-NEXT: mtvsrd f0, r3 930; CHECK-P8-NEXT: mfvsrwz r3, f1 931; CHECK-P8-NEXT: xxswapd v3, vs0 932; CHECK-P8-NEXT: mtvsrd f1, r3 933; CHECK-P8-NEXT: mfvsrwz r3, f3 934; CHECK-P8-NEXT: mtvsrd f3, r4 935; CHECK-P8-NEXT: xxswapd v4, vs1 936; CHECK-P8-NEXT: mtvsrd f0, r3 937; CHECK-P8-NEXT: xxswapd v6, vs3 938; CHECK-P8-NEXT: xxswapd v0, vs0 939; CHECK-P8-NEXT: vmrglh v3, v3, v4 940; CHECK-P8-NEXT: vmrglh v4, v0, v5 941; CHECK-P8-NEXT: vmrglh v5, v1, v6 942; CHECK-P8-NEXT: vmrglw v2, v3, v2 943; CHECK-P8-NEXT: vmrglw v3, v5, v4 944; CHECK-P8-NEXT: xxmrgld v2, v3, v2 945; CHECK-P8-NEXT: blr 946; 947; CHECK-P9-LABEL: test8elt_signed: 948; CHECK-P9: # %bb.0: # %entry 949; CHECK-P9-NEXT: lxv vs1, 0(r3) 950; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3 951; CHECK-P9-NEXT: xscvspdpn f2, vs2 952; CHECK-P9-NEXT: xscvdpsxws f2, f2 953; CHECK-P9-NEXT: lxv vs0, 16(r3) 954; CHECK-P9-NEXT: mfvsrwz r3, f2 955; CHECK-P9-NEXT: mtvsrd f2, r3 956; CHECK-P9-NEXT: xxswapd v2, vs2 957; CHECK-P9-NEXT: xxswapd vs2, vs1 958; CHECK-P9-NEXT: xscvspdpn f2, vs2 959; CHECK-P9-NEXT: xscvdpsxws f2, f2 960; CHECK-P9-NEXT: mfvsrwz r3, f2 961; CHECK-P9-NEXT: mtvsrd f2, r3 962; CHECK-P9-NEXT: xxswapd v3, vs2 963; CHECK-P9-NEXT: xscvspdpn f2, vs1 964; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1 965; CHECK-P9-NEXT: xscvspdpn f1, vs1 966; CHECK-P9-NEXT: xscvdpsxws f2, f2 967; CHECK-P9-NEXT: xscvdpsxws f1, f1 968; CHECK-P9-NEXT: mfvsrwz r3, f2 969; CHECK-P9-NEXT: mtvsrd f2, r3 970; CHECK-P9-NEXT: mfvsrwz r3, f1 971; CHECK-P9-NEXT: mtvsrd f1, r3 972; CHECK-P9-NEXT: xxswapd v4, vs1 973; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3 974; CHECK-P9-NEXT: xscvspdpn f1, vs1 975; CHECK-P9-NEXT: xscvdpsxws f1, f1 976; CHECK-P9-NEXT: vmrglh v2, v3, v2 977; CHECK-P9-NEXT: xxswapd v3, vs2 978; CHECK-P9-NEXT: vmrglh v3, v3, v4 979; CHECK-P9-NEXT: vmrglw v2, v3, v2 980; CHECK-P9-NEXT: mfvsrwz r3, f1 981; CHECK-P9-NEXT: mtvsrd f1, r3 982; CHECK-P9-NEXT: xxswapd v3, vs1 983; CHECK-P9-NEXT: xxswapd vs1, vs0 984; CHECK-P9-NEXT: xscvspdpn f1, vs1 985; CHECK-P9-NEXT: xscvdpsxws f1, f1 986; CHECK-P9-NEXT: mfvsrwz r3, f1 987; CHECK-P9-NEXT: mtvsrd f1, r3 988; CHECK-P9-NEXT: xxswapd v4, vs1 989; CHECK-P9-NEXT: xscvspdpn f1, vs0 990; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1 991; CHECK-P9-NEXT: xscvspdpn f0, vs0 992; CHECK-P9-NEXT: xscvdpsxws f1, f1 993; CHECK-P9-NEXT: xscvdpsxws f0, f0 994; CHECK-P9-NEXT: mfvsrwz r3, f1 995; CHECK-P9-NEXT: mtvsrd f1, r3 996; CHECK-P9-NEXT: mfvsrwz r3, f0 997; CHECK-P9-NEXT: mtvsrd f0, r3 998; CHECK-P9-NEXT: vmrglh v3, v4, v3 999; CHECK-P9-NEXT: xxswapd v4, vs1 1000; CHECK-P9-NEXT: xxswapd v5, vs0 1001; CHECK-P9-NEXT: vmrglh v4, v4, v5 1002; CHECK-P9-NEXT: vmrglw v3, v4, v3 1003; CHECK-P9-NEXT: xxmrgld v2, v3, v2 1004; CHECK-P9-NEXT: blr 1005; 1006; CHECK-BE-LABEL: test8elt_signed: 1007; CHECK-BE: # %bb.0: # %entry 1008; CHECK-BE-NEXT: lxv vs1, 16(r3) 1009; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 1010; CHECK-BE-NEXT: xscvspdpn f2, vs2 1011; CHECK-BE-NEXT: xscvdpsxws f2, f2 1012; CHECK-BE-NEXT: lxv vs0, 0(r3) 1013; CHECK-BE-NEXT: mfvsrwz r3, f2 1014; CHECK-BE-NEXT: xxswapd vs2, vs1 1015; CHECK-BE-NEXT: sldi r3, r3, 48 1016; CHECK-BE-NEXT: xscvspdpn f2, vs2 1017; CHECK-BE-NEXT: mtvsrd v2, r3 1018; CHECK-BE-NEXT: xscvdpsxws f2, f2 1019; CHECK-BE-NEXT: mfvsrwz r3, f2 1020; CHECK-BE-NEXT: xscvspdpn f2, vs1 1021; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 1022; CHECK-BE-NEXT: sldi r3, r3, 48 1023; CHECK-BE-NEXT: xscvdpsxws f2, f2 1024; CHECK-BE-NEXT: xscvspdpn f1, vs1 1025; CHECK-BE-NEXT: mtvsrd v3, r3 1026; CHECK-BE-NEXT: xscvdpsxws f1, f1 1027; CHECK-BE-NEXT: vmrghh v2, v3, v2 1028; CHECK-BE-NEXT: mfvsrwz r3, f2 1029; CHECK-BE-NEXT: sldi r3, r3, 48 1030; CHECK-BE-NEXT: mtvsrd v3, r3 1031; CHECK-BE-NEXT: mfvsrwz r3, f1 1032; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3 1033; CHECK-BE-NEXT: sldi r3, r3, 48 1034; CHECK-BE-NEXT: xscvspdpn f1, vs1 1035; CHECK-BE-NEXT: mtvsrd v4, r3 1036; CHECK-BE-NEXT: xscvdpsxws f1, f1 1037; CHECK-BE-NEXT: mfvsrwz r3, f1 1038; CHECK-BE-NEXT: xxswapd vs1, vs0 1039; CHECK-BE-NEXT: xscvspdpn f1, vs1 1040; CHECK-BE-NEXT: xscvdpsxws f1, f1 1041; CHECK-BE-NEXT: vmrghh v3, v3, v4 1042; CHECK-BE-NEXT: sldi r3, r3, 48 1043; CHECK-BE-NEXT: vmrghw v2, v3, v2 1044; CHECK-BE-NEXT: mtvsrd v3, r3 1045; CHECK-BE-NEXT: mfvsrwz r3, f1 1046; CHECK-BE-NEXT: xscvspdpn f1, vs0 1047; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 1048; CHECK-BE-NEXT: sldi r3, r3, 48 1049; CHECK-BE-NEXT: xscvdpsxws f1, f1 1050; CHECK-BE-NEXT: xscvspdpn f0, vs0 1051; CHECK-BE-NEXT: mtvsrd v4, r3 1052; CHECK-BE-NEXT: xscvdpsxws f0, f0 1053; CHECK-BE-NEXT: vmrghh v3, v4, v3 1054; CHECK-BE-NEXT: mfvsrwz r3, f1 1055; CHECK-BE-NEXT: sldi r3, r3, 48 1056; CHECK-BE-NEXT: mtvsrd v4, r3 1057; CHECK-BE-NEXT: mfvsrwz r3, f0 1058; CHECK-BE-NEXT: sldi r3, r3, 48 1059; CHECK-BE-NEXT: mtvsrd v5, r3 1060; CHECK-BE-NEXT: vmrghh v4, v4, v5 1061; CHECK-BE-NEXT: vmrghw v3, v4, v3 1062; CHECK-BE-NEXT: xxmrghd v2, v3, v2 1063; CHECK-BE-NEXT: blr 1064entry: 1065 %a = load <8 x float>, <8 x float>* %0, align 32 1066 %1 = fptosi <8 x float> %a to <8 x i16> 1067 ret <8 x i16> %1 1068} 1069 1070define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 { 1071; CHECK-P8-LABEL: test16elt_signed: 1072; CHECK-P8: # %bb.0: # %entry 1073; CHECK-P8-NEXT: lvx v5, 0, r4 1074; CHECK-P8-NEXT: li r6, 32 1075; CHECK-P8-NEXT: li r5, 16 1076; CHECK-P8-NEXT: lvx v2, r4, r6 1077; CHECK-P8-NEXT: lvx v3, r4, r5 1078; CHECK-P8-NEXT: li r6, 48 1079; CHECK-P8-NEXT: xscvspdpn f0, v5 1080; CHECK-P8-NEXT: xxsldwi vs1, v5, v5, 3 1081; CHECK-P8-NEXT: lvx v4, r4, r6 1082; CHECK-P8-NEXT: xscvspdpn f4, v2 1083; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1 1084; CHECK-P8-NEXT: xscvspdpn f2, v3 1085; CHECK-P8-NEXT: xxswapd vs3, v5 1086; CHECK-P8-NEXT: xscvspdpn f1, vs1 1087; CHECK-P8-NEXT: xxswapd vs8, v3 1088; CHECK-P8-NEXT: xscvspdpn f6, v4 1089; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 3 1090; CHECK-P8-NEXT: xscvspdpn f5, vs5 1091; CHECK-P8-NEXT: xxsldwi vs10, v2, v2, 3 1092; CHECK-P8-NEXT: xscvdpsxws f0, f0 1093; CHECK-P8-NEXT: xxsldwi vs9, v3, v3, 1 1094; CHECK-P8-NEXT: xscvspdpn f3, vs3 1095; CHECK-P8-NEXT: xxsldwi vs12, v2, v2, 1 1096; CHECK-P8-NEXT: xscvspdpn f8, vs8 1097; CHECK-P8-NEXT: xxswapd vs11, v2 1098; CHECK-P8-NEXT: xscvdpsxws f4, f4 1099; CHECK-P8-NEXT: xxswapd v2, v4 1100; CHECK-P8-NEXT: xscvspdpn f7, vs7 1101; CHECK-P8-NEXT: xxsldwi vs13, v4, v4, 3 1102; CHECK-P8-NEXT: xscvdpsxws f2, f2 1103; CHECK-P8-NEXT: xxsldwi v3, v4, v4, 1 1104; CHECK-P8-NEXT: xscvspdpn f10, vs10 1105; CHECK-P8-NEXT: xscvdpsxws f1, f1 1106; CHECK-P8-NEXT: xscvspdpn f9, vs9 1107; CHECK-P8-NEXT: xscvdpsxws f6, f6 1108; CHECK-P8-NEXT: xscvspdpn f12, vs12 1109; CHECK-P8-NEXT: xscvdpsxws f5, f5 1110; CHECK-P8-NEXT: mfvsrwz r4, f0 1111; CHECK-P8-NEXT: xscvspdpn f11, vs11 1112; CHECK-P8-NEXT: xscvdpsxws f3, f3 1113; CHECK-P8-NEXT: xscvspdpn v2, v2 1114; CHECK-P8-NEXT: xscvdpsxws f8, f8 1115; CHECK-P8-NEXT: mtvsrd f0, r4 1116; CHECK-P8-NEXT: mfvsrwz r4, f4 1117; CHECK-P8-NEXT: xscvdpsxws f7, f7 1118; CHECK-P8-NEXT: mfvsrwz r6, f2 1119; CHECK-P8-NEXT: xscvspdpn f13, vs13 1120; CHECK-P8-NEXT: xscvspdpn v3, v3 1121; CHECK-P8-NEXT: xscvdpsxws f10, f10 1122; CHECK-P8-NEXT: mtvsrd f4, r4 1123; CHECK-P8-NEXT: mfvsrwz r4, f1 1124; CHECK-P8-NEXT: xscvdpsxws f9, f9 1125; CHECK-P8-NEXT: mtvsrd f2, r6 1126; CHECK-P8-NEXT: mfvsrwz r6, f6 1127; CHECK-P8-NEXT: xscvdpsxws f12, f12 1128; CHECK-P8-NEXT: mtvsrd f1, r4 1129; CHECK-P8-NEXT: mfvsrwz r4, f5 1130; CHECK-P8-NEXT: xscvdpsxws f11, f11 1131; CHECK-P8-NEXT: xxswapd v4, vs1 1132; CHECK-P8-NEXT: mtvsrd f6, r6 1133; CHECK-P8-NEXT: mfvsrwz r6, f3 1134; CHECK-P8-NEXT: xscvdpsxws v2, v2 1135; CHECK-P8-NEXT: xxswapd v9, vs6 1136; CHECK-P8-NEXT: mtvsrd f5, r4 1137; CHECK-P8-NEXT: mfvsrwz r4, f8 1138; CHECK-P8-NEXT: mtvsrd f3, r6 1139; CHECK-P8-NEXT: xxswapd v0, vs5 1140; CHECK-P8-NEXT: mfvsrwz r6, f7 1141; CHECK-P8-NEXT: xscvdpsxws f13, f13 1142; CHECK-P8-NEXT: xxswapd v5, vs3 1143; CHECK-P8-NEXT: xscvdpsxws v3, v3 1144; CHECK-P8-NEXT: mtvsrd f8, r4 1145; CHECK-P8-NEXT: mfvsrwz r4, f10 1146; CHECK-P8-NEXT: mtvsrd f7, r6 1147; CHECK-P8-NEXT: mfvsrwz r6, f9 1148; CHECK-P8-NEXT: mtvsrd f10, r4 1149; CHECK-P8-NEXT: mfvsrwz r4, f12 1150; CHECK-P8-NEXT: mtvsrd f9, r6 1151; CHECK-P8-NEXT: xxswapd v6, vs10 1152; CHECK-P8-NEXT: mfvsrwz r6, f11 1153; CHECK-P8-NEXT: mtvsrd f12, r4 1154; CHECK-P8-NEXT: xxswapd v1, vs9 1155; CHECK-P8-NEXT: mfvsrwz r4, v2 1156; CHECK-P8-NEXT: xxswapd v2, vs0 1157; CHECK-P8-NEXT: mtvsrd f11, r6 1158; CHECK-P8-NEXT: mfvsrwz r6, f13 1159; CHECK-P8-NEXT: mtvsrd f0, r4 1160; CHECK-P8-NEXT: xxswapd v7, vs11 1161; CHECK-P8-NEXT: mfvsrwz r4, v3 1162; CHECK-P8-NEXT: vmrglh v3, v5, v4 1163; CHECK-P8-NEXT: xxswapd v4, vs7 1164; CHECK-P8-NEXT: vmrglh v2, v2, v0 1165; CHECK-P8-NEXT: xxswapd v5, vs8 1166; CHECK-P8-NEXT: xxswapd v0, vs2 1167; CHECK-P8-NEXT: mtvsrd f13, r6 1168; CHECK-P8-NEXT: mtvsrd f1, r4 1169; CHECK-P8-NEXT: xxswapd v8, vs0 1170; CHECK-P8-NEXT: vmrglh v4, v5, v4 1171; CHECK-P8-NEXT: vmrglh v5, v0, v1 1172; CHECK-P8-NEXT: xxswapd v1, vs4 1173; CHECK-P8-NEXT: vmrglh v0, v7, v6 1174; CHECK-P8-NEXT: xxswapd v6, vs12 1175; CHECK-P8-NEXT: xxswapd v7, vs13 1176; CHECK-P8-NEXT: xxswapd v10, vs1 1177; CHECK-P8-NEXT: vmrglw v2, v2, v3 1178; CHECK-P8-NEXT: vmrglh v1, v1, v6 1179; CHECK-P8-NEXT: vmrglh v6, v8, v7 1180; CHECK-P8-NEXT: vmrglh v7, v9, v10 1181; CHECK-P8-NEXT: vmrglw v3, v5, v4 1182; CHECK-P8-NEXT: vmrglw v4, v1, v0 1183; CHECK-P8-NEXT: vmrglw v5, v7, v6 1184; CHECK-P8-NEXT: xxmrgld v2, v3, v2 1185; CHECK-P8-NEXT: stvx v2, 0, r3 1186; CHECK-P8-NEXT: xxmrgld v3, v5, v4 1187; CHECK-P8-NEXT: stvx v3, r3, r5 1188; CHECK-P8-NEXT: blr 1189; 1190; CHECK-P9-LABEL: test16elt_signed: 1191; CHECK-P9: # %bb.0: # %entry 1192; CHECK-P9-NEXT: lxv vs1, 0(r4) 1193; CHECK-P9-NEXT: lxv vs3, 16(r4) 1194; CHECK-P9-NEXT: xscvspdpn f5, vs1 1195; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3 1196; CHECK-P9-NEXT: xscvspdpn f8, vs3 1197; CHECK-P9-NEXT: xxswapd vs4, vs1 1198; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1 1199; CHECK-P9-NEXT: xscvspdpn f4, vs4 1200; CHECK-P9-NEXT: xscvdpsxws f5, f5 1201; CHECK-P9-NEXT: xscvspdpn f2, vs2 1202; CHECK-P9-NEXT: xscvdpsxws f8, f8 1203; CHECK-P9-NEXT: xxsldwi vs6, vs3, vs3, 3 1204; CHECK-P9-NEXT: xxswapd vs7, vs3 1205; CHECK-P9-NEXT: xscvspdpn f6, vs6 1206; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1 1207; CHECK-P9-NEXT: xscvspdpn f7, vs7 1208; CHECK-P9-NEXT: xscvspdpn f3, vs3 1209; CHECK-P9-NEXT: xscvdpsxws f2, f2 1210; CHECK-P9-NEXT: xscvspdpn f1, vs1 1211; CHECK-P9-NEXT: xscvdpsxws f4, f4 1212; CHECK-P9-NEXT: xscvdpsxws f6, f6 1213; CHECK-P9-NEXT: mfvsrwz r5, f5 1214; CHECK-P9-NEXT: xscvdpsxws f1, f1 1215; CHECK-P9-NEXT: xscvdpsxws f7, f7 1216; CHECK-P9-NEXT: xscvdpsxws f3, f3 1217; CHECK-P9-NEXT: mtvsrd f5, r5 1218; CHECK-P9-NEXT: mfvsrwz r5, f8 1219; CHECK-P9-NEXT: mtvsrd f8, r5 1220; CHECK-P9-NEXT: mfvsrwz r5, f2 1221; CHECK-P9-NEXT: lxv vs0, 32(r4) 1222; CHECK-P9-NEXT: xxsldwi vs9, vs0, vs0, 3 1223; CHECK-P9-NEXT: xxswapd vs10, vs0 1224; CHECK-P9-NEXT: xscvspdpn f9, vs9 1225; CHECK-P9-NEXT: xscvspdpn f10, vs10 1226; CHECK-P9-NEXT: xscvdpsxws f9, f9 1227; CHECK-P9-NEXT: xscvdpsxws f10, f10 1228; CHECK-P9-NEXT: mtvsrd f2, r5 1229; CHECK-P9-NEXT: mfvsrwz r5, f4 1230; CHECK-P9-NEXT: mtvsrd f4, r5 1231; CHECK-P9-NEXT: mfvsrwz r5, f1 1232; CHECK-P9-NEXT: mtvsrd f1, r5 1233; CHECK-P9-NEXT: mfvsrwz r5, f6 1234; CHECK-P9-NEXT: xxswapd v2, vs2 1235; CHECK-P9-NEXT: xxswapd v3, vs4 1236; CHECK-P9-NEXT: xscvspdpn f2, vs0 1237; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1 1238; CHECK-P9-NEXT: xscvspdpn f0, vs0 1239; CHECK-P9-NEXT: xscvdpsxws f2, f2 1240; CHECK-P9-NEXT: mtvsrd f6, r5 1241; CHECK-P9-NEXT: mfvsrwz r5, f7 1242; CHECK-P9-NEXT: xxswapd v4, vs1 1243; CHECK-P9-NEXT: lxv vs1, 48(r4) 1244; CHECK-P9-NEXT: vmrglh v2, v3, v2 1245; CHECK-P9-NEXT: xxswapd v3, vs5 1246; CHECK-P9-NEXT: mtvsrd f7, r5 1247; CHECK-P9-NEXT: mfvsrwz r5, f3 1248; CHECK-P9-NEXT: vmrglh v3, v3, v4 1249; CHECK-P9-NEXT: xxswapd v4, vs6 1250; CHECK-P9-NEXT: xxswapd v5, vs7 1251; CHECK-P9-NEXT: mtvsrd f3, r5 1252; CHECK-P9-NEXT: xscvdpsxws f0, f0 1253; CHECK-P9-NEXT: xxswapd v0, vs3 1254; CHECK-P9-NEXT: vmrglh v4, v5, v4 1255; CHECK-P9-NEXT: xxswapd v5, vs8 1256; CHECK-P9-NEXT: vmrglh v5, v5, v0 1257; CHECK-P9-NEXT: mfvsrwz r4, f2 1258; CHECK-P9-NEXT: mtvsrd f2, r4 1259; CHECK-P9-NEXT: mfvsrwz r4, f0 1260; CHECK-P9-NEXT: vmrglw v2, v3, v2 1261; CHECK-P9-NEXT: mtvsrd f0, r4 1262; CHECK-P9-NEXT: vmrglw v3, v5, v4 1263; CHECK-P9-NEXT: xxswapd v4, vs2 1264; CHECK-P9-NEXT: xxmrgld vs2, v3, v2 1265; CHECK-P9-NEXT: xxswapd v2, vs0 1266; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3 1267; CHECK-P9-NEXT: xscvspdpn f0, vs0 1268; CHECK-P9-NEXT: xscvdpsxws f0, f0 1269; CHECK-P9-NEXT: mfvsrwz r4, f0 1270; CHECK-P9-NEXT: mtvsrd f0, r4 1271; CHECK-P9-NEXT: xxswapd v3, vs0 1272; CHECK-P9-NEXT: xxswapd vs0, vs1 1273; CHECK-P9-NEXT: xscvspdpn f0, vs0 1274; CHECK-P9-NEXT: xscvdpsxws f0, f0 1275; CHECK-P9-NEXT: mfvsrwz r4, f0 1276; CHECK-P9-NEXT: mtvsrd f0, r4 1277; CHECK-P9-NEXT: vmrglh v2, v4, v2 1278; CHECK-P9-NEXT: xxswapd v4, vs0 1279; CHECK-P9-NEXT: xscvspdpn f0, vs1 1280; CHECK-P9-NEXT: xscvdpsxws f0, f0 1281; CHECK-P9-NEXT: mfvsrwz r4, f0 1282; CHECK-P9-NEXT: mtvsrd f0, r4 1283; CHECK-P9-NEXT: vmrglh v3, v4, v3 1284; CHECK-P9-NEXT: xxswapd v4, vs0 1285; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1 1286; CHECK-P9-NEXT: xscvspdpn f0, vs0 1287; CHECK-P9-NEXT: xscvdpsxws f0, f0 1288; CHECK-P9-NEXT: mfvsrwz r5, f9 1289; CHECK-P9-NEXT: mtvsrd f9, r5 1290; CHECK-P9-NEXT: mfvsrwz r5, f10 1291; CHECK-P9-NEXT: mtvsrd f10, r5 1292; CHECK-P9-NEXT: xxswapd v0, vs9 1293; CHECK-P9-NEXT: xxswapd v1, vs10 1294; CHECK-P9-NEXT: vmrglh v0, v1, v0 1295; CHECK-P9-NEXT: vmrglw v2, v2, v0 1296; CHECK-P9-NEXT: stxv vs2, 0(r3) 1297; CHECK-P9-NEXT: mfvsrwz r4, f0 1298; CHECK-P9-NEXT: mtvsrd f0, r4 1299; CHECK-P9-NEXT: xxswapd v5, vs0 1300; CHECK-P9-NEXT: vmrglh v4, v4, v5 1301; CHECK-P9-NEXT: vmrglw v3, v4, v3 1302; CHECK-P9-NEXT: xxmrgld vs0, v3, v2 1303; CHECK-P9-NEXT: stxv vs0, 16(r3) 1304; CHECK-P9-NEXT: blr 1305; 1306; CHECK-BE-LABEL: test16elt_signed: 1307; CHECK-BE: # %bb.0: # %entry 1308; CHECK-BE-NEXT: lxv vs1, 16(r4) 1309; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 1310; CHECK-BE-NEXT: xscvspdpn f2, vs2 1311; CHECK-BE-NEXT: xxswapd vs3, vs1 1312; CHECK-BE-NEXT: xscvspdpn f3, vs3 1313; CHECK-BE-NEXT: xscvdpsxws f2, f2 1314; CHECK-BE-NEXT: xscvdpsxws f3, f3 1315; CHECK-BE-NEXT: mfvsrwz r5, f2 1316; CHECK-BE-NEXT: xscvspdpn f4, vs1 1317; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 1318; CHECK-BE-NEXT: xscvspdpn f1, vs1 1319; CHECK-BE-NEXT: xscvdpsxws f1, f1 1320; CHECK-BE-NEXT: sldi r5, r5, 48 1321; CHECK-BE-NEXT: mtvsrd v2, r5 1322; CHECK-BE-NEXT: mfvsrwz r5, f3 1323; CHECK-BE-NEXT: xscvdpsxws f3, f4 1324; CHECK-BE-NEXT: lxv vs0, 0(r4) 1325; CHECK-BE-NEXT: xxsldwi vs2, vs0, vs0, 3 1326; CHECK-BE-NEXT: xscvspdpn f2, vs2 1327; CHECK-BE-NEXT: sldi r5, r5, 48 1328; CHECK-BE-NEXT: mtvsrd v3, r5 1329; CHECK-BE-NEXT: vmrghh v2, v3, v2 1330; CHECK-BE-NEXT: mfvsrwz r5, f3 1331; CHECK-BE-NEXT: sldi r5, r5, 48 1332; CHECK-BE-NEXT: mtvsrd v3, r5 1333; CHECK-BE-NEXT: mfvsrwz r5, f1 1334; CHECK-BE-NEXT: xxswapd vs1, vs0 1335; CHECK-BE-NEXT: xscvdpsxws f2, f2 1336; CHECK-BE-NEXT: sldi r5, r5, 48 1337; CHECK-BE-NEXT: xscvspdpn f1, vs1 1338; CHECK-BE-NEXT: mtvsrd v4, r5 1339; CHECK-BE-NEXT: mfvsrwz r5, f2 1340; CHECK-BE-NEXT: xscvdpsxws f1, f1 1341; CHECK-BE-NEXT: sldi r5, r5, 48 1342; CHECK-BE-NEXT: vmrghh v3, v3, v4 1343; CHECK-BE-NEXT: mtvsrd v4, r5 1344; CHECK-BE-NEXT: vmrghw v2, v3, v2 1345; CHECK-BE-NEXT: mfvsrwz r5, f1 1346; CHECK-BE-NEXT: xscvspdpn f1, vs0 1347; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 1348; CHECK-BE-NEXT: sldi r5, r5, 48 1349; CHECK-BE-NEXT: xscvdpsxws f1, f1 1350; CHECK-BE-NEXT: xscvspdpn f0, vs0 1351; CHECK-BE-NEXT: mtvsrd v5, r5 1352; CHECK-BE-NEXT: xscvdpsxws f0, f0 1353; CHECK-BE-NEXT: vmrghh v4, v5, v4 1354; CHECK-BE-NEXT: mfvsrwz r5, f1 1355; CHECK-BE-NEXT: lxv vs1, 48(r4) 1356; CHECK-BE-NEXT: sldi r5, r5, 48 1357; CHECK-BE-NEXT: mtvsrd v5, r5 1358; CHECK-BE-NEXT: mfvsrwz r5, f0 1359; CHECK-BE-NEXT: lxv vs0, 32(r4) 1360; CHECK-BE-NEXT: xscvspdpn f5, vs1 1361; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3 1362; CHECK-BE-NEXT: xscvspdpn f2, vs2 1363; CHECK-BE-NEXT: xscvdpsxws f5, f5 1364; CHECK-BE-NEXT: sldi r5, r5, 48 1365; CHECK-BE-NEXT: xxswapd vs3, vs1 1366; CHECK-BE-NEXT: mtvsrd v0, r5 1367; CHECK-BE-NEXT: vmrghh v5, v5, v0 1368; CHECK-BE-NEXT: xscvspdpn f3, vs3 1369; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1 1370; CHECK-BE-NEXT: xscvspdpn f1, vs1 1371; CHECK-BE-NEXT: xscvdpsxws f2, f2 1372; CHECK-BE-NEXT: vmrghw v3, v5, v4 1373; CHECK-BE-NEXT: xscvdpsxws f3, f3 1374; CHECK-BE-NEXT: mfvsrwz r4, f5 1375; CHECK-BE-NEXT: xxmrghd vs4, v3, v2 1376; CHECK-BE-NEXT: sldi r4, r4, 48 1377; CHECK-BE-NEXT: mtvsrd v2, r4 1378; CHECK-BE-NEXT: mfvsrwz r4, f2 1379; CHECK-BE-NEXT: xscvdpsxws f1, f1 1380; CHECK-BE-NEXT: stxv vs4, 0(r3) 1381; CHECK-BE-NEXT: sldi r4, r4, 48 1382; CHECK-BE-NEXT: mtvsrd v3, r4 1383; CHECK-BE-NEXT: mfvsrwz r4, f3 1384; CHECK-BE-NEXT: sldi r4, r4, 48 1385; CHECK-BE-NEXT: mtvsrd v4, r4 1386; CHECK-BE-NEXT: mfvsrwz r4, f1 1387; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3 1388; CHECK-BE-NEXT: sldi r4, r4, 48 1389; CHECK-BE-NEXT: xscvspdpn f1, vs1 1390; CHECK-BE-NEXT: xscvdpsxws f1, f1 1391; CHECK-BE-NEXT: vmrghh v3, v4, v3 1392; CHECK-BE-NEXT: mtvsrd v4, r4 1393; CHECK-BE-NEXT: mfvsrwz r4, f1 1394; CHECK-BE-NEXT: xxswapd vs1, vs0 1395; CHECK-BE-NEXT: xscvspdpn f1, vs1 1396; CHECK-BE-NEXT: xscvdpsxws f1, f1 1397; CHECK-BE-NEXT: vmrghh v2, v2, v4 1398; CHECK-BE-NEXT: sldi r4, r4, 48 1399; CHECK-BE-NEXT: vmrghw v2, v2, v3 1400; CHECK-BE-NEXT: mtvsrd v3, r4 1401; CHECK-BE-NEXT: mfvsrwz r4, f1 1402; CHECK-BE-NEXT: xscvspdpn f1, vs0 1403; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1 1404; CHECK-BE-NEXT: sldi r4, r4, 48 1405; CHECK-BE-NEXT: xscvdpsxws f1, f1 1406; CHECK-BE-NEXT: xscvspdpn f0, vs0 1407; CHECK-BE-NEXT: mtvsrd v4, r4 1408; CHECK-BE-NEXT: xscvdpsxws f0, f0 1409; CHECK-BE-NEXT: vmrghh v3, v4, v3 1410; CHECK-BE-NEXT: mfvsrwz r4, f1 1411; CHECK-BE-NEXT: sldi r4, r4, 48 1412; CHECK-BE-NEXT: mtvsrd v4, r4 1413; CHECK-BE-NEXT: mfvsrwz r4, f0 1414; CHECK-BE-NEXT: sldi r4, r4, 48 1415; CHECK-BE-NEXT: mtvsrd v5, r4 1416; CHECK-BE-NEXT: vmrghh v4, v4, v5 1417; CHECK-BE-NEXT: vmrghw v3, v4, v3 1418; CHECK-BE-NEXT: xxmrghd vs0, v3, v2 1419; CHECK-BE-NEXT: stxv vs0, 16(r3) 1420; CHECK-BE-NEXT: blr 1421entry: 1422 %a = load <16 x float>, <16 x float>* %0, align 64 1423 %1 = fptosi <16 x float> %a to <16 x i16> 1424 store <16 x i16> %1, <16 x i16>* %agg.result, align 32 1425 ret void 1426} 1427