1 /***************************************************************************
2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
3  *   ben@fluff.org                                                         *
4  *                                                                         *
5  *   This program is free software; you can redistribute it and/or modify  *
6  *   it under the terms of the GNU General Public License as published by  *
7  *   the Free Software Foundation; either version 2 of the License, or     *
8  *   (at your option) any later version.                                   *
9  *                                                                         *
10  *   This program is distributed in the hope that it will be useful,       *
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
13  *   GNU General Public License for more details.                          *
14  *                                                                         *
15  *   You should have received a copy of the GNU General Public License     *
16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
17  ***************************************************************************/
18 
19 /*
20  * S3C2412 OpenOCD NAND Flash controller support.
21  *
22  * Many thanks to Simtec Electronics for sponsoring this work.
23  */
24 
25 #ifdef HAVE_CONFIG_H
26 #include "config.h"
27 #endif
28 
29 #include "s3c24xx.h"
30 
NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)31 NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
32 {
33 	struct s3c24xx_nand_controller *info;
34 	CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
35 
36 	/* fill in the address fields for the core device */
37 	info->cmd = S3C2440_NFCMD;
38 	info->addr = S3C2440_NFADDR;
39 	info->data = S3C2440_NFDATA;
40 	info->nfstat = S3C2412_NFSTAT;
41 
42 	return ERROR_OK;
43 }
44 
s3c2412_init(struct nand_device * nand)45 static int s3c2412_init(struct nand_device *nand)
46 {
47 	struct target *target = nand->target;
48 
49 	target_write_u32(target, S3C2410_NFCONF,
50 			 S3C2440_NFCONF_TACLS(3) |
51 			 S3C2440_NFCONF_TWRPH0(7) |
52 			 S3C2440_NFCONF_TWRPH1(7));
53 
54 	target_write_u32(target, S3C2440_NFCONT,
55 			 S3C2412_NFCONT_INIT_MAIN_ECC |
56 			 S3C2440_NFCONT_ENABLE);
57 
58 	return ERROR_OK;
59 }
60 
61 struct nand_flash_controller s3c2412_nand_controller = {
62 	.name = "s3c2412",
63 	.nand_device_command = &s3c2412_nand_device_command,
64 	.init = &s3c2412_init,
65 	.reset = &s3c24xx_reset,
66 	.command = &s3c24xx_command,
67 	.address = &s3c24xx_address,
68 	.write_data = &s3c24xx_write_data,
69 	.read_data = &s3c24xx_read_data,
70 	.write_page = s3c24xx_write_page,
71 	.read_page = s3c24xx_read_page,
72 	.write_block_data = &s3c2440_write_block_data,
73 	.read_block_data = &s3c2440_read_block_data,
74 	.nand_ready = &s3c2440_nand_ready,
75 };
76