1 /* Common hooks for AArch64.
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #define INCLUDE_STRING
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "memmodel.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32 #include "diagnostic.h"
33
34 #ifdef TARGET_BIG_ENDIAN_DEFAULT
35 #undef TARGET_DEFAULT_TARGET_FLAGS
36 #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END)
37 #endif
38
39 #undef TARGET_HANDLE_OPTION
40 #define TARGET_HANDLE_OPTION aarch64_handle_option
41
42 #undef TARGET_OPTION_OPTIMIZATION_TABLE
43 #define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table
44 #undef TARGET_OPTION_INIT_STRUCT
45 #define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct
46
47 /* Set default optimization options. */
48 static const struct default_options aarch_option_optimization_table[] =
49 {
50 /* Enable section anchors by default at -O1 or higher. */
51 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
52 /* Disable fomit-frame-pointer by default. */
53 { OPT_LEVELS_ALL, OPT_fomit_frame_pointer, NULL, 0 },
54 /* Enable -fsched-pressure by default when optimizing. */
55 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
56 /* Enable redundant extension instructions removal at -O2 and higher. */
57 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
58 #if (TARGET_DEFAULT_ASYNC_UNWIND_TABLES == 1)
59 { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
60 { OPT_LEVELS_ALL, OPT_funwind_tables, NULL, 1},
61 #endif
62 { OPT_LEVELS_NONE, 0, NULL, 0 }
63 };
64
65 /* Implement TARGET_HANDLE_OPTION.
66 This function handles the target specific options for CPU/target selection.
67
68 -mcpu=CPU is shorthand for -march=ARCH_FOR_CPU, -mtune=CPU.
69 If either of -march or -mtune is given, they override their
70 respective component of -mcpu. This logic is implemented
71 in config/aarch64/aarch64.c:aarch64_override_options. */
72
73 bool
aarch64_handle_option(struct gcc_options * opts,struct gcc_options * opts_set ATTRIBUTE_UNUSED,const struct cl_decoded_option * decoded,location_t loc ATTRIBUTE_UNUSED)74 aarch64_handle_option (struct gcc_options *opts,
75 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
76 const struct cl_decoded_option *decoded,
77 location_t loc ATTRIBUTE_UNUSED)
78 {
79 size_t code = decoded->opt_index;
80 const char *arg = decoded->arg;
81 int val = decoded->value;
82
83 switch (code)
84 {
85 case OPT_march_:
86 opts->x_aarch64_arch_string = arg;
87 return true;
88
89 case OPT_mcpu_:
90 opts->x_aarch64_cpu_string = arg;
91 return true;
92
93 case OPT_mtune_:
94 opts->x_aarch64_tune_string = arg;
95 return true;
96
97 case OPT_mgeneral_regs_only:
98 opts->x_target_flags |= MASK_GENERAL_REGS_ONLY;
99 return true;
100
101 case OPT_mfix_cortex_a53_835769:
102 opts->x_aarch64_fix_a53_err835769 = val;
103 return true;
104
105 case OPT_mstrict_align:
106 opts->x_target_flags |= MASK_STRICT_ALIGN;
107 return true;
108
109 case OPT_momit_leaf_frame_pointer:
110 opts->x_flag_omit_leaf_frame_pointer = val;
111 return true;
112
113 default:
114 return true;
115 }
116 }
117
118 /* An ISA extension in the co-processor and main instruction set space. */
119 struct aarch64_option_extension
120 {
121 const char *const name;
122 const unsigned long flag_canonical;
123 const unsigned long flags_on;
124 const unsigned long flags_off;
125 const bool is_synthetic;
126 };
127
128 /* ISA extensions in AArch64. */
129 static const struct aarch64_option_extension all_extensions[] =
130 {
131 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
132 SYNTHETIC, Z) \
133 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
134 #include "config/aarch64/aarch64-option-extensions.def"
135 {NULL, 0, 0, 0, false}
136 };
137
138 /* A copy of the ISA extensions list for AArch64 sorted by the popcount of
139 bits and extension turned on. Cached for efficiency. */
140 static struct aarch64_option_extension all_extensions_by_on[] =
141 {
142 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
143 SYNTHETIC, Z) \
144 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
145 #include "config/aarch64/aarch64-option-extensions.def"
146 {NULL, 0, 0, 0, false}
147 };
148
149 struct processor_name_to_arch
150 {
151 const std::string processor_name;
152 const enum aarch64_arch arch;
153 const unsigned long flags;
154 };
155
156 struct arch_to_arch_name
157 {
158 const enum aarch64_arch arch;
159 const std::string arch_name;
160 const unsigned long flags;
161 };
162
163 /* Map processor names to the architecture revision they implement and
164 the default set of architectural feature flags they support. */
165 static const struct processor_name_to_arch all_cores[] =
166 {
167 #define AARCH64_CORE(NAME, X, IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART, VARIANT) \
168 {NAME, AARCH64_ARCH_##ARCH_IDENT, FLAGS},
169 #include "config/aarch64/aarch64-cores.def"
170 {"generic", AARCH64_ARCH_8A, AARCH64_FL_FOR_ARCH8},
171 {"", aarch64_no_arch, 0}
172 };
173
174 /* Map architecture revisions to their string representation. */
175 static const struct arch_to_arch_name all_architectures[] =
176 {
177 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
178 {AARCH64_ARCH_##ARCH_IDENT, NAME, FLAGS},
179 #include "config/aarch64/aarch64-arches.def"
180 {aarch64_no_arch, "", 0}
181 };
182
183 /* Parse the architecture extension string STR and update ISA_FLAGS
184 with the architecture features turned on or off. Return a
185 aarch64_parse_opt_result describing the result. */
186
187 enum aarch64_parse_opt_result
aarch64_parse_extension(const char * str,unsigned long * isa_flags)188 aarch64_parse_extension (const char *str, unsigned long *isa_flags)
189 {
190 /* The extension string is parsed left to right. */
191 const struct aarch64_option_extension *opt = NULL;
192
193 /* Flag to say whether we are adding or removing an extension. */
194 int adding_ext = -1;
195
196 while (str != NULL && *str != 0)
197 {
198 const char *ext;
199 size_t len;
200
201 str++;
202 ext = strchr (str, '+');
203
204 if (ext != NULL)
205 len = ext - str;
206 else
207 len = strlen (str);
208
209 if (len >= 2 && strncmp (str, "no", 2) == 0)
210 {
211 adding_ext = 0;
212 len -= 2;
213 str += 2;
214 }
215 else if (len > 0)
216 adding_ext = 1;
217
218 if (len == 0)
219 return AARCH64_PARSE_MISSING_ARG;
220
221
222 /* Scan over the extensions table trying to find an exact match. */
223 for (opt = all_extensions; opt->name != NULL; opt++)
224 {
225 if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0)
226 {
227 /* Add or remove the extension. */
228 if (adding_ext)
229 *isa_flags |= (opt->flags_on | opt->flag_canonical);
230 else
231 *isa_flags &= ~(opt->flags_off | opt->flag_canonical);
232 break;
233 }
234 }
235
236 if (opt->name == NULL)
237 {
238 /* Extension not found in list. */
239 return AARCH64_PARSE_INVALID_FEATURE;
240 }
241
242 str = ext;
243 };
244
245 return AARCH64_PARSE_OK;
246 }
247
248 /* Comparer to sort aarch64's feature extensions by population count. Largest
249 first. */
250
251 typedef const struct aarch64_option_extension opt_ext;
252
opt_ext_cmp(const void * a,const void * b)253 int opt_ext_cmp (const void* a, const void* b)
254 {
255 opt_ext *opt_a = (opt_ext *)a;
256 opt_ext *opt_b = (opt_ext *)b;
257
258 /* We consider the total set of bits an options turns on to be the union of
259 the singleton set containing the option itself and the set of options it
260 turns on as a dependency. As an example +dotprod turns on FL_DOTPROD and
261 FL_SIMD. As such the set of bits represented by this option is
262 {FL_DOTPROD, FL_SIMD}. */
263 unsigned long total_flags_a = opt_a->flag_canonical & opt_a->flags_on;
264 unsigned long total_flags_b = opt_b->flag_canonical & opt_b->flags_on;
265 int popcnt_a = popcount_hwi ((HOST_WIDE_INT)total_flags_a);
266 int popcnt_b = popcount_hwi ((HOST_WIDE_INT)total_flags_b);
267 int order = popcnt_b - popcnt_a;
268
269 /* If they have the same amount of bits set, give it a more
270 deterministic ordering by using the value of the bits themselves. */
271 if (order == 0)
272 return total_flags_b - total_flags_a;
273
274 return order;
275 }
276
277 /* Implement TARGET_OPTION_INIT_STRUCT. */
278
279 static void
aarch64_option_init_struct(struct gcc_options * opts ATTRIBUTE_UNUSED)280 aarch64_option_init_struct (struct gcc_options *opts ATTRIBUTE_UNUSED)
281 {
282 /* Sort the extensions based on how many bits they set, order the larger
283 counts first. We sort the list because this makes processing the
284 feature bits O(n) instead of O(n^2). While n is small, the function
285 to calculate the feature strings is called on every options push,
286 pop and attribute change (arm_neon headers, lto etc all cause this to
287 happen quite frequently). It is a trade-off between time and space and
288 so time won. */
289 int n_extensions
290 = sizeof (all_extensions) / sizeof (struct aarch64_option_extension);
291 qsort (&all_extensions_by_on, n_extensions,
292 sizeof (struct aarch64_option_extension), opt_ext_cmp);
293 }
294
295 /* Checks to see if enough bits from the option OPT are enabled in
296 ISA_FLAG_BITS to be able to replace the individual options with the
297 canonicalized version of the option. This is done based on two rules:
298
299 1) Synthetic groups, such as +crypto we only care about the bits that are
300 turned on. e.g. +aes+sha2 can be replaced with +crypto.
301
302 2) Options that themselves have a bit, such as +rdma, in this case, all the
303 feature bits they turn on must be available and the bit for the option
304 itself must be. In this case it's effectively a reduction rather than a
305 grouping. e.g. +fp+simd is not enough to turn on +rdma, for that you would
306 need +rdma+fp+simd which is reduced down to +rdma.
307 */
308
309 static bool
aarch64_contains_opt(unsigned long isa_flag_bits,opt_ext * opt)310 aarch64_contains_opt (unsigned long isa_flag_bits, opt_ext *opt)
311 {
312 unsigned long flags_check
313 = opt->is_synthetic ? opt->flags_on : opt->flag_canonical;
314
315 return (isa_flag_bits & flags_check) == flags_check;
316 }
317
318 /* Return a string representation of ISA_FLAGS. DEFAULT_ARCH_FLAGS
319 gives the default set of flags which are implied by whatever -march
320 we'd put out. Our job is to figure out the minimal set of "+" and
321 "+no" feature flags to put out, and to put them out grouped such
322 that all the "+" flags come before the "+no" flags. */
323
324 std::string
aarch64_get_extension_string_for_isa_flags(unsigned long isa_flags,unsigned long default_arch_flags)325 aarch64_get_extension_string_for_isa_flags (unsigned long isa_flags,
326 unsigned long default_arch_flags)
327 {
328 const struct aarch64_option_extension *opt = NULL;
329 std::string outstr = "";
330
331 unsigned long isa_flag_bits = isa_flags;
332
333 /* Pass one: Minimize the search space by reducing the set of options
334 to the smallest set that still turns on the same features as before in
335 conjunction with the bits that are turned on by default for the selected
336 architecture. */
337 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
338 {
339 /* If the bit is on by default, then all the options it turns on are also
340 on by default due to the transitive dependencies.
341
342 If the option is enabled explicitly in the set then we need to emit
343 an option for it. Since this list is sorted by extensions setting the
344 largest number of featers first, we can be sure that nothing else will
345 ever need to set the bits we already set. Consider the following
346 situation:
347
348 Feat1 = A + B + C
349 Feat2 = A + B
350 Feat3 = A + D
351 Feat4 = B + C
352 Feat5 = C
353
354 The following results are expected:
355
356 A + C = A + Feat5
357 B + C = Feat4
358 Feat4 + A = Feat1
359 Feat2 + Feat5 = Feat1
360 Feat1 + C = Feat1
361 Feat3 + Feat4 = Feat1 + D
362
363 This search assumes that all invidual feature bits are use visible,
364 in other words the user must be able to do +A, +B, +C and +D. */
365 if (aarch64_contains_opt (isa_flag_bits | default_arch_flags, opt))
366 {
367 /* We remove all the dependent bits, to prevent them from being turned
368 on twice. This only works because we assume that all there are
369 individual options to set all bits standalone. */
370 isa_flag_bits &= ~opt->flags_on;
371 isa_flag_bits |= opt->flag_canonical;
372 }
373 }
374
375 /* By toggling bits on and off, we may have set bits on that are already
376 enabled by default. So we mask the default set out so we don't emit an
377 option for them. Instead of checking for this each time during Pass One
378 we just mask all default bits away at the end. */
379 isa_flag_bits &= ~default_arch_flags;
380
381 /* We now have the smallest set of features we need to process. A subsequent
382 linear scan of the bits in isa_flag_bits will allow us to print the ext
383 names. However as a special case if CRC was enabled before, always print
384 it. This is required because some CPUs have an incorrect specification
385 in older assemblers. Even though CRC should be the default for these
386 cases the -mcpu values won't turn it on. */
387 if (isa_flags & AARCH64_ISA_CRC)
388 isa_flag_bits |= AARCH64_ISA_CRC;
389
390 /* Pass Two:
391 Print the option names that we're sure we must turn on. These are only
392 optional extension names. Mandatory ones have already been removed and
393 ones we explicitly want off have been too. */
394 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
395 {
396 if (isa_flag_bits & opt->flag_canonical)
397 {
398 outstr += "+";
399 outstr += opt->name;
400 }
401 }
402
403 /* Pass Three:
404 Print out a +no for any mandatory extension that we are
405 turning off. By this point aarch64_parse_extension would have ensured
406 that any optional extensions are turned off. The only things left are
407 things that can't be turned off usually, e.g. something that is on by
408 default because it's mandatory and we want it off. For turning off bits
409 we don't guarantee the smallest set of flags, but instead just emit all
410 options the user has specified.
411
412 The assembler requires all +<opts> to be printed before +no<opts>. */
413 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
414 {
415 if ((~isa_flags) & opt->flag_canonical
416 && !((~default_arch_flags) & opt->flag_canonical))
417 {
418 outstr += "+no";
419 outstr += opt->name;
420 }
421 }
422
423 return outstr;
424 }
425
426 /* Attempt to rewrite NAME, which has been passed on the command line
427 as a -mcpu option to an equivalent -march value. If we can do so,
428 return the new string, otherwise return an error. */
429
430 const char *
aarch64_rewrite_selected_cpu(const char * name)431 aarch64_rewrite_selected_cpu (const char *name)
432 {
433 std::string original_string (name);
434 std::string extension_str;
435 std::string processor;
436 size_t extension_pos = original_string.find_first_of ('+');
437
438 /* Strip and save the extension string. */
439 if (extension_pos != std::string::npos)
440 {
441 processor = original_string.substr (0, extension_pos);
442 extension_str = original_string.substr (extension_pos,
443 std::string::npos);
444 }
445 else
446 {
447 /* No extensions. */
448 processor = original_string;
449 }
450
451 const struct processor_name_to_arch* p_to_a;
452 for (p_to_a = all_cores;
453 p_to_a->arch != aarch64_no_arch;
454 p_to_a++)
455 {
456 if (p_to_a->processor_name == processor)
457 break;
458 }
459
460 const struct arch_to_arch_name* a_to_an;
461 for (a_to_an = all_architectures;
462 a_to_an->arch != aarch64_no_arch;
463 a_to_an++)
464 {
465 if (a_to_an->arch == p_to_a->arch)
466 break;
467 }
468
469 /* We couldn't find that proceesor name, or the processor name we
470 found does not map to an architecture we understand. */
471 if (p_to_a->arch == aarch64_no_arch
472 || a_to_an->arch == aarch64_no_arch)
473 fatal_error (input_location, "unknown value %qs for -mcpu", name);
474
475 unsigned long extensions = p_to_a->flags;
476 aarch64_parse_extension (extension_str.c_str (), &extensions);
477
478 std::string outstr = a_to_an->arch_name
479 + aarch64_get_extension_string_for_isa_flags (extensions,
480 a_to_an->flags);
481
482 /* We are going to memory leak here, nobody elsewhere
483 in the callchain is going to clean up after us. The alternative is
484 to allocate a static buffer, and assert that it is big enough for our
485 modified string, which seems much worse! */
486 return xstrdup (outstr.c_str ());
487 }
488
489 /* Called by the driver to rewrite a name passed to the -mcpu
490 argument in preparation to be passed to the assembler. The
491 names passed from the commend line will be in ARGV, we want
492 to use the right-most argument, which should be in
493 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
494
495 const char *
aarch64_rewrite_mcpu(int argc,const char ** argv)496 aarch64_rewrite_mcpu (int argc, const char **argv)
497 {
498 gcc_assert (argc);
499 return aarch64_rewrite_selected_cpu (argv[argc - 1]);
500 }
501
502 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
503
504 #undef AARCH64_CPU_NAME_LENGTH
505
506