1 /* SPDX-License-Identifier: MIT
2  *
3  * Permission is hereby granted, free of charge, to any person
4  * obtaining a copy of this software and associated documentation
5  * files (the "Software"), to deal in the Software without
6  * restriction, including without limitation the rights to use, copy,
7  * modify, merge, publish, distribute, sublicense, and/or sell copies
8  * of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be
12  * included in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Copyright:
24  *   2020      Evan Nemerson <evan@nemerson.com>
25  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
26  */
27 
28 #if !defined(SIMDE_ARM_NEON_MAX_H)
29 #define SIMDE_ARM_NEON_MAX_H
30 
31 #include "types.h"
32 #include "cgt.h"
33 #include "bsl.h"
34 
35 HEDLEY_DIAGNOSTIC_PUSH
36 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
37 SIMDE_BEGIN_DECLS_
38 
39 SIMDE_FUNCTION_ATTRIBUTES
40 simde_float32x2_t
simde_vmax_f32(simde_float32x2_t a,simde_float32x2_t b)41 simde_vmax_f32(simde_float32x2_t a, simde_float32x2_t b) {
42   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
43     return vmax_f32(a, b);
44   #else
45     simde_float32x2_private
46       r_,
47       a_ = simde_float32x2_to_private(a),
48       b_ = simde_float32x2_to_private(b);
49 
50     SIMDE_VECTORIZE
51     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
52       #if !defined(SIMDE_FAST_NANS)
53         r_.values[i] = (a_.values[i] >= b_.values[i]) ? a_.values[i] : ((a_.values[i] < b_.values[i]) ? b_.values[i] : SIMDE_MATH_NANF);
54       #else
55         r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
56       #endif
57     }
58 
59     return simde_float32x2_from_private(r_);
60   #endif
61 }
62 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
63   #undef vmax_f32
64   #define vmax_f32(a, b) simde_vmax_f32((a), (b))
65 #endif
66 
67 SIMDE_FUNCTION_ATTRIBUTES
68 simde_float64x1_t
simde_vmax_f64(simde_float64x1_t a,simde_float64x1_t b)69 simde_vmax_f64(simde_float64x1_t a, simde_float64x1_t b) {
70   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
71     return vmax_f64(a, b);
72   #else
73     simde_float64x1_private
74       r_,
75       a_ = simde_float64x1_to_private(a),
76       b_ = simde_float64x1_to_private(b);
77 
78     SIMDE_VECTORIZE
79     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
80       #if !defined(SIMDE_FAST_NANS)
81         r_.values[i] = (a_.values[i] >= b_.values[i]) ? a_.values[i] : ((a_.values[i] < b_.values[i]) ? b_.values[i] : SIMDE_MATH_NAN);
82       #else
83         r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
84       #endif
85     }
86 
87     return simde_float64x1_from_private(r_);
88   #endif
89 }
90 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
91   #undef vmax_f64
92   #define vmax_f64(a, b) simde_vmax_f64((a), (b))
93 #endif
94 
95 SIMDE_FUNCTION_ATTRIBUTES
96 simde_int8x8_t
simde_vmax_s8(simde_int8x8_t a,simde_int8x8_t b)97 simde_vmax_s8(simde_int8x8_t a, simde_int8x8_t b) {
98   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
99     return vmax_s8(a, b);
100   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
101     return simde_vbsl_s8(simde_vcgt_s8(a, b), a, b);
102   #else
103     simde_int8x8_private
104       r_,
105       a_ = simde_int8x8_to_private(a),
106       b_ = simde_int8x8_to_private(b);
107 
108     SIMDE_VECTORIZE
109     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
110       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
111     }
112 
113     return simde_int8x8_from_private(r_);
114   #endif
115 }
116 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
117   #undef vmax_s8
118   #define vmax_s8(a, b) simde_vmax_s8((a), (b))
119 #endif
120 
121 SIMDE_FUNCTION_ATTRIBUTES
122 simde_int16x4_t
simde_vmax_s16(simde_int16x4_t a,simde_int16x4_t b)123 simde_vmax_s16(simde_int16x4_t a, simde_int16x4_t b) {
124   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
125     return vmax_s16(a, b);
126   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
127     return simde_vbsl_s16(simde_vcgt_s16(a, b), a, b);
128   #else
129     simde_int16x4_private
130       r_,
131       a_ = simde_int16x4_to_private(a),
132       b_ = simde_int16x4_to_private(b);
133 
134     SIMDE_VECTORIZE
135     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
136       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
137     }
138 
139     return simde_int16x4_from_private(r_);
140   #endif
141 }
142 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
143   #undef vmax_s16
144   #define vmax_s16(a, b) simde_vmax_s16((a), (b))
145 #endif
146 
147 SIMDE_FUNCTION_ATTRIBUTES
148 simde_int32x2_t
simde_vmax_s32(simde_int32x2_t a,simde_int32x2_t b)149 simde_vmax_s32(simde_int32x2_t a, simde_int32x2_t b) {
150   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
151     return vmax_s32(a, b);
152   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
153     return simde_vbsl_s32(simde_vcgt_s32(a, b), a, b);
154   #else
155     simde_int32x2_private
156       r_,
157       a_ = simde_int32x2_to_private(a),
158       b_ = simde_int32x2_to_private(b);
159 
160     SIMDE_VECTORIZE
161     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
162       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
163     }
164 
165     return simde_int32x2_from_private(r_);
166   #endif
167 }
168 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
169   #undef vmax_s32
170   #define vmax_s32(a, b) simde_vmax_s32((a), (b))
171 #endif
172 
173 SIMDE_FUNCTION_ATTRIBUTES
174 simde_int64x1_t
simde_x_vmax_s64(simde_int64x1_t a,simde_int64x1_t b)175 simde_x_vmax_s64(simde_int64x1_t a, simde_int64x1_t b) {
176   #if SIMDE_NATURAL_VECTOR_SIZE > 0
177     return simde_vbsl_s64(simde_vcgt_s64(a, b), a, b);
178   #else
179     simde_int64x1_private
180       r_,
181       a_ = simde_int64x1_to_private(a),
182       b_ = simde_int64x1_to_private(b);
183 
184     SIMDE_VECTORIZE
185     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
186       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
187     }
188 
189     return simde_int64x1_from_private(r_);
190   #endif
191 }
192 
193 SIMDE_FUNCTION_ATTRIBUTES
194 simde_uint8x8_t
simde_vmax_u8(simde_uint8x8_t a,simde_uint8x8_t b)195 simde_vmax_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
196   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
197     return vmax_u8(a, b);
198   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
199     return simde_vbsl_u8(simde_vcgt_u8(a, b), a, b);
200   #else
201     simde_uint8x8_private
202       r_,
203       a_ = simde_uint8x8_to_private(a),
204       b_ = simde_uint8x8_to_private(b);
205 
206     SIMDE_VECTORIZE
207     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
208       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
209     }
210 
211     return simde_uint8x8_from_private(r_);
212   #endif
213 }
214 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
215   #undef vmax_u8
216   #define vmax_u8(a, b) simde_vmax_u8((a), (b))
217 #endif
218 
219 SIMDE_FUNCTION_ATTRIBUTES
220 simde_uint16x4_t
simde_vmax_u16(simde_uint16x4_t a,simde_uint16x4_t b)221 simde_vmax_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
222   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
223     return vmax_u16(a, b);
224   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
225     return simde_vbsl_u16(simde_vcgt_u16(a, b), a, b);
226   #else
227     simde_uint16x4_private
228       r_,
229       a_ = simde_uint16x4_to_private(a),
230       b_ = simde_uint16x4_to_private(b);
231 
232     SIMDE_VECTORIZE
233     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
234       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
235     }
236 
237     return simde_uint16x4_from_private(r_);
238   #endif
239 }
240 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
241   #undef vmax_u16
242   #define vmax_u16(a, b) simde_vmax_u16((a), (b))
243 #endif
244 
245 SIMDE_FUNCTION_ATTRIBUTES
246 simde_uint32x2_t
simde_vmax_u32(simde_uint32x2_t a,simde_uint32x2_t b)247 simde_vmax_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
248   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
249     return vmax_u32(a, b);
250   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
251     return simde_vbsl_u32(simde_vcgt_u32(a, b), a, b);
252   #else
253     simde_uint32x2_private
254       r_,
255       a_ = simde_uint32x2_to_private(a),
256       b_ = simde_uint32x2_to_private(b);
257 
258     SIMDE_VECTORIZE
259     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
260       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
261     }
262 
263     return simde_uint32x2_from_private(r_);
264   #endif
265 }
266 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
267   #undef vmax_u32
268   #define vmax_u32(a, b) simde_vmax_u32((a), (b))
269 #endif
270 
271 SIMDE_FUNCTION_ATTRIBUTES
272 simde_uint64x1_t
simde_x_vmax_u64(simde_uint64x1_t a,simde_uint64x1_t b)273 simde_x_vmax_u64(simde_uint64x1_t a, simde_uint64x1_t b) {
274   #if SIMDE_NATURAL_VECTOR_SIZE > 0
275     return simde_vbsl_u64(simde_vcgt_u64(a, b), a, b);
276   #else
277     simde_uint64x1_private
278       r_,
279       a_ = simde_uint64x1_to_private(a),
280       b_ = simde_uint64x1_to_private(b);
281 
282     SIMDE_VECTORIZE
283     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
284       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
285     }
286 
287     return simde_uint64x1_from_private(r_);
288   #endif
289 }
290 
291 SIMDE_FUNCTION_ATTRIBUTES
292 simde_float32x4_t
simde_vmaxq_f32(simde_float32x4_t a,simde_float32x4_t b)293 simde_vmaxq_f32(simde_float32x4_t a, simde_float32x4_t b) {
294   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
295     return vmaxq_f32(a, b);
296   #elif defined(SIMDE_X86_SSE_NATIVE)
297     #if !defined(SIMDE_FAST_NANS)
298       __m128 nan_mask = _mm_cmpunord_ps(a, b);
299       __m128 res = _mm_max_ps(a, b);
300       res = _mm_andnot_ps(nan_mask, res);
301       res = _mm_or_ps(res, _mm_and_ps(_mm_set1_ps(SIMDE_MATH_NANF), nan_mask));
302       return res;
303     #else
304       return _mm_max_ps(a, b);
305     #endif
306   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) && defined(SIMDE_FAST_NANS)
307     return vec_max(a, b);
308   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
309     return wasm_f32x4_max(a, b);
310   #else
311     simde_float32x4_private
312       r_,
313       a_ = simde_float32x4_to_private(a),
314       b_ = simde_float32x4_to_private(b);
315 
316     SIMDE_VECTORIZE
317     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
318       #if !defined(SIMDE_FAST_NANS)
319         r_.values[i] = (a_.values[i] >= b_.values[i]) ? a_.values[i] : ((a_.values[i] < b_.values[i]) ? b_.values[i] : SIMDE_MATH_NANF);
320       #else
321         r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
322       #endif
323     }
324 
325     return simde_float32x4_from_private(r_);
326   #endif
327 }
328 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
329   #undef vmaxq_f32
330   #define vmaxq_f32(a, b) simde_vmaxq_f32((a), (b))
331 #endif
332 
333 SIMDE_FUNCTION_ATTRIBUTES
334 simde_float64x2_t
simde_vmaxq_f64(simde_float64x2_t a,simde_float64x2_t b)335 simde_vmaxq_f64(simde_float64x2_t a, simde_float64x2_t b) {
336   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
337     return vmaxq_f64(a, b);
338   #elif defined(SIMDE_X86_SSE2_NATIVE)
339     #if !defined(SIMDE_FAST_NANS)
340       __m128d nan_mask = _mm_cmpunord_pd(a, b);
341       __m128d res = _mm_max_pd(a, b);
342       res = _mm_andnot_pd(nan_mask, res);
343       res = _mm_or_pd(res, _mm_and_pd(_mm_set1_pd(SIMDE_MATH_NAN), nan_mask));
344       return res;
345     #else
346       return _mm_max_pd(a, b);
347     #endif
348   #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE) && defined(SIMDE_FAST_NANS)
349     return vec_max(a, b);
350   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
351     return wasm_f64x2_max(a, b);
352   #else
353     simde_float64x2_private
354       r_,
355       a_ = simde_float64x2_to_private(a),
356       b_ = simde_float64x2_to_private(b);
357 
358     SIMDE_VECTORIZE
359     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
360       #if !defined(SIMDE_FAST_NANS)
361         r_.values[i] = (a_.values[i] >= b_.values[i]) ? a_.values[i] : ((a_.values[i] < b_.values[i]) ? b_.values[i] : SIMDE_MATH_NAN);
362       #else
363         r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
364       #endif
365     }
366 
367     return simde_float64x2_from_private(r_);
368   #endif
369 }
370 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
371   #undef vmaxq_f64
372   #define vmaxq_f64(a, b) simde_vmaxq_f64((a), (b))
373 #endif
374 
375 SIMDE_FUNCTION_ATTRIBUTES
376 simde_int8x16_t
simde_vmaxq_s8(simde_int8x16_t a,simde_int8x16_t b)377 simde_vmaxq_s8(simde_int8x16_t a, simde_int8x16_t b) {
378   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
379     return vmaxq_s8(a, b);
380   #elif defined(SIMDE_X86_SSE4_1_NATIVE)
381     return _mm_max_epi8(a, b);
382   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
383     return vec_max(a, b);
384   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
385     return wasm_i8x16_max(a, b);
386   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
387     return simde_vbslq_s8(simde_vcgtq_s8(a, b), a, b);
388   #else
389     simde_int8x16_private
390       r_,
391       a_ = simde_int8x16_to_private(a),
392       b_ = simde_int8x16_to_private(b);
393 
394     SIMDE_VECTORIZE
395     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
396       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
397     }
398 
399     return simde_int8x16_from_private(r_);
400   #endif
401 }
402 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
403   #undef vmaxq_s8
404   #define vmaxq_s8(a, b) simde_vmaxq_s8((a), (b))
405 #endif
406 
407 SIMDE_FUNCTION_ATTRIBUTES
408 simde_int16x8_t
simde_vmaxq_s16(simde_int16x8_t a,simde_int16x8_t b)409 simde_vmaxq_s16(simde_int16x8_t a, simde_int16x8_t b) {
410   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
411     return vmaxq_s16(a, b);
412   #elif defined(SIMDE_X86_SSE2_NATIVE)
413     return _mm_max_epi16(a, b);
414   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
415     return vec_max(a, b);
416   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
417     return wasm_i16x8_max(a, b);
418   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
419     return simde_vbslq_s16(simde_vcgtq_s16(a, b), a, b);
420   #else
421     simde_int16x8_private
422       r_,
423       a_ = simde_int16x8_to_private(a),
424       b_ = simde_int16x8_to_private(b);
425 
426     SIMDE_VECTORIZE
427     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
428       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
429     }
430 
431     return simde_int16x8_from_private(r_);
432   #endif
433 }
434 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
435   #undef vmaxq_s16
436   #define vmaxq_s16(a, b) simde_vmaxq_s16((a), (b))
437 #endif
438 
439 SIMDE_FUNCTION_ATTRIBUTES
440 simde_int32x4_t
simde_vmaxq_s32(simde_int32x4_t a,simde_int32x4_t b)441 simde_vmaxq_s32(simde_int32x4_t a, simde_int32x4_t b) {
442   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
443     return vmaxq_s32(a, b);
444   #elif defined(SIMDE_X86_SSE4_1_NATIVE)
445     return _mm_max_epi32(a, b);
446   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
447     return vec_max(a, b);
448   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
449     return wasm_i32x4_max(a, b);
450   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
451     return simde_vbslq_s32(simde_vcgtq_s32(a, b), a, b);
452   #else
453     simde_int32x4_private
454       r_,
455       a_ = simde_int32x4_to_private(a),
456       b_ = simde_int32x4_to_private(b);
457 
458     SIMDE_VECTORIZE
459     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
460       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
461     }
462 
463     return simde_int32x4_from_private(r_);
464   #endif
465 }
466 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
467   #undef vmaxq_s32
468   #define vmaxq_s32(a, b) simde_vmaxq_s32((a), (b))
469 #endif
470 
471 SIMDE_FUNCTION_ATTRIBUTES
472 simde_int64x2_t
simde_x_vmaxq_s64(simde_int64x2_t a,simde_int64x2_t b)473 simde_x_vmaxq_s64(simde_int64x2_t a, simde_int64x2_t b) {
474   #if defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
475     return vec_max(a, b);
476   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
477     return simde_vbslq_s64(simde_vcgtq_s64(a, b), a, b);
478   #else
479     simde_int64x2_private
480       r_,
481       a_ = simde_int64x2_to_private(a),
482       b_ = simde_int64x2_to_private(b);
483 
484     SIMDE_VECTORIZE
485     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
486       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
487     }
488 
489     return simde_int64x2_from_private(r_);
490   #endif
491 }
492 
493 SIMDE_FUNCTION_ATTRIBUTES
494 simde_uint8x16_t
simde_vmaxq_u8(simde_uint8x16_t a,simde_uint8x16_t b)495 simde_vmaxq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
496   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
497     return vmaxq_u8(a, b);
498   #elif defined(SIMDE_X86_SSE2_NATIVE)
499     return _mm_max_epu8(a, b);
500   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
501     return vec_max(a, b);
502   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
503     return wasm_u8x16_max(a, b);
504   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
505     return simde_vbslq_u8(simde_vcgtq_u8(a, b), a, b);
506   #else
507     simde_uint8x16_private
508       r_,
509       a_ = simde_uint8x16_to_private(a),
510       b_ = simde_uint8x16_to_private(b);
511 
512     SIMDE_VECTORIZE
513     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
514       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
515     }
516 
517     return simde_uint8x16_from_private(r_);
518   #endif
519 }
520 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
521   #undef vmaxq_u8
522   #define vmaxq_u8(a, b) simde_vmaxq_u8((a), (b))
523 #endif
524 
525 SIMDE_FUNCTION_ATTRIBUTES
526 simde_uint16x8_t
simde_vmaxq_u16(simde_uint16x8_t a,simde_uint16x8_t b)527 simde_vmaxq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
528   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
529     return vmaxq_u16(a, b);
530   #elif defined(SIMDE_X86_SSE4_1_NATIVE)
531     return _mm_max_epu16(a, b);
532   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
533     return vec_max(a, b);
534   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
535     return wasm_u16x8_max(a, b);
536   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
537     return simde_vbslq_u16(simde_vcgtq_u16(a, b), a, b);
538   #else
539     simde_uint16x8_private
540       r_,
541       a_ = simde_uint16x8_to_private(a),
542       b_ = simde_uint16x8_to_private(b);
543 
544     SIMDE_VECTORIZE
545     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
546       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
547     }
548 
549     return simde_uint16x8_from_private(r_);
550   #endif
551 }
552 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
553   #undef vmaxq_u16
554   #define vmaxq_u16(a, b) simde_vmaxq_u16((a), (b))
555 #endif
556 
557 SIMDE_FUNCTION_ATTRIBUTES
558 simde_uint32x4_t
simde_vmaxq_u32(simde_uint32x4_t a,simde_uint32x4_t b)559 simde_vmaxq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
560   #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
561     return vmaxq_u32(a, b);
562   #elif defined(SIMDE_X86_SSE4_1_NATIVE)
563     return _mm_max_epu32(a, b);
564   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
565     return vec_max(a, b);
566   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
567     return wasm_u32x4_max(a, b);
568   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
569     return simde_vbslq_u32(simde_vcgtq_u32(a, b), a, b);
570   #else
571     simde_uint32x4_private
572       r_,
573       a_ = simde_uint32x4_to_private(a),
574       b_ = simde_uint32x4_to_private(b);
575 
576     SIMDE_VECTORIZE
577     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
578       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
579     }
580 
581     return simde_uint32x4_from_private(r_);
582   #endif
583 }
584 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
585   #undef vmaxq_u32
586   #define vmaxq_u32(a, b) simde_vmaxq_u32((a), (b))
587 #endif
588 
589 SIMDE_FUNCTION_ATTRIBUTES
590 simde_uint64x2_t
simde_x_vmaxq_u64(simde_uint64x2_t a,simde_uint64x2_t b)591 simde_x_vmaxq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
592   #if defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
593     return vec_max(a, b);
594   #elif SIMDE_NATURAL_VECTOR_SIZE > 0
595     return simde_vbslq_u64(simde_vcgtq_u64(a, b), a, b);
596   #else
597     simde_uint64x2_private
598       r_,
599       a_ = simde_uint64x2_to_private(a),
600       b_ = simde_uint64x2_to_private(b);
601 
602     SIMDE_VECTORIZE
603     for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
604       r_.values[i] = (a_.values[i] > b_.values[i]) ? a_.values[i] : b_.values[i];
605     }
606 
607     return simde_uint64x2_from_private(r_);
608   #endif
609 }
610 
611 SIMDE_END_DECLS_
612 HEDLEY_DIAGNOSTIC_POP
613 
614 #endif /* !defined(SIMDE_ARM_NEON_MAX_H) */
615