1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
3
4; This should codegen to fmaxnm with no-signed-zeros.
5define float @fmaxnm(i32 %i1, i32 %i2) #0 {
6; CHECK-LABEL: fmaxnm:
7; CHECK:       // %bb.0:
8; CHECK-NEXT:    ucvtf s0, w0
9; CHECK-NEXT:    fmov s1, #11.00000000
10; CHECK-NEXT:    ucvtf s2, w1
11; CHECK-NEXT:    fmov s3, #17.00000000
12; CHECK-NEXT:    fadd s0, s0, s1
13; CHECK-NEXT:    fadd s1, s2, s3
14; CHECK-NEXT:    fcmp s0, s1
15; CHECK-NEXT:    fcsel s0, s0, s1, pl
16; CHECK-NEXT:    ret
17  %f1 = uitofp i32 %i1 to float
18  %fadd1 = fadd float %f1, 11.0
19  %f2 = uitofp i32 %i2 to float
20  %fadd2 = fadd float %f2, 17.0
21  %cmp = fcmp uge float %fadd1, %fadd2
22  %val = select i1 %cmp, float %fadd1, float %fadd2
23  ret float %val
24}
25
26; If f1 is 0, fmul is NaN because 0.0 * -INF = NaN
27; Therefore, this is not fmaxnm.
28define float @not_fmaxnm_maybe_nan(i32 %i1, i32 %i2) #0 {
29; CHECK-LABEL: not_fmaxnm_maybe_nan:
30; CHECK:       // %bb.0:
31; CHECK-NEXT:    mov w8, #-8388608
32; CHECK-NEXT:    ucvtf s0, w0
33; CHECK-NEXT:    ucvtf s1, w1
34; CHECK-NEXT:    fmov s2, #17.00000000
35; CHECK-NEXT:    fmov s3, w8
36; CHECK-NEXT:    fmul s0, s0, s3
37; CHECK-NEXT:    fadd s1, s1, s2
38; CHECK-NEXT:    fcmp s0, s1
39; CHECK-NEXT:    fcsel s0, s0, s1, pl
40; CHECK-NEXT:    ret
41  %f1 = uitofp i32 %i1 to float
42  %fmul = fmul float %f1, 0xfff0000000000000 ; -INFINITY as 64-bit hex
43  %f2 = uitofp i32 %i2 to float
44  %fadd2 = fadd float %f2, 17.0
45  %cmp = fcmp uge float %fmul, %fadd2
46  %val = select i1 %cmp, float %fmul, float %fadd2
47  ret float %val
48}
49
50attributes #0 = { "no-signed-zeros-fp-math"="true" }
51