1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -O3 -mtriple=aarch64-arm < %s | FileCheck %s
3
4; Run at O3 to make sure we can optimize load/store instructions after Machine
5; Block Placement takes place using Tail Duplication Threshold = 4.
6
7define void @foo(i1 %cond, i64* %ptr) {
8; CHECK-LABEL: foo:
9; CHECK:       // %bb.0: // %entry
10; CHECK-NEXT:    tbz w0, #0, .LBB0_2
11; CHECK-NEXT:  // %bb.1: // %if.then
12; CHECK-NEXT:    ldp x9, x8, [x1, #8]
13; CHECK-NEXT:    str xzr, [x1, #16]
14; CHECK-NEXT:    cmp x8, x9
15; CHECK-NEXT:    b.lt .LBB0_3
16; CHECK-NEXT:    b .LBB0_4
17; CHECK-NEXT:  .LBB0_2: // %if.else
18; CHECK-NEXT:    ldp x8, x9, [x1]
19; CHECK-NEXT:    cmp x8, x9
20; CHECK-NEXT:    b.ge .LBB0_4
21; CHECK-NEXT:  .LBB0_3: // %exit1
22; CHECK-NEXT:    str xzr, [x1, #8]
23; CHECK-NEXT:  .LBB0_4: // %exit2
24; CHECK-NEXT:    ret
25entry:
26  br i1 %cond, label %if.then, label %if.else
27
28if.then:
29  %0 = getelementptr inbounds i64, i64* %ptr, i64 2
30  %1 = load i64, i64* %0, align 8
31  store i64 0, i64* %0, align 8
32  br label %if.end
33
34if.else:
35  %2 = load i64, i64* %ptr, align 8
36  br label %if.end
37
38if.end:
39  %3 = phi i64 [ %1, %if.then ], [ %2, %if.else ]
40  %4 = getelementptr inbounds i64, i64* %ptr, i64 1
41  %5 = load i64, i64* %4, align 8
42  %6 = icmp slt i64 %3, %5
43  br i1 %6, label %exit1, label %exit2
44
45exit1:
46  store i64 0, i64* %4, align 8
47  ret void
48
49exit2:
50  ret void
51}
52